Philips bfm520 Datasheet

Page 1
DATA SH EET
DISCRETE SEMICONDUCTORS
BFM520
Dual NPN wideband transistor
Product specification Supersedes data of 1995 Sep 04
1996 Oct 08
Page 2
NXP Semiconductors Product specification
Fig.1 Simplified outline and symbol.
handbook, halfpage
MAM210
1
3
64
2
Top view
c
1
c
2
e
1
e
2
b
1
b
2
5
Marking code: N2.
s
21
2
Dual NPN wideband transistor BFM520

FEATURES

Small sizeTemperature and h
matched
FE
Low noise and high gainHigh gain at low current and low capacitance at low
voltage
Gold metallization ensures excellent reliability.

APPLICATIONS

Oscillator and buffer amplifiersBalanced amplifiersLNA/mixers.

DESCRIPTION

Dual transistor with two silicon NPN RF dies in a surface mount 6-pin SOT363 (S-mini) package. The transistor is primarily intended for wideband applications in the GHz-range in the RF front end of analog and digital cellular phones, cordless phones, radar detector s, pagers and satellite TV-tuners.

PINNING - SOT363A

PIN SYMBOL DESCRIPTION
1b 2e 3c 4b 5e 6c
1 1 2 2 2 1
base 1 emitter 1 collector 2 base 2 emitter 2 collector 1

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Any single transistor
C
re
f
T
G
UM
F noise figure I
R
th j-s
feedback capacitance Ie=0; VCB=3V; f=1MHz 0.4 pF transition frequency IC=20mA; VCE=3V; f=900MHz 9 GHz insertion power gain I
maximum unilateral power gain IC=20mA; VCE=3V;
thermal resistance from junction to soldering point
=20mA; VCE=3V;
C
f=900MHz; T
amb
=25C
13 14.5 dB
15 dB
f=900MHz; T
=5mA; VCE=3V;
C
f=900MHz;
amb
S
=25C
=
opt
1.2 1.6 dB
single loaded 230 K/W double loaded 115 K/W
Page 3
NXP Semiconductors Product specification
Dual NPN wideband transistor BFM520

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Any single transistor
V
CBO
V
CEO
V
EBO
I
C
P
tot
T
stg
T
j

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th j-s
collector-base voltage open emitter 20 V collector-emitter voltage open base 8V emitter-base voltage open collector 2.5 V DC collector current 70 mA total power dissipation up to Ts=118C; note 1 1W storage temperature 65 +175 C junction temperature 175 C
thermal resistance from junction to soldering point; note 1
single loaded 230 K/W double loaded 115 K/W
Note to the Limiting values and Thermal characteristics
1. T
is the temperature at the soldering point of the collector pin.
s
Page 4
NXP Semiconductors Product specification
s
21
2
G
UM
10
s
21
2
1s
11
2
–1s
22
2
–
--------------------------------------------------------
dBlog=
Dual NPN wideband transistor BFM520

CHARACTERISTICS

T
=25C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
DC characteristics of any single transistor
V
(BR)CBO
V
(BR)CEO
V
(BR)EBO
I
CBO
h
FE
DC characteristics of the dual transistor
h
FE
V
BEO
AC characteristics of any single transistor
f
T
C
c
C
re
G
UM
F noise figure I
collector-base breakdown volt a ge IC=2.5A; IE=0 20 V collector-emitter breakdown voltage IC=10A; IB=0 8 V emitter-base breakdown voltage IE=2.5A; IC=0 2.5 V collector-base leakage current VCB=6V; IE=0 50 nA DC current gain IC=20mA; VCE= 6 V 60 120 250
ratio of highest and lowest DC current gain
difference between highest and
IC1=IC2=20mA; V
CE1=VCE2
=6V
IE1=IE2=30mA; T
=25C0 1 mV
amb
11.2
lowest base-emitter voltage (offset voltage)
transition frequency IC=20mA; VCE=3V; f=1GHz 9 GHz collector capacitance IE=ie=0; VCB=3V; f=1MHz 0.5 pF feedback capacitance IC=0; VCB=3V; f=1MHz 0.4 pF maximum unilateral power gain;
note 1
insertion power gain I
IC=20mA; VCE=3V;
=25C; f = 900 MHz
T
amb
=20mA; VCE=3V;
I
C
=25C; f = 2 GHz
T
amb
=20mA; VCE=3V;
C
f=900MHz; T
=5mA; VCE=3V;
C
f=900MHz; I
=20mA; VCE=3V;
C
f=900MHz;
=5mA; VCE=3V;
I
C
f=2GHz;
=25C
amb
=
S
opt
=
S
opt
=
S
opt
15 dB
9 dB
13 14.5 dB
1.2 1.6 dB
1.7 2.1 dB
1.9 dB
Note
1. G
is the maximum unilateral power gain, assuming s12 is zero.
UM
Page 5
NXP Semiconductors Product specification
Fig.2 Power derating as a function of soldering
point temperature; typical values.
handbook, halfpage
0 50 100 200
1
0
MBG228
150
1.5
0.5
P
tot
(mW)
Ts (
o
C)
double loaded
single loaded
Fig.3 Transition frequency as a function of
collector current; typical values.
f=1GHz; T
amb
=25C.
handbook, halfpage
MRA705
f
T
(GHz)
IC (mA)
VCE = 6V
VCE = 3V
12
8
4
0
10
−1
11010
2
Fig.4 DC current gain as a function of collector
current; typical values.
VCE=6V.
handbook, halfpage
MRA703
0
250
50
100
150
200
h
FE
IC (mA)
10
−1
10
−2
1
10
10
2
Fig.5 Feedback capacitance as a function of
collector-base voltage; typical values.
IC=0; f=1MHz.
handbook, halfpage
MRA704
0.6
0.4
0.2
0
04812
C
re
(pF)
VCB (V)
Dual NPN wideband transistor BFM520
Page 6
NXP Semiconductors Product specification
Fig.6 Gain as a function of collector current;
typical values.
f=900MHz; VCE=3V.
handbook, halfpage
0102030
20
0
16
12
8
4
MGG203
IC (mA)
gain (dB)
G
UM
MSG/G
max
Fig.7 Gain as a function of collector current;
typical values.
f=2GHz; VCE=3V.
handbook, halfpage
0102030
20
0
16
12
8
4
MGG204
IC (mA)
gain (dB)
G
UM
MSG/G
max
Fig.8 Gain as a function of frequency; typical
values.
IC=5mA; VCE=3V.
handbook, halfpage
50
0
MGG205
10
2
10
3
10
4
10
10
20
30
40
f (MHz)
gain (dB)
G
UM
MSG/G
max
Fig.9 Gain as a function of frequency; typical
values.
IC=20 mA; VCE=3V.
handbook, halfpage
50
0
MGG206
10
2
10
3
10
4
10
10
20
30
40
f (MHz)
gain (dB)
G
UM
MSG/G
max
Dual NPN wideband transistor BFM520
Page 7
NXP Semiconductors Product specification
Fig.10 Minimum noise figure and associated
available gain as functions of collector current.
VCE=3V.
handbook, halfpage
5
0
1
2
5
0
−5
10
G
ass
(dB)
15
20
3
F
min
(dB)
IC (mA)
4
MRA714
1
10
2
10
2000 MHz 1000 MHz
2000 MHz
1000 MHz
f = 900 MHz
G
ass
F
min
900 MHz 500 MHz
Fig.11 Minimum noise figure and associated
available gain as functions of frequency.
VCE=3V.
handbook, halfpage
5
0
1
2
5
0
−5
10
G
ass
(dB)
15
20
3
F
min
(dB)
f (MHz)
4
MRA715
10
2
10
4
10
3
G
ass
20 mA 5 mA
F
min
20 mAIC = 5 mA
Dual NPN wideband transistor BFM520
Page 8
NXP Semiconductors Product specification
Fig.12 Package equivalent circuit SOT363A
(inductance only).
B1 B2
C1 C2
LB LB
E1 E2
MBG188
LP LP
T1 T2
LELE
Fig.13 Package capacitance (fF) between
indicated nodes.
3E2
E1
B2
C2
C1
27 6
1
0.4
0.6
1.0
LP
Lead inductances (nH)
LB
LE
27
3 17 36348
B1 E2 E1 B2 C2
48 36 17 3
MBG189
6
Dual NPN wideband transistor BFM520
APPLICATION INFORMATION SPICE parameters for any single BFM520 die
SEQUENCE No. PARAMETER VALUE UNIT
1 IS 1.016 fA 2BF220.1 3 NF 1.000 4VAF48.06V 5 IKF 510.0 mA 6 ISE 283.0 fA 7 NE 2.035 8BR100.7 9 NR 0.988 10 VAR 1.692 V 11 IKR 2.352 mA 12 ISC 24.48 aA 13 NC 1.022 14 RB 10.00 15 IRB 1.000 A 16 RBM 10.00 17 RE 0.775 18 RC 2.210
(1)
19
(1)
20
(1)
21 22 CJE 1.245 pF 23 VJE 600.0 mV 24 MJE 0.258 25 TF 8.616 ps 26 XTF 6.788 27 VTF 1.414 V 28 ITF 110.3 mA 29 PTF 45.01 deg 30 CJC 447.6 fF 31 VJC 189.2 mV 32 MJC 0.071 33 XCJC 0.130 34 TR 543.7 ps
(1)
35 36 37
(1) (1)
38 FC 0.780
Note
1. These parameters have not been extracted,
the default values are shown.
XTB 0.000 EG 1.110 eV XTI 3.000
CJS 0.000 F VJS 750.0 mV MJS 0.000
Page 9
NXP Semiconductors Product specification
REFERENCES
OUTLINE VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
SOT363 SC-88
wBM
b
p
D
e
1
e
pin 1 index
A
A
1
L
p
Q
detail X
H
E
E
v M
A
AB
y
0 1 2 mm
scale
c
X
132
456
Plastic surface-mounted package; 6 leads SOT363
UNIT
A
1
max
b
p
cD
E
e
1
H
E
L
p
Qywv
mm
0.1
0.30
0.20
2.2
1.8
0.25
0.10
1.35
1.15
0.65
e
1.3
2.2
2.0
0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
0.25
0.15
A
1.1
0.8
04-11-08 06-03-16
Dual NPN wideband transistor BFM520

PACKAGE OUTLINE

Page 10
NXP Semiconductors Product specification
Dual NPN wideband transistor BFM520

DATA SHEET STATUS

DOCUMENT
STATUS
Objective data sheet Developme nt This document contains data from the objective specification for product
Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) desc ribed in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
DEFINITIONS Product specification The information and data
provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
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Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
(1)
PRODUCT STATUS
(2)
DEFINITION
development.
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Applications Applications that ar e described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the ris ks associated with their applications and products.
Page 11
NXP Semiconductors Product specification
Dual NPN wideband transistor BFM520
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applicat ions and products using NXP Semiconductors products in or de r to avoid a default of the applications and the prod ucts or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Rec ommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
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Printed in The Netherlands R77/02/pp12 Date of release: 1996Oct 08
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