Philips bf1218 Datasheet

BF1218

Dual N-channel dual gate MOSFET

Rev. 01 — 14 April 2010 Product data sheet

1. Product profile

1.1 General description

The BF1218 is a combination of two dual gate MOSFET amplifiers with shared source
and gate2 leads and an integrated switch. The integrated switch is operated by the gate1
bias of amplifier B.

The source and substrate are interconnected. Internal bias circuits enable DC stabilization
and a very good cross modulation performance during Automatic Gain Control (A GC).
Integrated diodes between the gates and source protect against excessive input voltage
surges. The transistor has a SOT363 micro-miniature plastic package.

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.

1.2 Features and benefits

 Two low noise gain controlled amplifiers in a single package. One with a fully

integrated bias and one with a partly integrated bia s

 Internal switch to save external components
 Superior cross modulation performance during AGC
 High forward transfer admittance
 High forward transfer admittance to input capacitance ratio

1.3 Applications

 Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply

voltage

 digital and analog television tuners
 professional communication equipment

NXP Semiconductors

132

4

56

sym089

G1B

G1A

G2 S

DA

DB

AMP B

AMP A

1.4 Quick reference data

Table 1. Quick reference data

Per MOSFET unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

V

DS

I

D

P

tot

y

fs

C

iss(G1)

C

rss

NF noise figure Y

Xmod cross modulation input level for k = 1 %;

T

j

[1] Tsp is the temperature at the soldering point of the source lead.
[2] Calculated from S-parameters.
[3] Measured in Figure 33
[4] Measured in Figure 34

Dual N-channel dual gate MOSFET

drain-source voltage DC - - 6 V
drain current DC - - 30 mA
total power dissipation Tsp 109 C

 forward transfer admittance f = 100 MHz; Tj = 25 C

amplifier A; I
amplifier B; I

=19mA 26 31 41 mS

D

=15mA 25 30 40 mS

D

input capacitance at gate1 f = 100 MHz

amplifier A
amplifier B

reverse transfer capacitance f = 100 MHz

S=YS(opt)

amplifier A; f = 400 MHz - 0.9 1.5 dB
amplifier B; f = 800 MHz - 1.4 2.0 dB

=50MHz;

f

w

=60MHz

f

unw

at 40 dB AGC

amplifier A
amplifier B

junction temperature - - 150 C

test circuit.
test circuit.

[1]

- - 180 mW

[2]

-2.12.6pF

[2]

-2.12.6pF

[2]

-20-fF

[3]

102 105 - dBV

[4]

102 105 - dBV

BF1218

2. Pinning information

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 2 of 23

Table 2. Discrete pinning

Pin Description Simplified outline Grap hi c symbol

1 gate1 (AMP A)
2gate2
3 gate1 (AMP B)
4 drain (AMP B)
5source
6 drain (AMP A)

NXP Semiconductors

Tsp (˚C)

0 20015050 100

001aac193

100

150

50

200

250

P

tot

(mW)

0

3. Ordering information

Table 3. Ordering information

Type number Package

BF1218 - plastic surface-mounted package; 6 leads SOT363

4. Marking

Table 4. Marking codes

Type number Marking code

BF1218 M7

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per MOSFET

V

DS

I

D

I

G1

I

G2

P

tot

T

stg

T

j

[1] Tsp is the temperature at the soldering point of the source lead.

drain-source voltage DC - 6 V
drain current DC - 30 mA
gate1 current - 10 mA
gate2 current - 10 mA
total power dissipation Tsp 109 C
storage temperature 65 +150 C
junction temperature - 150 C

BF1218

Dual N-channel dual gate MOSFET

Name Description Version

[1]

-180mW

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 3 of 23

Fig 1. Power derating curve

NXP Semiconductors

6. Thermal characteristics

BF1218

Dual N-channel dual gate MOSFET

Table 6. Thermal characteristics

Symbol Parameter Conditions Typ Unit

R

th(j-sp)

thermal resistance from junction to solder point 225 K/W

7. Static characteristics

Table 7. Static characteristics

Tj=25C; unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Per MOSFET; unless otherwise specified

V

(BR)DSS

V

(BR)G1-SS

V

(BR)G2-SS

V

F(S-G1)

V

F(S-G2)

V

G1-S(th)

V

G2-S(th)

I

DS

I

G1-S

I

G2-S

drain-source breakdown voltage V

gate1-source breakdown voltage V
gate2-source breakdown voltage V
forward source-gate1 voltage V
forward source-gate2 voltage V
gate1-source threshold voltage VDS=5V; V
gate2-source threshold voltage VDS=5V; V
drain-source current V

gate1 cut-off current V

gate2 cut-off current V

G1-S=VG2-S

=0V; ID=10A
amplifier A 6 - - V
amplifier B 6 - - V

G2-S=VDS
G1-S=VDS
G2-S=VDS
G1-S=VDS

G2-S

amplifier A; V

=0V; I
=0V; I
=0V; I
=0V; I

G2-S
G1-S

=4V; V

DS(B)

DS(A)

amplifier B

G2-S=VDS(A)

amplifier A; V
amplifier B; V

=4V; V

G2-S

V

G1-S(A)=VDS(A)=VDS(B)

=0V

G1-S(A)
G1-S(B)

G1-S(B)

=10mA 6 - 10 V

G1-S

=10mA 6 - 10 V

G2-S

= 10 mA 0.5 - 1.5 V

S-G1

= 10 mA 0.5 - 1.5 V

S-G2

=4V; ID=100A 0.3 - 1.0 V
=5V; ID=100A 0.4 - 1.0 V

=5V; RG1=86k

=5V

=5V; I
=5V; V

=0V;

=0A - - 50 nA

D(B)

=0V - - 50 nA

DS(B)

[1]

14 - 24 mA

[2]

10 - 20 mA

--20nA

=0V

[1] RG1 connects gate1 (B) to VGG = 0 V (see Figure 3).
[2] R

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 4 of 23

connects gate1 (B) to VGG= 5 V (see Figure 3).

G1

NXP Semiconductors

VGG (V)

054231

001aag356

8

12

4

16

20

I

D

(mA)

0

(1)

(2)

(3)

(4)
(5)
(6)

001aac205

R

G1

V

GG

G1B

G2

G1A

DB

S

DA

BF1218

Dual N-channel dual gate MOSFET

(1) I
(2) I
(3) I
(4) I
(5) I
(6) I

; RG1=68k.

D(B)

; RG1=86k.

D(B)

; RG1= 100 k.

D(B)

; RG1= 100 k.

D(A)

; RG1=86k.

D(A)

; RG1=68k.

D(A)

Fig 2. Drain currents of MOSFET A and B as a

function of V

GG

Fig 3. Functional diagram

V

= 5 V: amplifier A is off; amplifier B is on.

GG

V

= 0 V: amplifier A is on; amplifier B is off.

GG

8. Dynamic characteristics

8.1 Dynamic characteristics for amplifier A

=25C; V

amb

=4V; VDS=5V; ID= 19 mA; unless otherwise specified.

G2-S

Table 8. Dynamic characteristics for amplifier A

Common source; T

Symbol Parameter Conditions Min Typ Max Unit

 forward transfer admittance f = 100 MHz; Tj=25C263141mS

y

fs

C

iss(G1)

C

iss(G2)

C

oss

C

rss

G

tr

input capacitance at gate1 f = 100 MHz
input capacitance at gate2 f = 100 MHz
output capacitance f = 100 MHz
reverse transfer capacitance f = 100 MHz
transducer power gain BS=B

f=200MHz; GS=2mS; GL= 0.5 mS 32 36 40 dB
f=400MHz; G
f=800MHz; G

NF noise figure f = 11MHz; G

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 5 of 23

f=400MHz; Y
f=800MHz; Y

S(opt)

[1]

[2]

-2.12.6pF

[2]

-3.4-pF

[2]

-0.8-pF

[2]

-20-fF

; BL=B

L(opt)

=2mS; GL= 1 mS 28 32 36 dB

S

= 3.3 mS; GL= 1 mS 24 28 33 dB

S

=20mS; BS= 0 S - 3.0 - dB

S

S=YS(opt)
S=YS(opt)

-0.91.5dB

-1.11.7dB

NXP Semiconductors

V

G1-S

(V)

021.60.8 1.20.4

001aaa554

10

20

30

I

D

(mA)

0

(1)
(2)
(3)

(4)

(5)

(7)

(6)

001aaa555

VDS (V)

0642

16

8

24

32

I

D

(mA)

0

(2)

(3)

(4)

(6)
(7)

(9)

(8)

(5)

(1)

BF1218

Dual N-channel dual gate MOSFET

[1]

Table 8. Dynamic characteristics for amplifier A

Common source; T

=25C; V

amb

=4V; VDS=5V; ID= 19 mA; unless otherwise specified.

G2-S

Symbol Parameter Conditions Min Typ Max Unit

Xmod cross modulation input level for k = 1 %; fw=50MHz;

f

=60MHz

unw

at 0 dB AGC 90 - - dBV
at 10 dB AGC - 90 - dBV
at 20 dB AGC - 99 - dBV
at 40 dB AGC 102 105 - dBV

…continued

[3]

[1] For the MOSFET not in use: V

G1-S(B)

=0V; V

DS(B)

=0V.
[2] Calculated from S-parameters.
[3] Measured in Figure 33

test circuit.

8.1.1 Graphics for amplifier A

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

Fig 4. Amplifier A: transfer characteristics; typical

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 6 of 23

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S

V

DS(A)

values

=4V.
=3.5V.
=3V.
=2.5V.
=2V.
=1.5V.
=1V.

=5V; V

G1-S(B)=VDS(B)

=0V; Tj=25C.

G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)
G1-S(A)

V

G2-S

=1.8V.
=1.7V.
=1.6V.
=1.5V.
=1.4V.
=1.3V.
=1.2V.
=1.1V.
=1V.

=4V; V

G1-S(B)=VDS(B)

=0V; Tj=25C.

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V
(8) V
(9) V

Fig 5. Amplifier A: output characteristics; typical

values

NXP Semiconductors

I

D

(mA)

03224816

001aaa556

20

10

30

40

y

fs

(mS)

0

(1)

(2)

(3)

(4)

(5)

(6)

001aac206

I

D(B)

(μA)

0604020

8

12

4

16

20

I

D(A)

(mA)

0

BF1218

Dual N-channel dual gate MOSFET

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V

V

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
DS(A)

=4V.
=3.5V.
=3V.
=2.5V.
=2V.
=1.5V.

=5V; V

G1-S(B)=VDS(B)

=0V; Tj=25C.

Fig 6. Amplifier A: forward transfer admittance as a

function of drain current; typical values

=5V; V

V

DS(A)

=25C.

T

j

= internal gate1 current = current in pin

I

D(B)

G2-S

=4V; V

DS(B)

=5V; V

G1-S(B)

=0V;

drain (AMP B) if MOSFET (B) is switched off.

Fig 7. Amplifier A: drain current as a function of

internal gate1 current; typical values

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 7 of 23

NXP Semiconductors

V

sup

(V)

054231

001aaa558

8

12

4

16

20

I

D

(mA)

0

001aaa559

V

G2-S

(V)

0642

16

8

24

32

I

D

(mA)

0

(1)
(2)

(3)
(4)
(5)

(6)

gain reduction (dB)

0504020 3010

001aac195

100

90

110

120

V

unw

(dBμV)

80

V

AGC

(V)

04312

001aac196

30

20

40

10

0

gain

reduction

(dB)

50

BF1218

Dual N-channel dual gate MOSFET

V

DS(A)=VDS(B)=Vsup

R

=86k (connected to ground); see Figure 3.

G1

; V

=4V; Tj=25C;

G2-S

Fig 8. Amplifier A: drain current of amplifier A as a

function of supply voltage of A and B
amplifier; typical values

DS(B)
DS(B)
DS(B)
DS(B)
DS(B)
DS(B)

V

DS(A)

T

=25C.

j

=5V.
=4.5V.
=4V.
=3.5V.
=3V.
=2.5V.
=5V; V

= 0 V; gate1 (AMPA) is open;

G1-S(B)

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V

Fig 9. Amplifier A: drain current as a function of

gate2 voltage; typica l v alues

Fig 10. Amplifier A: unwanted voltage for 1 %

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 8 of 23

V

DS(A)=VDS(B)

=60MHz; T

f

unw

cross modulation as a function of g ain
reduction; typical values

=5V; V

=25C; see Figure 33.

amb

=0V; fw=50MHz;

G1-S(B)

V

DS(A)=VDS(B)

Figure 33

.

=5V; V

= 0 V; f = 50 MHz; see

G1-S(B)

Fig 11. Amplifier A: gain reduction as a function of

AGC voltage; typical values

NXP Semiconductors

gain reduction (dB)

0504020 3010

001aac197

12

20

28

I

D

(mA)

4

001aaa564

f (MHz)

10 10

3

10

2

10

−1

1

10

10

2

bis, g

is

(mS)

10

−2

b

is

g

is

001aag358

10

1

10

2

Y

fs

(mS)

10

−1

−10

−1

−10

2

ϕ

fs

(deg)

−10

−1

f (MHz)

10 10

3

10

2

Y

fs

ϕ

fs

001aaa566

10

2

10

10

3

y

rs

(mS)

1

10

2

10

10

3

−ϕ

rs

(deg)

1

f (MHz)

10 10

3

10

2

y

rs

−ϕ

rs

BF1218

Dual N-channel dual gate MOSFET

V

DS(A)=VDS(B)

T

=25C; see Figure 33.

amb

Fig 12. Amplifier A: drain current as a function of gain

reduction; typical values

V

=5V; V

DS(A)

=19mA

I

D(A)

Fig 14. Amplifier A: forward transfer admittance and

phase as a function of frequency; typical
values

=5V; V

=0V; f=50MHz;

G1-S(B)

V
I

D(A)

DS(A)

=5V; V

=19mA

G2-S

=4V; V

DS(B)=VG1-S(B)

=0V;

Fig 13. Amplifier A: input admittance as a function of

frequency; typical values

G2-S

=4V; V

DS(B)=VG1-S(B)

=0V;

V
I

D(A)

DS(A)

=5V; V

=19mA

G2-S

=4V; V

DS(B)=VG1-S(B)

=0V;

Fig 15. Amplifier A: reverse transfer admittance and

phase as a function of frequency; typical
values

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 9 of 23

NXP Semiconductors

001aag360

1

10

−1

10

b

os

, g

os

(mS)

10

−2

f (MHz)

10 10

3

10

2

b

os

g

os

Fig 16. Amplifier A: output admittance as a function of frequency; typical values

V

DS(A)

=5V; V

G2-S

=4V; V

DS(B)=VG1-S(B)

=0V; I

BF1218

Dual N-channel dual gate MOSFET

=19mA

D(A)

8.1.2 Scattering parameters for amplifier A

Table 9. Scattering parameters for amplifier A

V

=5V; V

DS(A)

F
(MHz)

G2-S

s

11

Magnitude
(ratio)

40 0.9927 4.10 3.1833 175.69 0.0006 92.99 0.9927 1.24
100 0.9897 7.68 3.1743 171.77 0.0011 81.72 0.9923 2.54
200 0.9852 15.36 3.1494 163.56 0.0023 79.23 0.9912 5.09
300 0.9758 22.84 3.1146 155.46 0.0033 74.65 0.9904 7.60
400 0.9655 30.19 3.0718 147.53 0.0042 70.46 0.9890 10.10
500 0.9513 37.55 3.0156 139.61 0.0049 66.38 0.9874 12.60
600 0.9341 44.85 2.9482 131.74 0.0056 62.22 0.9853 15.11
700 0.9160 51.99 2.8755 124.04 0.0061 58.44 0.9832 17.61
800 0.8964 58.99 2.8003 116.41 0.0064 54.48 0.9806 20.12
900 0.8737 65.84 2.7206 108.93 0.0066 50.78 0.9793 22.57
1000 0.8499 72.51 2.6352 101.62 0.0067 46.49 0.9776 25.05

=4V; I

=19mA; V

D(A)

Angle
(degree)

=0V;V

DS(B)

s

21

Magnitude
(ratio)

G1-S(B)

Angle
(degree)

=0V; T

s
Magnitude

(ratio)

= 25 C; typical values.

amb

12

Angle
(degree)

s

22

Magnitude
(ratio)

8.1.3 Noise data for amplifier A

T able 10. Noise data for amplifier A

V

DS(A)

=5V; V

G2-S

=4V; I

=19mA; V

D(A)

DS(B)

=0V; V

G1-S(B)

=0V; T

unless otherwise specified.

f (MHz) NF

(dB) 

min

opt

(ratio) (degree)

400 0.9 0.77 22.7 0.65
800 1.1 0.73 45.75 0 .62

=25 C; typical values;

amb

Angle
(degree)

rn (ratio)

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 10 of 23

NXP Semiconductors

BF1218

Dual N-channel dual gate MOSFET

8.2 Dynamic characteristics for amplifier B

=25C; V

amb

=4V; VDS=5V; ID= 15 mA; unless otherwise specified.

G2-S

Table 11. Dynamic characteristics for amp lifier B

Common source; T

Symbol Parameter Conditions Min Typ Max Unit

 forward transfer admittance f = 100 MHz; Tj=25C253040mS

y

fs

C

iss(G1)

C

iss(G2)

C

oss

C

rss

G

tr

input capacitance at gate1 f = 100 MHz
input capacitance at gate2 f = 100 MHz
output capacitance f = 100 MHz
reverse transfer capacitance f = 100 MHz
transducer power gain BS=B

f = 200 MHz; GS=2mS; GL= 0.5 mS 31 35 39 dB
f = 400 MHz; G
f = 800 MHz; G

NF noise figure f = 11 MHz; G

f = 400 MHz; Y
f = 800 MHz; Y

Xmod cross modulation input level for k = 1 %; f

f

=60MHz

unw

at 0 dB AGC 90 - - dBV
at 10 dB AGC - 90 - dBV
at 20 dB AGC - 98 - dBV
at 40 dB AGC 102 105 - dBV

S(opt)

[1]

[2]

-2.12.6pF

[2]

-3.4-pF

[2]

-0.85-pF

[2]

-20-fF

; BL=B

L(opt)

=2mS; GL= 1 mS 28 32 36 dB

S

= 3.3 mS; GL= 1 mS 26 30 34 dB

S

=20mS; BS=0S - 3 - dB

S

S=YS(opt)
S=YS(opt)

=50MHz;

w

-1.11.7dB

-1.42.0dB

[3]

[1] For the MOSFET not in use: V
[2] Calculated from S-parameters.
[3] Measured in Figure 34

test circuit.

G1-S(A)

= 0 V; V

DS(A)

=0 V.

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 11 of 23

NXP Semiconductors

V

G1-S

(V)

0 2.01.60.8 1.20.4

001aag361

10

20

30

I

D

(mA)

0

(4)

(5)

(6)

(7)

(1)
(2)
(3)

VDS (V)

0642

001aag362

8

16

24

I

D

(mA)

0

(7)

(6)

(5)

(4)

(3)

(2)

(1)

8.2.1 Graphics for amplifier B

BF1218

Dual N-channel dual gate MOSFET

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

V

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
DS(B)

=4V.
=3.5V.
=3V.
=2.5V.
=2V.
=1.5V.
=1V.

=5V; V

DS(A)=VG1-S(A)

=0V; Tj=25C.

Fig 17. Amplifier B: transfer characteristics; typical

values

G1-S(B)
G1-S(B)
G1-S(B)
G1-S(B)
G1-S(B)
G1-S(B)
G1-S(B)

V

G2-S

=1.6V.
=1.5V.
=1.4V.
=1.3V.
=1.2V.
=1.1V.
=1V.

=4V; V

DS(A)=VG1-S(A)

=0V; Tj=25C.

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

Fig 18. Amplifier B: output characteristics; typical

values

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 12 of 23

NXP Semiconductors

V

G1-S

(V)

0 2.01.60.8 1.20.4

001aag363

40

60

20

80

100

I

G1

(μA)

0

(1)

(2)

(5)

(7)

(3)

(4)

(6)

ID (mA)

03224816

001aag364

16

24

8

32

40

0

Y

fs

(mS)

(1)

(2)

(3)

(4)

(5)

(7)

(6)

IG1 (μA)

0504020 3010

001aag365

8

12

4

16

20

I

D

(mA)

0

VGG (V)

054231

001aag366

8

12

4

16

20

I

D

(mA)

0

BF1218

Dual N-channel dual gate MOSFET

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

V

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
DS(B)

=4V.
=3.5V.
=3V.
=2.5V.
=2V.
=1.5V.
=1V.

=5V; V

DS(A)=VG1-S(A)

=0V; Tj=25C.

Fig 19. Amplifier B: gate1 current as a function of

gate1 voltage; typical values

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

V

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
DS(B)

=4V.
=3.5V.
=3V.
=2.5V.
=2V.
=1.5V.
=1V.

=5V; V

DS(A)=VG1-S(A)

=0V; Tj=25C.

Fig 20. Amplifier B: forward transfer admittance as a

function of drain current; typical values

V

DS(B)

=25C.

T

j

Fig 21. Amplifier B: drain current as a function of

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 13 of 23

gate1 current; typical values

=5V; V

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

V

=5V; V

DS(B)

=25C; RG1=86k (connected to VGG); see

T

j

Figure 3

.

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

Fig 22. Amplifier B: drain current as a function of

gate1 supply voltage; typical values

NXP Semiconductors

V

GG

= VDS (V)

054231

001aag367

10

15

5

20

25

I

D

(mA)

0

(1)

(4)
(5)
(6)

(7)
(8)
(9)

(3)

(2)

V

G2-S

(V)

0642

001aag368

8

16

24

I

D

(mA)

0

(5)

(3)

(2)

(1)

(4)

BF1218

Dual N-channel dual gate MOSFET

(1) RG1=47k.
(2) R
(3) R
(4) R
(5) R
(6) R
(7) R
(8) R
(9) R

=56k.

G1

=68k.

G1

=82k.

G1

=86k.

G1

= 100 k.

G1

= 120 k.

G1

= 150 k.

G1

= 180 k.

G1

=4V; V

V

G2-S

connected to V

DS(A)=VG1-S(A)

; see Figure 3.

GG

=0V; Tj=25C; RG1is

Fig 23. Amplifier B: drain current as a function of

gate1 supply volt age and drain supply volt age;
typical values

(1) V
(2) V
(3) V
(4) V
(5) V

=5.0V.

GG

=4.5V.

GG

=4.0V.

GG

=3.5V.

GG

=3.0V.

GG

=5V; V

V

DS(B)

=86k (connected to VGG); see Figure 3.

R

G1

DS(A)=VG1-S(A)

=0V; Tj=25C;

Fig 24. Amplifier B: drain current as a function of

gate2 voltage; typica l v alues

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 14 of 23

NXP Semiconductors

001aag369

V

G2-S

(V)

0642

20

30

10

40

50

I

G1

(μA)

0

(5)

(3)

(2)

(1)

(4)

001aag370

gain reduction (dB)

0604020

100

90

110

120

V

unw

(dBμV)

80

V

AGC

(V)

04312

001aag371

30

20

40

10

0

50

gain

reduction

(dB)

001aag372

gain reduction (dB)

0604020

12

6

18

24

I

D

(mA)

0

BF1218

Dual N-channel dual gate MOSFET

(1) VGG=5.0V.
(2) V
(3) V
(4) V
(5) V

=4.5V.

GG

=4.0V.

GG

=3.5V.

GG

=3.0V.

GG

=5V; V

V

DS(B)

=86k (connected to VGG); see Figure 3.

R

G1

DS(A)=VG1-S(A)

=0V; Tj=25C;

Fig 25. Amplifier B: gate1 current as a function of

gate2 voltage; typical values

V

=5V; VGG=5V; V

DS(B)

R

=86k (connected to VGG); fw=50MHz;

G1

=60MHz; T

f

unw

amb

DS(A)=VG1-S(A)

=25C; see Figure 34.

Fig 26. Amplifier B: unwanted voltage

for 1 % cross modulation as a function of gain
reduction; typical values

=0V;

V

=5V; VGG=5V; V

DS(B)

R

=86k (connected to VGG); f = 50 MHz;

G1

=25C; see Figure 34.

T

amb

Fig 27. Amplifier B: gain reduction as a function of

AGC voltage; typical values

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 15 of 23

DS(A)=VG1-S(A)

=0V;

V

=5V; VGG=5V; V

DS(B)

R

=86k (connected to VGG); f = 50 MHz;

G1

=25C; see Figure 34.

T

amb

DS(A)=VG1-S(A)

=0V;

Fig 28. Amplifier B: drain current as a function of gain

reduction; typical values

NXP Semiconductors

001aaa581

f (MHz)

10 10

3

10

2

10

−1

1

10

10

2

bis, g

is

(mS)

10

−2

b

is

g

is

f (MHz)

10 10

3

10

2

001aag374

−10

−10

2

−1

ϕ

fs

(deg)

10

10

2

1

Y

fs

(mS)

Y

fs

ϕ

fs

001aaa583

10

2

10

10

3

y

rs

(μS)

1

10

2

10

10

3

−ϕ

rs

(deg)

1

f (MHz)

10 10

3

10

2

y

rs

−ϕ

rs

001aag376

1

10

−1

10

b

os

, g

os

(mS)

10

−2

f (MHz)

10 10

3

10

2

b

os

g

os

V

=5V; V

DS(B)

I

=15mA

D(B)

Fig 29. Amplifier B: input admittance as a function of

frequency; typical values

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

BF1218

Dual N-channel dual gate MOSFET

=5V; V

V

DS(B)

I

=15mA

D(B)

Fig 30. Amplifier B: forward transfer admittance and

phase as a function of frequency; typical
values

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

V

=5V; V

DS(B)

=15mA

I

D(B)

Fig 31. Amplifier B: reverse transfer admittance and

phase as a function of frequency; typical

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 16 of 23

values

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

V
I

D(B)

DS(B)

=5V; V

=15mA

G2-S

=4V; V

DS(A)=VG1-S(A)

=0V;

Fig 32. Amplifier B: output admittance as a function of

frequency; typical values

NXP Semiconductors

BF1218

Dual N-channel dual gate MOSFET

8.2.2 Scattering parameters for amplifier B

Table 12. Scattering parameters for amplifier B

V

=5V; V

DS(B)

f (MHz) s

G2-S

11

Magnitude
(ratio)

40 0.9841 4.20 2.9772 175.44 0.0005 106.03 0.9923 1.40
100 0.9799 7.68 2.9694 171.40 0.0011 88.52 0.9927 2.88
200 0.9775 15.24 2.9472 162.86 0.0023 87.60 0.9914 5.77
300 0.9706 22.70 2.9147 154.41 0.0034 85.98 0.9902 8.61
400 0.9632 30.08 2.8754 146.10 0.0046 85.09 0.9888 11.43
500 0.9515 37.46 2.8213 137.77 0.0056 84.03 0.9870 14.26
600 0.9377 44.80 2.7560 129.44 0.0065 83.30 0.9839 17.16
700 0.9229 52.10 2.6865 121.24 0.0075 82.99 0.9810 20.05
800 0.9062 59.33 2.6119 113.09 0.0084 82.08 0.9777 22.93
900 0.8864 66.35 2.5318 105.04 0.0091 81.36 0.9754 25.77
1000 0.8650 73.21 2.4437 97.11 0.0098 80.34 0.9714 28.64

=4V; I

=15mA; V

D(B)

Angle
(degree)

=0V;V

DS(A)

s

21

Magnitude
(ratio)

G1-S(A)

Angle
(degree)

=0V; T

s
Magnitude

(ratio)

= 25 C; typical values.

amb

12

Angle
(degree)

s

22

Magnitude
(ratio)

Angle
(degree)

8.2.3 Noise data for amplifier B

T able 13. Noise data for amplifier B

V

=5V; V

DS(B)

unless otherwise specified.

f (MHz) NF

400 1.1 0.72 22.83 0 .66
800 1.4 0.68 46.42 0 .64

G2-S

=4V; I

min

=15mA; V

D(B)

(dB) 

DS(A)

opt

=0V; V

G1-S(A)

=0V; T

(ratio) (degree)

=25C; typical values;

amb

rn ()

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 17 of 23

NXP Semiconductors

50 Ω

10 kΩ

R

GEN
50 Ω

R

L

50 Ω

50 Ω

R

G1

4.7 nF

4.7 nF

4.7 nF

G2

S

G1B DB

DA

4.7 nF

4.7 nF

4.7 nF

G1A

BF1218

V

GG

0V

V

AGC

L2

2.2 μH

L1

2.2 μH

001aak331

V

i

V

DS(A)

5V

V

DS(A)

5V

50 Ω

10 kΩ

R

GEN
50 Ω

50 Ω

R

G1

4.7 nF

4.7 nF

4.7 nF

G2

S

G1B DB

DA

4.7 nF

4.7 nF

4.7 nF

G1A

BF1218

V

GG

5V

V

AGC

L2

2.2 μH

L1

2.2 μH

R

L

50 Ω

001aak332

V

i

V

DS(A)

5V

V

DS(A)

5V

9. Test information

BF1218

Dual N-channel dual gate MOSFET

Fig 33. Cross modulation test set-up for amplifier A

Fig 34. Cross modulation test set-up for amplifier B

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 18 of 23

NXP Semiconductors

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

SOT363 SC-88

wBM

b

p

D

e

1

e

pin 1
index

A

A

1

L

p

Q

detail X

H

E

E

v M

A

AB

y

0 1 2 mm

scale

c

X

132

456

Plastic surface-mounted package; 6 leads SOT363

UNIT

A

1

max

b

p

cD

E

e

1

H

E

L

p

Qywv

mm

0.1

0.30

0.20

2.2

1.8

0.25

0.10

1.35

1.15

0.65

e

1.3

2.2

2.0

0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

0.25

0.15

A

1.1

0.8

04-11-08
06-03-16

Dual N-channel dual gate MOSFET

10. Package outline

BF1218

Fig 35. Package outline SOT363

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 19 of 23

NXP Semiconductors

BF1218

Dual N-channel dual gate MOSFET

11. Abbreviations

Table 14. Abbreviations

Acronym Description

AGC Automatic Gain Control
DC Direct Current
MOSFET Metal-Oxide Semiconductor Field-Effect Transistor
UHF Ultra High Frequen cy
VHF Very High Frequency

12. Revision history

Table 15. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BF1218_1 20100414 Product data sheet - -

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 20 of 23

NXP Semiconductors

BF1218

Dual N-channel dual gate MOSFET

13. Legal information

13.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this docu ment may have change d since this d ocument was p ublished and may dif fe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

13.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to co nt ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.

13.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteri stics sections of this
document, and as such is not complete, exhaustive or legally binding.

Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is au tomotive qualified,
the product is not suitable for automotive use . It is neither qua lifi ed n or test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.

, unless otherwise

Product data sheet Rev. 01 — 14 April 2010 21 of 23

NXP Semiconductors

BF1218

Dual N-channel dual gate MOSFET

In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, da mages or failed produ ct claims result ing from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.

13.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trademarks
are the property of their respective owners.

14. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

BF1218_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 14 April 2010 22 of 23

NXP Semiconductors

15. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 2

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 3

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4

7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

8 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

8.1 Dynamic characteristics for amplifier A. . . . . . . 5

8.1.1 Graphics for amplifier A . . . . . . . . . . . . . . . . . . 6

8.1.2 Scattering parameters for amplifier A. . . . . . . 10

8.1.3 Noise data for amplifier A . . . . . . . . . . . . . . . . 10

8.2 Dynamic characteristics for amplifier B. . . . . . 11

8.2.1 Graphics for amplifier B . . . . . . . . . . . . . . . . . 12

8.2.2 Scattering parameters for amplifier B. . . . . . . 17

8.2.3 Noise data for amplifier B . . . . . . . . . . . . . . . . 17

9 Test information. . . . . . . . . . . . . . . . . . . . . . . . 18

10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19

11 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20

12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20

13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21

13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21

13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21

13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22

14 Contact information. . . . . . . . . . . . . . . . . . . . . 22

15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

BF1218

Dual N-channel dual gate MOSFET

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

Date of release: 14 April 2010

Document identifier: BF1218_1