Philips bf1216 Datasheet

BF1216

Dual N-channel dual gate MOSFET

Rev. 01 — 29 April 2010 Product data sheet

1. Product profile

1.1 General description

The BF1216 is a combination of two dual gate MOSFET amplifiers with shared source
and gate2 leads.

The source and substrate are interconnected. Internal bias circuits enable DC stabilization
and very good cross modulation performance d uring AGC. Integrated diod es between the
gates and source protect against excessive input voltage surges. The transistor is
available as a SOT363 micro-miniature plastic package.

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.

1.2 Features and benefits

 Two low noise gain controlled amplifiers in a single package; both with a partly

integrated bias

 Superior cross modulation performance during AGC
 High forward transfer admittance
 High forward transfer admittance to input capacitance ratio

1.3 Applications

 Gain controlled low noise amplifiers for VHF and UHF applications running on a 5 V

supply voltage

 digital and an alog television tuners
 professional communication equipment

NXP Semiconductors

9

1.4 Quick reference data

Table 1. Quick reference data for amplifier A and B

Symbol Parameter Conditions Min Typ Max Unit

V

DS

I

D

P

tot

|y

fs

C

iss(G1)

C

rss

NF noise figure f = 400 MHz; Y

Xmod cross modulation input level for k = 1 % at

T

j

[1] Tsp is the temperature at the soldering point of the source lead.
[2] Calculated from S-parameters.
[3] Measured in Figure 17

Dual N-channel dual gate MOSFET

drain-source voltage DC - - 6 V
drain current DC - - 30 mA
total power dissipation Tsp≤ 107 °C

| forward transfer admittance f = 100 MHz; Tj=25°C;

ID=18mA
input capacitance at gate1 f = 100 MHz
reverse transfer capacitance f = 100 MHz

S=YS(opt)

f=800MHz; Y

40 dB AGC; f

=60MHz

f

unw

S=YS(opt)

=50MHz;

w

junction temperature - - 150 °C

test circuit.

[1]

--180mW
23 27 38 mS

[2]

-2.5- pF

[2]

-25- fF

-1.0- dB

-1.5- dB

[3]

105 107 - dBμV

BF1216

2. Pinning information

Table 2. Discrete pinning

Pin Description Simplified outline Graphic symbol

1 gate1 (amplifier A)
2gate2
3 gate1 (amplifier B)
4 drain (amplifier B)
5source
6 drain (amplifier A)

3. Ordering information

Table 3. Ordering information

Type number Package

BF1216 - plastic surface-mounted package; 6 leads SOT363

56

4

132

AMP A

G1A

G2

G1B

AMP B

sym11

Name Description Version

DA

S

DB

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Product data sheet Rev. 01 — 29 April 2010 2 of 17

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4. Marking

Table 4. Marking

Type number Marking Description

BF1216 M5p made in Hong Kong

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per MOSFET

V

DS

I

D

I

G1

I

G2

P

tot

T

stg

T

j

[1] Tsp is the temperature at the soldering point of the source lead.

BF1216

Dual N-channel dual gate MOSFET

M5t made in Malaysia
M5w made in China

drain-source voltage - 6 V
drain current DC - 30 mA
gate1 current - ±10 mA
gate2 current - ±10 mA
total power dissipation Tsp≤ 107 °C
storage temperature −65 +150 °C
junction temperature - 150 °C

[1]

-180mW

250

P

tot

(mW)

200

150

100

50

0

Fig 1. Power derating curve

0 20015050 100

001aac193

Tsp (˚C)

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Product data sheet Rev. 01 — 29 April 2010 3 of 17

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6. Thermal characteristics

BF1216

Dual N-channel dual gate MOSFET

Table 6. Thermal characteristics

Symbol Parameter Conditions Typ Unit

R

th(j-sp)

thermal resistance from junction to solder point 240 K/W

7. Static characteristics

Table 7. Static characteristics

Tj=25°C.

Symbol Parameter Conditions Min Typ Max Unit

Per MOSFET; unless otherwise specified

V

(BR)DSS

V

(BR)G1-SS

V

(BR)G2-SS

V

F(S-G1)

V

F(S-G2)

V

G1-S(th)

V

G2-S(th)

I

DS

I

G1-S

I

G2-S

drain-source breakdown voltage V

gate1-source breakdown voltage V
gate2-source breakdown voltage V
forward source-gate1 voltage V
forward source-gate2 voltage V
gate1-source threshold voltage VDS=5V; V
gate2-source threshold voltage VDS=5V; V
drain-source current V

gate1 cut-off current V

gate2 cut-off current V

G1-S=VG2-S

=0V; ID=10μA
amplifier A 6 - - V
amplifier B 6 - - V

G2-S=VDS
G1-S=VDS
G2-S=VDS
G1-S=VDS

G2-S

=0V; I
=0V; I
=0V; I
=0V; I

G2-S
G1-S

=4V
amplifier A; V
amplifier B; V

=0V; V

G2-S

amplifier A; V
amplifier B; V

=4V; V

G2-S

V

G1-S(A)=VG1-S(B)

DS(A)
DS(B)

DS(A)=VDS(B)

G1-S(A)
G1-S(B)

DS(A)=VDS(B)

=10mA 6 - 10 V

G1-S

=10mA 6 - 10 V

G2-S

=10mA 0.5 - 1.5 V

S-G1

=10mA 0.5 - 1.5 V

S-G2

=4V; ID=100μA0.3-1.0V
=5V; ID=100μA0.4-1.0V

[1]

=5V; R
=5V; R

=39kΩ --24mA

G1(A)

=39kΩ --24mA

G1(B)

=0V
=5V - - 50 nA
=5V - - 50 nA

=0V;

--20nA

=0V

[1] RG1 connects gate1 to VGG = 5 V; see Figure 17.

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Product data sheet Rev. 01 — 29 April 2010 4 of 17

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8. Dynamic characteristics

BF1216

Dual N-channel dual gate MOSFET

=25°C; V

amb

=4V; VDS=5V; ID=19mA.

G2-S

Table 8. Dynamic characteristics for amplifier A and B

Common source; T

Symbol Parameter Conditions Min Typ Max Unit

| forward transfer admittance f = 100 MHz; Tj=25°C; ID=18mA 23 27 38 mS

|y

fs

C

iss(G1)

C

iss(G2)

C

oss

C

rss

G

tr

input capacitance at gate1 f= 100 MHz
input capacitance at gate2 f= 100 MHz
output capacitance f = 100 MHz
reverse transfer capacitance f = 100 MHz
transducer power gain amplifier A; BS=B

S(opt)

; BL=B

L(opt)

[1]

-2.5- pF

[1]

-2.4- pF

[1]

-0.8- pF

[1]

-25- fF

[1]

f=200MHz; GS=2mS; GL=0.5mS - 34 - dB
f=400MHz; G
f=800MHz; G

amplifier B; B

=2mS; GL=1mS - 30 - dB

S

= 3.3 mS; GL=1mS - 26 - dB

S

S=BS(opt)

; BL=B

L(opt)

[1]

f=200MHz; GS=2mS; GL=0.5mS - 34 - dB
f=400MHz; G
f=800MHz; G

NF noise figure f = 11 MHz; G

f=400MHz; Y
f=800MHz; Y

Xmod cross modulation input level for k = 1 % at 40 dB AGC; f

f

=60MHz

unw

=2mS; GL=1mS - 30 - dB

S

= 3.3 mS; GL=1mS - 26 - dB

S

=20mS; BS=0 S - - 5 dB

S

S=YS(opt)
S=YS(opt)

=50MHz;

w

-1.0- dB

-1.5- dB

[2]

at 0 dB AGC 90 104 - dBμV
at 10 dB AGC - 100 - dBμV
at 20 dB AGC - 104 - dBμV
at 40 dB AGC 105 107 - dBμV

[1] Calculated from S-parameters.
[2] Measured in Figure 17

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Product data sheet Rev. 01 — 29 April 2010 5 of 17

test circuit.

NXP Semiconductors

001aal584

001aal585

8.1 Graphs for amplifiers A and B

BF1216

Dual N-channel dual gate MOSFET

30

I

D

(mA)

20

10

0

0642

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V
(8) V

(9) V
(10) V
(11) V
(12) V

V

=2.1V.

G1-S

=2.0V.

G1-S

=1.9V.

G1-S

=1.8V.

G1-S

=1.7V.

G1-S

=1.6V.

G1-S

=1.5V.

G1-S

=1.4V.

G1-S

=1.3V.

G1-S

=1.2V.

G1-S

=1.1V.

G1-S

=1.0V.

G1-S

=4V; Tj=25°C.

G2-S

(10)

(12)

VDS (V)

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(8)

(9)

(11)

I

D

(mA)

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

30

20

10

0

0 2.52.01.0 1.50.5

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S

=5V; Tj=25°C.

V

DS

=4.0V.
=3.5V.
=3.0V.
=2.5V.
=2.0V.
=1.5V.
=1.0V.

(1)
(2)
(3)
(4)

V

G1-S

(5)

(6)

(7)

(V)

Fig 2. Transfer characteristics; typical values Fig 3. Output characteristics; typical values

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Product data sheet Rev. 01 — 29 April 2010 6 of 17

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001aal586

001aal587

BF1216

Dual N-channel dual gate MOSFET

100

I

G1

(μA)

80

60

40

20

0

0 2.01.50.5 1.0

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

=4.0V.

G2-S

=3.5V.

G2-S

=3.0V.

G2-S

=2.5V.

G2-S

=2.0V.

G2-S

=1.5V.

G2-S

=1.0V.

G2-S

=5V; Tj=25°C.

V

DS

V

G1-S

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(V)

Fig 4. Gate1 current as a function of gate1 voltage;

typical values

30

(4)

ID (mA)

(1)
(2)
(3)

|Y

fs

(mS)

(1) V
(2) V
(3) V
(4) V
(5) V
(6) V
(7) V

|

20

10

0

0252010 155

G2-S
G2-S
G2-S
G2-S
G2-S
G2-S
G2-S

=5V; Tj=25°C.

V

DS

(5)

(6)

(7)

=4.0V.
=3.5V.
=3.0V.
=2.5V.
=2.0V.
=1.5V.
=1.0V.

Fig 5. Forward transfer admittance as a function of

drain current; typical values

16

I

D

(mA)

12

8

4

0

0604020

VDS=5V; V

=4V; Tj=25°C. VDS=5V; V

G2-S

001aal588

IG1 (μA)

Fig 6. Drain current as a function of gate1 current;

typical values

001aal589

VGG (V)

I

D

(mA)

20

15

10

5

0

054231

=4V; RG1=39kΩ; Tj=25°C.

G2-S

Fig 7. Drain current as a function of gate1 supply

voltage (V

); typical values

GG

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Product data sheet Rev. 01 — 29 April 2010 7 of 17

NXP Semiconductors

BF1216

Dual N-channel dual gate MOSFET

001aal590

(3)

(4)

(5)

VGG = GDS (V)

I

D

(mA)

30

20

10

0

054231

(1) (2)

(1) RG1=10kΩ.
(2) R
(3) R
(4) R
(5) R

=20kΩ.

G1

=40kΩ.

G1

=60kΩ.

G1

=80kΩ.

G1

=4V; Tj=25°C.

V

G2-S

Fig 8. Drain current as a function of VDS and VGG;

typical values

40

I

D

(mA)

30

20

10

0

054231

(1) V
(2) V
(3) V
(4) V
(5) V

=5.0V.

GG

=4.5V.

GG

=4.0V.

GG

=3.5V.

GG

=3.0V.

GG

=25°C; RG1=39kΩ (connected to VGG).

T

j

(4)

(5)

001aal591

(1)

(2)

(3)

V

(V)

G2-S

Fig 9. Drain current as a function of gate2 voltage;

typical values

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Product data sheet Rev. 01 — 29 April 2010 8 of 17

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001aal592

001aal593

BF1216

Dual N-channel dual gate MOSFET

0

gain

reduction

(dB)

10

20

30

40

50

04312

V

(V)

AGC

VDS=5V; VGG= 5 V; nominal ID=19mA; RG1=39kΩ;
f=50MHz; T

=25°C; see Figure 17.

j

Fig 10. Typical gain reduction as a function of the

AGC voltage; typical values

40

I

D

(mA)

30

120

Xmod

(dBμV)

110

100

90

80

0504020 3010

=5V; VGG= 5 V; nominal V

V

DS

f

=50MHz; f

w

T

=25°C; see Figure 17.

j

= 60 MHz; nominal ID=19mA;

unw

gain reduction (dB)

=4V; RG1=39kΩ;

G2-S

Fig 11. Unwanted voltage for 1 % cross modulation as

a function of gain reduction; typical values

001aal594

20

10

0

VDS=5V; VGG= 5 V; nominal V

0504020 3010

=4V; RG1=39kΩ; fw = 50 MHz; nominal ID=19mA; Tj=25°C; see Figure 17.

G2-S

gain reduction (dB)

Fig 12. Typical drain current as a function of gain reduction; typical values

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Product data sheet Rev. 01 — 29 April 2010 9 of 17

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001aal595

001aal596

BF1216

Dual N-channel dual gate MOSFET

2

10

gis, b

is

(mS)

10

b

is

1

g

2

10

=4V; V

is

DS(B)

f (MHz)

=0V; I

D(A)

3

=19mA;

−1

10

−2

10

10 10

V

=5V; V

DS(A)

G2-S

and vice versa.

Fig 13. Input admittance as a function of frequency;

typical values

001aal597

−10

3

ϕ

rs

(deg)

|Yrs|

(mS)

3

10

2

10

|Yfs|

(mS)

10

1

10 10

V

=5V; V

DS(A)

G2-S

|Yfs|

ϕ

2

10

=4V; V

fs

DS(B)

f (MHz)

=0V; I

D(A)

2

−10

ϕ

fs

(deg)

−10

−1

3

=19mA;

and vice versa.

Fig 14. Forward transfer admittance and phase as a

function of frequency; typical values

001aal598

b

, g

os

(mS)

10

os

ϕ

|Yrs|

2

10

=4V; V

rs

DS(B)

f (MHz)

=0V; I

D(A)

2

−10

−10

−1

3

=19mA;

2

10

10

1

10 10

V

=5V; V

DS(A)

G2-S

and vice versa.

Fig 15. Reverse transfer admittance and phase as a

function of frequency; typical values

1

−1

10

−2

10

10 10

V

=5V; V

DS(A)

G2-S

b

g

2

10

=4V; V

os

os

DS(B)

f (MHz)

=0V; I

D(A)

3

=19mA;

and vice versa.

Fig 16. Output admittance as a function of frequency;

typical values

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Product data sheet Rev. 01 — 29 April 2010 10 of 17

NXP Semiconductors

BF1216

Dual N-channel dual gate MOSFET

8.2 Scattering parameters for amplifiers A and B

Table 9. Scattering parameters for amplifiers A and B

V

=5V; V

DS(A)

f (MHz) s

G2-S

11

Magnitude
(ratio)

40 0.9910 −4.73 2.76 175.80 0.00074 99.46 0.9946 −1.29
100 0.9888 −9.07 2.75 171.94 0.00150 86.12 0.9941 −2.65
200 0.9853 −18.19 2.73 163.86 0.00292 79.56 0.9929 −5.31
300 0.9762 −27.09 2.69 155.90 0.00420 74.12 0.9916 −7.92
400 0.9656 −35.80 2.65 148.17 0.00540 69.71 0.9900 −10.49
500 0.9502 −44.45 2.59 140.50 0.00634 65.32 0.9882 −13.05
600 0.9331 −52.89 2.52 132.96 0.00709 61.01 0.9855 −15.66
700 0.9155 −61.08 2.45 125.69 0.00751 57.66 0.9830 −18.24
800 0.8966 −69.01 2.38 118.59 0.00782 54.58 0.9810 −20.75
900 0.8755 −76.72 2.30 111.71 0.00792 52.37 0.9798 −23.19
1000 0.8550 −84.10 2.22 105.07 0.00783 50.60 0.9785 −25.68

=4V; I

=19mA; V

D(A)

Angle
(degree)

=0V;V

DS(B)

s

21

Magnitude
(ratio)

G1-S(B)

Angle
(degree)

=0V; T

s
Magnitude

(ratio)

=25°C; Z0 = 50 Ω; typical values.

amb

12

Angle
(degree)

s
Magnitude

(ratio)

22

Angle
(degree)

8.3 Noise data for amplifiers A and B

Table 10. Noise data for amplifiers A and B

=5V; V

V

DS(A)

G2-S

f (MHz) NF

400 1.0 0.788 28.9 0.903
800 1.5 0.673 58.8 0.725

=4V; I

=19mA, T

D(A)

(dB) Γ

min

=25°C; typical values.

amb

opt

(ratio) (degree)

rn (ratio)

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Product data sheet Rev. 01 — 29 April 2010 11 of 17

NXP Semiconductors

6

9. Test information

R

GEN

50 Ω

R2
50 Ω

C2

4.7 nF

BF1216

Dual N-channel dual gate MOSFET

V

AGC

R1
10 kΩ

C1

C3

4.7 nF

L1
≈ 2.2 μH

C4

4.7 nF

R

L

50 Ω

R

4.7 nF

DUT

G1

V

V

I

GG

Fig 17. Cross modulation test setup for one MOSFET

V

DS

001aad92

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Product data sheet Rev. 01 — 29 April 2010 12 of 17

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3

BF1216

Dual N-channel dual gate MOSFET

10. Package outline

Plastic surface-mounted package; 6 leads SOT36

D

y

pin 1
index

132

e

1

e

E

AB

X

H

E

456

Q

A

A

1

b

p

wBM

detail X

L

p

v M

A

c

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

A

1

UNIT

A

1.1

mm

0.8

OUTLINE
VERSION

SOT363 SC-88

max

0.1

b

cD

p

0.30

0.20

IEC JEDEC JEITA

0.25

0.10

2.2

1.8

E

1.35

1.3

1.15

REFERENCES

e

e

0.65

H

L

Qywv

p

E

1

2.2

0.45

2.0

0.15

0.25

0.15

0.2 0.10.2

EUROPEAN

PROJECTION

ISSUE DATE

04-11-08
06-03-16

Fig 18. Package outline SOT363

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Product data sheet Rev. 01 — 29 April 2010 13 of 17

NXP Semiconductors

BF1216

Dual N-channel dual gate MOSFET

11. Abbreviations

Table 11. Abbreviations

Acronym Description

AGC Automatic Gain Control
MOSFET Metal-Oxide Semiconductor Field-Effect Transistor
UHF Ultra High Frequency
VHF Very High Frequency

12. Revision history

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BF1216_1 20100429 Product data sheet - -

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Product data sheet Rev. 01 — 29 April 2010 14 of 17

NXP Semiconductors

BF1216

Dual N-channel dual gate MOSFET

13. Legal information

13.1 Data sheet status

Document status

Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this docu ment may have changed si nce this docum ent was pub lished and may dif fer in case of multiple devices. The latest product statu s

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

13.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied u pon to co nt ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.

13.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.

In no event shall NXP Semiconductors be lia ble for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or

BF1216_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

malfunction of an NXP Semiconductors product can reasonabl y be expected
to result in personal injury, death or severe property or environment al
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred t o as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell product s that is ope n for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteri stics sections of this
document, and as such is not complete, exhaustive or legally binding.

Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is au tomotive qualified,
the product is not suitable for automotive use . It is neit her qua lifi ed nor t ested
in accordance with automotive testing or application requirement s. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.

, unless otherwise

Product data sheet Rev. 01 — 29 April 2010 15 of 17

NXP Semiconductors

BF1216

Dual N-channel dual gate MOSFET

In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, da mages or failed produ ct cl aims resulting from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.

13.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks
are the property of their respective owners.

14. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

BF1216_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Product data sheet Rev. 01 — 29 April 2010 16 of 17

NXP Semiconductors

15. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 2

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4

7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

8 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

8.1 Graphs for amplifiers A and B . . . . . . . . . . . . . 6

8.2 Scattering parameters for amplifiers A and B. 11

8.3 Noise data for amplifiers A and B. . . . . . . . . . 11

9 Te st information. . . . . . . . . . . . . . . . . . . . . . . . 12

10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13

11 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14

12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14

13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15

13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15

13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16

14 Contact information. . . . . . . . . . . . . . . . . . . . . 16

15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

BF1216

Dual N-channel dual gate MOSFET

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]

Date of release: 29 April 2010

Document identifier: BF1216_1