Philips 74HCT4538U, 74HCT4538N, 74HCT4538DB, 74HCT4538D, 74HC4538DB Datasheet

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DATA SH EET
Product specification File under Integrated Circuits, IC06
September 1993
INTEGRATED CIRCUITS
74HC/HCT4538
Dual retriggerable precision monostable multivibrator
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
September 1993 2
Philips Semiconductors Product specification
Dual retriggerable precision monostable multivibrator
74HC/HCT4538
FEA TURES
Separate reset inputs
Triggering from leading or trailing edge
Output capability: standard
ICC category: MSI
Power-on reset on-chip
GENERAL DESCRIPTION
The 74HC/HCT4538 are high-speed Si-gate CMOS devices and are pin compatible with “4538” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4538 are dual retriggerable-resettable monostable multivibrators. Each multivibrator has an active LOW trigger/retrigger input (n
A0), an active HIGH
trigger/retrigger input (nA1) , an overriding active LOW direct reset input (nRD), an output (nQ) and its complement (nQ), and two pins (nCTCand nRCTC) for connecting the external timing components Ctand Rt. Typical pulse width variation over temperature range is ± 0.2%.
The “4538” may be triggered by either the positive or the negative edges of the input pulse. The duration and accuracy of the output pulse are determined by the external timing components Ctand Rt. The output pulse width (T) is equal to 0.7 × Rt× Ct. The linear design techniques guarantee precise control of the output pulse width.
A LOW level at nRDterminates the output pulse immediately.
Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; tr= tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PDin µW):
PD= CPD× V
CC
2
× fi+∑(CV
CC
2
× fo) +
+ 0.48 × C
EXT
× V
CC
2
× fo+ D × 0.8 × VCCwhere: fi= input frequency in MHz fo= output frequency in MHz (CV
CC
2
× fo) = sum of outputs CL= output load capacitance in pF VCC= supply voltage in V D = duty factor in % C
EXT
= timing capacitance in pF
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay nA0,nA1to nQ, nQC
L
= 15 pF; VCC= 5 V 27 30 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per multivibrator notes 1 and 2 136 138 pF
September 1993 3
Philips Semiconductors Product specification
Dual retriggerable precision monostable multivibrator
74HC/HCT4538
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 15 1C
TC
,2C
TC
external capacitor connections
2, 14 1RC
TC
, 2RC
TC
external resistor/capacitor connections
3, 13 1
RD,2R
D
direct reset inputs (active LOW)
4, 12 1A
1
,2A
1
trigger inputs (LOW-to-HIGH, edge-triggered)
5, 11 1
A0,2A
0
trigger inputs (HIGH-to-LOW, edge-triggered) 6, 10 1Q, 2Q pulse outputs 7, 9 1
Q, 2Q complementary pulse outputs 8 GND ground (0 V) 16 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
September 1993 4
Philips Semiconductors Product specification
Dual retriggerable precision monostable multivibrator
74HC/HCT4538
Fig.4 Functional diagram.
Fig.5 Connection of the external timing
components Rtand Ct.
(1) Connect CTC(pins 1 and 15) to GND (pin 8).
FUNCTION TABLE
Notes
1. H = HIGH voltage level L = LOW voltage level X = don’t care
= LOW-to-HIGH transition= HIGH-to-LOW transition
= one HIGH level output pulse = one LOW level output pulse
INPUTS OUTPUTS
nA
0
nA
1
nR
D
nQ nQ
LH
H↑H
XXL LH
Fig.6 Timing diagram.
(1) Positive edge triggering. (2) Positive edge retriggering (pulse
lengthening). (3) Negative edge triggering. (4) Reset (pulse shortening). (5) V
ref1
and V
ref2
are internal reference voltages.
(6) T = 0.7 × Rt× Ct(see also Fig.5).
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