Philips 74HCT4067U, 74HCT4067N3, 74HCT4067N, 74HCT4067DB, 74HCT4067D Datasheet
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DATA SH EET
Product specification
File under Integrated Circuits, IC06
September 1993
INTEGRATED CIRCUITS
74HC/HCT4067
16-channel analog
multiplexer/demultiplexer
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
September 1993 2
Philips Semiconductors Product specification
16-channel analog
multiplexer/demultiplexer
74HC/HCT4067
FEATURES
• Low “ON” resistance:
80 Ω (typ.) at VCC= 4.5 V
70 Ω (typ.) at VCC= 6.0 V
60 Ω (typ.) at VCC= 9.0 V
typical “break before make” built-in
• Output capability: non-standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4067 are high-speed Si-gate CMOS
devices and are pin compatible with the “4067” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4067 are 16-channel analog
multiplexers/demultiplexers with four address inputs (S
0
to
S3) , an active LOW enable input (E), sixteen independent
inputs/outputs (Y0to Y15) and a common input/output (Z).
The ”4067” contains sixteen bidirectional analog switches,
each with one side connected to an independent
input/output (Y0to Y15) and the other side connected to a
common input/output (Z).
With E LOW, one of the sixteen switches is selected (low
impedance ON-state) by S0to S3. All unselected switches
are in the high impedance OFF-state. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S0to S3.
The analog inputs/outputs (Y0to Y15, and Z) can swing
between VCCas a positive limit and GND as a negative
limit. VCCto GND may not exceed 10 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; tr= tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PDin µW):
PD= CPD× V
CC
2
× fi+∑{(CL+ CS) × V
CC
2
× fo} where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ {(CL+ CS) × V
CC
2
× fo} = sum of outputs
CL= output load capacitance in pF
CS= max. switch capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PZL
/ t
PZH
turn-on time CL= 15 pF; RL=1 kΩ; VCC= 5 V
E to V
os
26 32 ns
S
n
to V
os
29 33 ns
t
PLZ
/ t
PHZ
turn-off time
E to V
os
27 26 ns
S
n
to V
os
29 30 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per switch notes 1 and 2 29 29 pF
C
S
max. switch capacitance
independent (Y) 5 5 pF
common (Z) 45 45 pF
September 1993 3
Philips Semiconductors Product specification
16-channel analog
multiplexer/demultiplexer
74HC/HCT4067
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1 Z common input/output
9, 8, 7, 6, 5, 4, 3, 2, 23, 22, 21, 20, 19, 18, 17, 16 Y
0
to Y
15
independent inputs/outputs
10, 11, 14, 13 S
0
to S
3
address inputs
12 GND ground (0 V)
15
E enable input (active LOW)
24 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
September 1993 4
Philips Semiconductors Product specification
16-channel analog
multiplexer/demultiplexer
74HC/HCT4067
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
INPUTS CHANNEL
ON
ES
3
S
2
S
1
S
0
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
Y
0
−Z
Y
1
−Z
Y
2
−Z
Y
3
−Z
L
L
L
L
L
L
L
L
H
H
H
H
L
L
H
H
L
H
L
H
Y
4
−Z
Y
5
−Z
Y
6
−Z
Y
7
−Z
L
L
L
L
H
H
H
H
L
L
L
L
L
L
H
H
L
H
L
H
Y
8
−Z
Y
9
−Z
Y10− Z
Y11− Z
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
H
L
H
L
H
Y
12
− Z
Y13− Z
Y14− Z
Y15− Z
H X X X X none
September 1993 5
Philips Semiconductors Product specification
16-channel analog
multiplexer/demultiplexer
74HC/HCT4067
Fig.6 Logic diagram.
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