Philips 74hc4049 DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC4049
Hex inverting high-to-low level shifter
Product specification File under Integrated Circuits, IC06
December 1990
Philips Semiconductors Product specification
Hex inverting high-to-low level shifter 74HC4049

FEATURES

Output capability: standard
ICC category: SSI
This feature enables the inverting buffers to be used as logic level translators, which will convert high level logic to low level logic, while operating from a low voltage power supply. For example 15 V logic (“4000B series”) can be converted down to 2 V logic.

GENERAL DESCRIPTION

The 74HC4049 is a high-speed Si-gate CMOS device and is pin compatible with the “4049” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A.
The 74HC4049 provides six inverting buffers with a modified input protection structure, which has no diode connected to V
. Input voltages of up to 15 V may
CC
The actual input switch level remains related to the V and is the same as mentioned in the family characteristics. At the same time each part can be used as a simple inverter without level translation.

APPLICATIONS

Converting 15 V logic (“4000B” series) down to 2 V logic.
therefore be used.

QUICK REFERENCE DATA

GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/tPLH
C
I
C
PD
propagation delay nA to nYC input capacitance 3.5 pF power dissipation capacitance per buffer note 1 14 pF
= 15 pF; VCC= 5 V 8 ns
L
CC
TYPICAL
UNIT
HC
Note
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz fo= output frequency in MHz CL= output load capacitance in pF VCC= supply voltage in V (C V
2
× fo) = sum of outputs
CC

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package Information”
See
.
December 1990 2
Philips Semiconductors Product specification
Hex inverting high-to-low level shifter 74HC4049

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION
1V 2, 4, 6, 10, 12, 15 1 3, 5, 7, 9, 11, 14 1A to 6A data inputs 8 GND ground (0 V) 13, 16 n.c. not connected
CC
Y to 6Y data outputs
positive supply voltage
Fig.1 Pin configuration.
December 1990 3
Fig.2 Logic symbol. Fig.3 IEC logic symbol.
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