INTEGRATED CIRCUITS
74ABT620
Octal transceiver with dual enable, inverting (3-State)
Product specification |
1993 Jun 21 |
IC23 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Octal transceiver with dual enable, inverting
74ABT620
(3-State)
FEATURES
•Octal bidirectional bus interface
•3-State buffers
•Power-up 3-State
•Live insertion/extraction permitted
•Output capability: +64mA/±32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
DESCRIPTION
The 74ABT620 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT620 device is an octal transceiver featuring inverting
3-State bus compatible outputs in both send and receive directions.
The 74ABT620 is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing. This device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the Enable inputs (OEBA and OEAB). The Enable inputs can be used to disable the device so that the buses are effectively isolated.
QUICK REFERENCE DATA
SYMBOL |
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PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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Tamb = 25°C; GND = 0V |
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tPLH |
Propagation delay |
CL = 50pF; VCC = 5V |
3.1 |
ns |
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tPHL |
An to Bn or Bn to An |
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CIN |
Input capacitance |
VI = 0V or VCC |
4 |
pF |
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OEAB, |
OEBA |
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CI/O |
I/O capacitance |
Outputs disabled; VO = 0V or VCC |
7 |
pF |
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ICCZ |
Total supply current |
Outputs disabled; VCC = 5.5V |
50 |
μA |
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ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
DWG NUMBER |
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20-Pin Plastic DIP |
±40°C to +85°C |
74ABT620 N |
74ABT620 N |
SOT146-1 |
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20-Pin plastic SO |
±40°C to +85°C |
74ABT620 D |
74ABT620 D |
SOT163-1 |
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20-Pin Plastic SSOP Type II |
±40°C to +85°C |
74ABT620 DB |
74ABT620 DB |
SOT339-1 |
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20-Pin Plastic TSSOP Type I |
±40°C to +85°C |
74ABT620 PW |
74ABT620PW DH |
SOT360-1 |
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PIN CONFIGURATION |
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PIN DESCRIPTION |
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PIN NUMBER |
SYMBOL |
NAME AND FUNCTION |
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1 |
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OEAB |
Output enable input, A side to B side |
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(active-High) |
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OEAB |
1 |
20 |
VCC |
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2, 3, 4, 5, |
A0 ± A7 |
Data inputs/outputs (A side) |
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6, 7, 8, 9 |
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A0 |
2 |
19 |
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OEBA |
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18, 17, 16, 15, |
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A1 |
3 |
18 |
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B0 |
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B0 ± B7 |
Data inputs/outputs (B side) |
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14, 13, 12, 11 |
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A2 |
4 |
17 |
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B1 |
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Output enable input, B side to A side |
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A3 |
5 |
16 |
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B2 |
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19 |
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OEBA |
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(active-Low) |
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A4 |
6 |
15 |
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B3 |
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10 |
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GND |
Ground (0V) |
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A5 |
7 |
14 |
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B4 |
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A6 |
8 |
13 |
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B5 |
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20 |
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VCC |
Positive supply voltage |
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A7 |
9 |
12 |
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B6 |
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GND |
10 |
11 |
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B7 |
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SA00189 |
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1993 Jun 21 |
2 |
853±1611 10081 |
Philips Semiconductors |
Product specification |
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Octal transceiver with dual enable, inverting
74ABT620
(3-State)
LOGIC SYMBOL |
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LOGIC SYMBOL (IEEE/IEC) |
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1 |
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19 |
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OEAB |
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OEBA |
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1 |
EN1 |
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2 |
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A0 |
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18 |
19 |
EN1 |
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3 |
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B0 |
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A1 |
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18 |
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17 |
2 |
1 |
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4 |
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B1 |
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A2 |
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2 |
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16 |
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5 |
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B2 |
3 |
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17 |
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A3 |
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15 |
4 |
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16 |
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6 |
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B3 |
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A4 |
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14 |
5 |
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15 |
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7 |
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B4 |
6 |
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14 |
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A5 |
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13 |
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13 |
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8 |
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B5 |
7 |
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A6 |
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8 |
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12 |
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12 |
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9 |
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B6 |
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11 |
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9 |
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A7 |
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11 |
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B7 |
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SA00191 |
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SA00190 |
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FUNCTION TABLE |
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INPUTS |
INPUTS/OUTPUTS |
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OEBA |
OEAB |
An |
Bn |
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L |
L |
Bn |
Inputs |
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H |
H |
Inputs |
An |
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H |
L |
Z |
Z |
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Bn |
Inputs |
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L |
H |
or |
An |
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Inputs |
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H = High voltage level |
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L = Low voltage level |
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Z = High impedance ºoffº state |
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ABSOLUTE MAXIMUM RATINGS1, 2 |
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SYMBOL |
PARAMETER |
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CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +7.0 |
V |
IIK |
DC input diode current |
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VI < 0 |
±18 |
mA |
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VI |
DC input voltage3 |
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±1.2 to +7.0 |
V |
IOK |
DC output diode current |
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VO < 0 |
±50 |
mA |
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V |
DC output voltage3 |
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output in Off or High state |
±0.5 to +5.5 |
V |
OUT |
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IOUT |
DC output current |
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output in Low state |
128 |
mA |
Tstg |
Storage temperature range |
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±65 to 150 |
°C |
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NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1993 Jun 21 |
3 |
Philips Semiconductors |
Product specification |
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Octal transceiver with dual enable, inverting
74ABT620
(3-State)
RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
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LIMITS |
UNIT |
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Min |
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Max |
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VCC |
DC supply voltage |
4.5 |
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5.5 |
V |
VI |
Input voltage |
0 |
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VCC |
V |
VIH |
High-level input voltage |
2.0 |
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V |
VIL |
Low-level Input voltage |
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0.8 |
V |
IOH |
High-level output current |
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±32 |
mA |
IOL |
Low-level output current |
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64 |
mA |
t/ v |
Input transition rise or fall rate |
0 |
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5 |
ns/V |
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Tamb |
Operating free-air temperature range |
±40 |
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+85 |
°C |
DC ELECTRICAL CHARACTERISTICS
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LIMITS |
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SYMBOL |
PARAMETER |
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TEST CONDITIONS |
Tamb = +25°C |
Tamb = ±40°C |
UNIT |
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to +85°C |
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Min |
Typ |
Max |
Min |
Max |
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VIK |
Input clamp voltage |
VCC = 4.5V; IIK = ±18mA |
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±0.9 |
±1.2 |
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±1.2 |
V |
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VCC = 4.5V; IOH = ±3mA; VI = VIL or VIH |
2.5 |
2.9 |
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2.5 |
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V |
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VOH |
High-level output voltage |
VCC = 5.0V; IOH = ±3mA; VI = VIL or VIH |
3.0 |
3.4 |
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3.0 |
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V |
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VCC = 4.5V; IOH = ±32mA; VI = VIL or VIH |
2.0 |
2.4 |
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2.0 |
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V |
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VOL |
Low-level output voltage |
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH |
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0.42 |
0.55 |
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0.55 |
V |
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II |
Input leakage |
Control pins |
VCC = 5.5V; VI = GND or 5.5V |
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±0.01 |
±1.0 |
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±1.0 |
μA |
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current |
Data pins |
VCC = 5.5V; VI = GND or 5.5V |
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±5 |
±100 |
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±100 |
μA |
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IOFF |
Power-off leakage current |
VCC = 0.0V; VO or VI ≤ 4.5V |
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±5.0 |
±100 |
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±100 |
μA |
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IPU/IPD |
Power-up/down 3-State |
VCC = 2.1V; VO = 0.5V; VI = GND or VCC; |
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±5.0 |
±50 |
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±50 |
μA |
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output current3 |
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V |
and V |
OE |
= Don't care |
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OE |
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IIH + IOZH |
3-State output High current |
VCC = 5.5V; VO = 2.7V; VI = VIL or VIH |
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5.0 |
50 |
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50 |
μA |
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IIL + IOZL |
3-State output Low current |
VCC = 5.5V; VO = 0.5V; VI = VIL or VIH |
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±5.0 |
±50 |
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±50 |
μA |
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ICEX |
Output High leakage current |
VCC = 5.5V; VO = 5.5V; VI = GND or VCC |
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5.0 |
50 |
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50 |
μA |
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I |
Output current1 |
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V |
= 5.5V; V = 2.5V |
±50 |
±100 |
±180 |
±50 |
±180 |
mA |
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O |
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CC |
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O |
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ICCH |
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VCC = 5.5V; Outputs High, VI = GND or VCC |
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50 |
250 |
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250 |
μA |
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ICCL |
Quiescent supply current |
VCC = 5.5V; Outputs Low, VI = GND or VCC |
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24 |
30 |
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30 |
mA |
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ICCZ |
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VCC = 5.5V; Outputs 3-State; |
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50 |
250 |
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250 |
μA |
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VI = GND or VCC |
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ICC |
Additional supply current per |
VCC = 5.5V; one input at 3.4V, |
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0.05 |
1.5 |
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1.5 |
mA |
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input pin2 |
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other inputs at VCC or GND |
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NOTES:
1.Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2.This is the increase in supply current for each input at 3.4V.
3.This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100μsec is permitted.
1993 Jun 21 |
4 |
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