Philips 74ABT574APW, 74ABT574AN, 74ABT574ADB, 74ABT574AD Datasheet

INTEGRATED CIRCUITS

74ABT574A

Octal D-type flip-flop (3-State)

Product specification 1995 May 22
IC23 Data Handbook




Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

FEA TURES

•74ABT574A is flow-through pinout version of 74ABT374

•Inputs and outputs on opposite side of package allow easy

interface to microprocessors

•3-State outputs for bus interfacing

•Power-up 3-State

•Power-up reset

•Common output enable

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

•Live insertion/extraction permitted.

QUICK REFERENCE DATA

SYMBOL PARAMETER

C

t

PLH

t

PHL

C

OUT

I

CCZ

IN

Propagation delay
CP to Qn

Input capacitance VI = 0V or V
Output capacitance Outputs disabled; VO = 0V or V
Total supply current Outputs disabled; VCC =5.5V

DESCRIPTION

The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.

When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.

The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE
independent of the clock operation.

CONDITIONS
= 25°C; GND = 0V

T

amb

CL = 50pF; VCC = 5V

CC

) control

is Low, the stored data appears at the outputs. When OE

) controls all eight 3-State buffers

TYPICAL UNIT

3.0

3.4

ns

3 pF

CC

6 pF

100

µA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

20-Pin Plastic DIP –40°C to +85°C 74ABT574A N 74ABT574A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT574A D 74ABT574A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT574A DB 74ABT574A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT574A PW 7ABT574APW DH SOT360-1

PIN CONFIGURATION

1OE

D0

2

D1

3

D2

4

D3

5

D4

6

D5

7

D6

8

D7

9

GND

10 11

V

20

CC

19

Q0

18

Q1

17

Q2

16

Q3

15

Q4

14

Q5

13

Q6

12

Q7
CP

SA00103

PIN DESCRIPTION

PIN

NUMBER

1 OE Output enable input (active-Low)

2, 3, 4, 5,

6, 7, 8, 9

19, 18, 17,
16, 15, 14,

13, 12

11 CP Clock pulse input (active rising edge)
10 GND Ground (0V)
20 V

SYMBOL FUNCTION

D0-D7 Data inputs

Q0-Q7 Data outputs

Positive supply voltage

CC

1995 May 22 853-1509 15261

2

Philips Semiconductors Product specification

INTERNAL

OPERATING

74ABT574AOctal D-type flip-flop (3-State)

LOGIC SYMBOL

23456789

D0 D1 D2 D3 D4 D5 D6 D7

11

CP

1

OE

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

19 18 17 16 15 14 13 12

LOGIC SYMBOL (IEEE/IEC)

1

EN

11

C1

2

2D

3

4

5

6

7

8

9

FUNCTION TABLE

INPUTS

OE CP Dn

LL↑

↑lh

INTERNAL
REGISTER

L

H

L ↑ X NC NC Hold

HH↑↑X

Dn

NC

Dn

H = High voltage level
h = High voltage level one set-up time prior to the Low–to–High

clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low–to–High

clock transition
NC= No change
X = Don’t care

SA00104

1

19

18

17

16

15

14

13

12

Z = High impedance “off” state
↑ = Low-to-High clock transition

= not a Low-to-High clock transition

↑

OUTPUTS

Q0 – Q7

L

H

Z
Z

OPERATING

MODE

Load and read
register

Disable outputs

LOGIC DIAGRAM

D0

23456789

11

CP

1

OE

1995 May 22

SA00105

D1

D

CP Q

Q0

D

CP Q

19 18 17 16 15 14 13 12

D2

D

CP Q

Q1 Q2 Q3 Q4 Q5 Q6 Q7

D3

D

CP Q

D4

D

CP Q

D5

D

CP Q

D6

D

CP Q

3

D7

D

CP Q

SA00106

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

74ABT574AOctal D-type flip-flop (3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

Min Max

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 5 ns/V

T

amb

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

CC

V

1995 May 22

4