Philips 74ABT534PW, 74ABT534N, 74ABT534DB, 74ABT534D, 74ABT534AN Datasheet

INTEGRATED CIRCUITS

74ABT534A

Octal D-type flip-flop, inverting (3-State)

Product specification

1997 Feb 03

IC23 Data Handbook

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Philips Semiconductors	Product specification
Octal D-type flip-flop, inverting (3-State)	74ABT534A

FEATURES

•8-bit positive edge triggered register

•3-State output buffers

•Output capability: +64mA/±32mA

•Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model

•Power-up 3-State

QUICK REFERENCE DATA

DESCRIPTION

The 74ABT534A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT534A is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates.

The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's output.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation.

When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance ªOFFº state, which means they will neither drive nor load the bus.

	SYMBOL			PARAMETER	CONDITIONS	TYPICAL	UNIT
					Tamb = 25°C; GND = 0V
	tPLH	Propagation delay			CL = 50pF; VCC = 5V	3.3	ns
	tPHL	CP to Qn				3.6
	CIN	Input capacitance			VI = 0V or VCC	3.5	pF
	COUT	Output capacitance			Outputs disabled; VO = 0V or VCC	6.5	pF
	ICCZ	Total supply current			Outputs disabled; VCC =5.5V	100	μA

ORDERING INFORMATION

PACKAGES	TEMPERATURE RANGE	OUTSIDE NORTH AMERICA	NORTH AMERICA	DWG NUMBER
20-Pin Plastic DIP	±40°C to +85°C	74ABT534A N	74ABT534A N	SOT146-1
20-Pin plastic SO	±40°C to +85°C	74ABT534A D	74ABT534A D	SOT163-1
20-Pin Plastic SSOP Type II	±40°C to +85°C	74ABT534A DB	74ABT534A DB	SOT339-1
20-Pin Plastic TSSOP Type I	±40°C to +85°C	74ABT534A PW	74ABT534APW DH	SOT360-1

PIN CONFIGURATION														PIN DESCRIPTION
														PIN NUMBER	SYMBOL						FUNCTION
														1							Output enable input (active-Low)
																	OE
OE				1				20		VCC
														3, 4, 7, 8,
	Q0			2				19		Q7				13, 14, 17, 18		D0-D7					Data inputs
	D0			3				18	D7					2, 5, 6, 9,
															Q0-Q7						Inverting 3-State outputs
	D1			4				17	D6					12, 15, 16, 19
																					Clock pulse input
	Q1			5				16		Q6				11			CP
																					(active rising edge)
	Q2			6				15		Q5
														10		GND					Ground (0V)
	D2			7				14	D5
														20		VCC					Positive supply voltage
	D3			8				13	D4
	Q3			9				12		Q4
GND									CP
				10				11
												SA00161

1997 Feb 03

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853-1910 17722

Philips Semiconductors	Product specification
Octal D-type flip-flop, inverting (3-State)	74ABT534A

LOGIC SYMBOL

LOGIC SYMBOL (IEEE/IEC)

										1	EN
	3	4	7	8	13	14	17	18		11	C1
	D0	D1	D2	D3	D4	D5	D6	D7		3	2
											1D
11	CP									4	5
										7	6
1	OE									8
											9
	Q0	Q1	Q2	Q3	Q4	Q5	Q6	Q7		13	12
	2	5	6	9	12	15	16	19		14	15
										17	16
									SA00162	18	19

SA00163

FUNCTION TABLE

INPUTS

INTERNAL

OUTPUTS

OPERATING

MODE

CP

Dn

REGISTER

OE

Q0 ± Q7

L

↑

l

L

H

Latch and read

L

↑

h

H

L

register

L

↑

X

NC

NC

Hold

H

↑

X

NC

Z

Disable

H

↑

Dn

Dn

Z

outputs

H	=	High voltage level
h	=	High voltage level one set-up time prior to the Low-to-High
		clock transition
L	=	Low voltage level
l	=	Low voltage level one set-up time prior to the Low-to-High
		clock transition
NC=		No change
X	=	Don't care
Z	=	High impedance ªoffº state

↑= Low-to-High clock transition

↑= not a Low-to-High clock transition

LOGIC DIAGRAM

D0

D1

D2

D3

D4

D5

D6

D7

3

4

7

8

13

14

17

18

D

D

D

D

D

D

D

D

CP

Q

CP

Q

CP

Q

CP

Q

CP

Q

CP

Q

CP

Q

CP

Q

11

CP

1

OE

2

5

6

9

12

15

16

19

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

SA00164

1997 Feb 03

3

Philips Semiconductors	Product specification
Octal D-type flip-flop, inverting (3-State)	74ABT534A

ABSOLUTE MAXIMUM RATINGS1, 2

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		±0.5 to +7.0	V
IIK	DC input diode current	VI < 0	±18	mA
V	DC input voltage3		±1.2 to +7.0	V
I
IOK	DC output diode current	VO < 0	±50	mA
V	DC output voltage3	output in Off or High state	±0.5 to +5.5	V
OUT
IOUT	DC output current	output in Low state	128	mA
Tstg	Storage temperature range		±65 to 150	°C

NOTES:

1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL	PARAMETER		LIMITS		UNIT
		Min		Max
VCC	DC supply voltage	4.5		5.5	V
VI	Input voltage	0		VCC	V
VIH	High-level input voltage	2.0			V
VIL	Low-level Input voltage			0.8	V
IOH	High-level output current			±32	mA
IOL	Low-level output current			64	mA
t/ v	Input transition rise or fall rate	0		5	ns/V
Tamb	Operating free-air temperature range	±40		+85	°C

1997 Feb 03

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