Philips 32PFL3614/60 Schematic

Colour Television Chassis

18400_000_090301.eps

090301

TPM3.1E

LA

Contents Page Contents Page

1. Revision List 2

2. Technical Specifications, Connections, and Chassis
Overview 2

3. Precautions, Notes, and Abbreviation List 5

4. Mechanical Instructions 9

5. Service Modes, Error Codes, and Fault Finding 13

6. Alignments 16

7. Circuit Descriptions 18

8. IC Data Sheets 22

9. Block Diagrams
Wiring diagram 32PFL54xx AUO Panel 31
Wiring diagram 32PFL54xx LGD Panel 32
Wiring diagram x2PFL56xx 33
Block diagram Video 34
Block diagram Audio 35
Block diagram Functional diagram 36
Block Diagram Power diagram 37

10. Circuit Diagrams and PWB Layouts Drawing PWB
Power Board Inverter, 32PFL54xx AUO panel
Power Board Adapter, 32PFL54xx LGD panel(A02)39 40-41
Power Board Inverter, 32PFL54xx LGD panel(A01)42 43-44
Power Board Adapter, 32PFL56xx (A01) 45 47-48
Power Board Inverter, 32PFL56xx (A02) 46 47-48
Power Board Adapter, 42PFL56xx (A01) 49 51-52
Power Board Inverter, 42PFL56xx (A02) 50 51-52
SSB: VGA input 32PFL54xx (B01) 53 71-80
SSB: Rear I/O (B02) 54 71-80
SSB: SCART (B03) 55 71-80
SSB: Side I/O (B04) 56 71-80
SSB: CVBS, Audio out (B05) 57 71-80
SSB: Tuner (B06) 58 71-80
SSB: HDMI Input (B07) 59 71-80
SSB: HDMI ESD protection (B08) 60 71-80
SSB: Stand-by MCU (B09) 61 71-80

©

Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

(A01)38 40-41

SSB: Scaler (B10) 62 71-80
SSB: DDR1 Memory (B11)63 71-80
SSB: Panel Interface (B12) 64 71-80
SSB: iTV Interface and AOC Hotel (B13)65 71-80
SSB: Keyboard, IR & ComPair interface (B14) 66 71-80
SSB: Audio Switch (B15) 67 71-80
SSB: Audio Preamplifier (B16 68 71-80
SSB: Audio Amplifier (B17) 69 71-80
SSB: DC-DC Power (B18) 70 71-80
IR Board (J) 81 82
Keyboard control panel (E) 83 84

Published by QM/JY 0966 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 18400

2009-Jun-26

EN 2 TPM3.1E LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

2. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:

2.1

Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.

Table 2-1 Described Model Numbers:

Model Number Styling Published in

32PFL5404/12

P&S 3122 785 1840032PFL5404/60

42PFL5604/60

Note: The given Model Numbers are subject to change.

2.2 Directions for Use

Directions for use can be downloaded from the following
websites:

http://www.philips.com/support
http://www.p4c.philips.com

2009-Jun-26

Technical Specifications, Connections, and Chassis Overview

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SERV.U

HDMI 2/ DVI
VGA

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3

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8

9

10

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2.3 Connections

EN 3TPM3.1E LA 2.

Note: The following connector colour abbreviations are used:

Bk = Black, Bu = Blue, Gn = Green, Gy = Grey, Rd = Red,
Wh = White, Ye = Yellow.

2.3.1 Side Connections

1 - USB2.0

Figure 2-1 Connection overview

1-+5V k
2 - Data (-) jk
3 - Data (+) jk
4 - Ground Gnd H

2 - Head phone (Output)

Bk - Head phone 32 - 600 Ω / 10 mW ot

Figure 2-2 USB (type A)

3 - Cinch: Audio - In

Rd - Audio R 0.5 V
Wh - Audio L 0.5 V

4 - Cinch: Video CVBS - In, Audio - In

Ye - Video CVBS 1 V

/ 10 kΩ jq

RMS

/ 10 kΩ jq

RMS

/ 75 Ω jq

PP

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Technical Specifications, Connections, and Chassis Overview

5 - S-Video (Hosiden): Video Y/C - In

1 - Ground Y Gnd H
2 - Ground C Gnd H
3 - Video Y 1 V
4 - Video C 0.3 V

/ 75 Ω j

PP

/ 75 Ω j

PP

6 - HDMI: Digital Video, Digital Audio - In

Figure 2-3 HDMI (type A) connector

1 - D2+ Data channel j
2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - Easylink Control channel jk
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H

2.3.2 Rear Connections

7 - VGA: Video RGB - In

Figure 2-4 VGA Connector

1 - Video Red 0.7 V
2 - Video Green 0.7 V
3 - Video Blue 0.7 V
4-n.c.

/ 75 Ω j

PP

/ 75 Ω j

PP

/ 75 Ω j

PP

5 - Ground Gnd H
6 - Ground Red Gnd H
7 - Ground Green Gnd H
8 - Ground Blue Gnd H
9-+5V
10 - Ground Sync Gnd H

+5 V j

DC

11 - n.c.
12 - DDC_SDA DDC data j
13 - H-sync 0 - 5 V j
14 - V-sync 0 - 5 V j
15 - DDC_SCL DDC clock j

- VGA Audio - In

Bk - VGA Audio 32 - 600 Ω / 10 mW j

8 - HDMI 1/2: Digital Video, Digital Audio - In

See 6 - HDMI: Digital Video, Digital Audio - In

.

9 - Aerial - In

- - IEC-type (EU) Coax, 75 Ω D

10 - Cinch: S/PDIF - Out

Bk - Coaxial 0.4 - 0.6V

/ 75 Ω kq

PP

11 - EXT1 - 2: Video RGB/YC - In, CVBS - In/Out, Audio -In/ Out

20

21

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2

1

090121

Figure 2-5 SCART connector

1-n.c.
2 - Audio R 0.5 V
3-n.c.

/ 10 kΩ j

RMS

4 - Ground Audio Gnd H
5 - Ground Blue Gnd H
6 - Audio L 0.5 V
7 - Video Blue 0.7 V

/ 10 kΩ j

RMS

/ 75 Ω j

PP

8 - Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

9 - Ground Green Gnd H
10 - n.c.
11 - Video Green 0.7 V

/ 75 Ω j

PP

12 - n.c.
13 - Ground Red Gnd H
14 - Ground Data Gnd H
15 - Video Red 0.7 V
16 - Status/FBL 0 - 0.4 V: INT

/ 75 Ω j

PP

1 - 3 V: EXT / 75 Ω j
17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - n.c.
20 - Video CVBS 1 V
21 - Shield Gnd H

/ 75 Ω j

PP

12 - EXT3: Cinch: Video YPbPr - In

Gn - Video Y 1 V
Bu - Video Pb 0.7 V
Rd - Video Pr 0.7 V

/ 75 Ω jq

PP

/ 75 Ω jq

PP

/ 75 Ω jq

PP

EXT3: Cinch: Audio - Out

Rd - Audio - R 0.5 V
Wh - Audio - L 0.5 V

/ 10 kΩ kq

RMS

/ 10 kΩ kq

RMS

13 - Service Connector (UART)

1 - UART_TX Transmit k
2 - Ground Gnd H
3 - UART_RX Receive j

2.4 Chassis Overview

Refer to chapter 9. Block Diagrams for PWB/CBA locations.

2009-Jun-26

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

EN 5TPM3.1E LA 3.

Index of this chapter:

3.1

Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).

• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard. Of de set
ontploft!

Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:

• Route the wire trees correctly and fix them with the
mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for
external damage.

• Check the strain relief of the Mains/AC Power cord for
proper function.

• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).

• Where necessary, measure the waveforms and voltages

with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ=× 10
nano-farads (n =× 10

• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.

• The correct component values are listed on the Philips
Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare
Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com
“Magazine”, then go to “Repair downloads”. Here you will find
Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.

-9

), or pico-farads (p =× 10

. Select

-12

-6

),

).

3.2 Warnings

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.

• Be careful during measurements in the high voltage
section.

• Never replace modules or other components while the unit
is switched “on”.

• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected
by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.

• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

2009-Jun-26

EN 6 TPM3.1E LA3.

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MODEL :

PROD.NO:

~

S

32PF9968/10

MADE IN BELGIUM

220-240V 50/60Hz

128W

AG 1A0617 000001

VHF+S+H+UHF

BJ3.0E LA

Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification

It should be noted that on the European Service website,
“Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

2009-Jun-26

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels
directly from a cable network by

means of a predefined TXT page
ADC Analogue to Digital Converter
AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency
AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box
AM Amplitude Modulation
AP Asia Pacific
AR Aspect Ratio: 4 by 3 or 16 by 9
ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information
ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA
ATV See Auto TV
Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz
BLR Board-Level Repair
BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries
B-TXT Blue TeleteXT
C Centre channel (audio)
CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections
CL Constant Level: audio output to

connect with an external amplifier
CLR Component Level Repair
ComPair Computer aided rePair
CP Connected Planet / Copy Protection
CSM Customer Service Mode
CTI Color Transient Improvement:

manipulates steepness of chroma

transients
CVBS Composite Video Blanking and

Synchronization
DAC Digital to Analogue Converter
DBE Dynamic Bass Enhancement: extra

low frequency amplification
DDC See “E-DDC”
D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
DMR Digital Media Reader: card reader
DMSD Digital Multi Standard Decoding
DNM Digital Natural Motion

Precautions, Notes, and Abbreviation List

EN 7TPM3.1E LA 3.

DNR Digital Noise Reduction: noise

reduction feature of the set
DRAM Dynamic RAM
DRM Digital Rights Management
DSP Digital Signal Processing
DST Dealer Service Tool: special remote

control designed for service

technicians
DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394
DVB-C Digital Video Broadcast - Cable
DVB-T Digital Video Broadcast - Terrestrial
DVD Digital Versatile Disc
DVI(-d) Digital Visual Interface (d= digital only)
E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display.
EDID Extended Display Identification Data

(VESA standard)
EEPROM Electrically Erasable and

Programmable Read Only Memory
EMI Electro Magnetic Interference
EPLD Erasable Programmable Logic Device
EU Europe
EXT EXTernal (source), entering the set by

SCART or by cinches (jacks)
FDS Full Dual Screen (same as FDW)
FDW Full Dual Window (same as FDS)
FLASH FLASH memory
FM Field Memory or Frequency

Modulation
FPGA Field-Programmable Gate Array
FTV Flat TeleVision
Gb/s Giga bits per second
G-TXT Green TeleteXT
H H_sync to the module
HD High Definition
HDD Hard Disk Drive
HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding.
HDMI High Definition Multimedia Interface
HP HeadPhone
I Monochrome TV system. Sound

2

I

C Inter IC bus

2

I

D Inter IC Data bus

2

I

S Inter IC Sound bus

carrier distance is 6.0 MHz

IF Intermediate Frequency
IR Infra Red
IRQ Interrupt Request
ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used

for broadcast grade video.

Uncompressed digital component or

digital composite signals can be used.

The SDI signal is self-synchronizing,

uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.

ITV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's

preferences
LATAM Latin America
LCD Liquid Crystal Display
LED Light Emitting Diode
L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I
LPL LG.Philips LCD (supplier)
LS Loudspeaker
LVDS Low Voltage Differential Signalling
Mbps Mega bits per second
M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz
MIPS Microprocessor without Interlocked

Pipeline-Stages; A RISC-based

microprocessor
MOP Matrix Output Processor
MOSFET Metal Oxide Silicon Field Effect

Transistor, switching device
MPEG Motion Pictures Experts Group
MPIF Multi Platform InterFace
MUTE MUTE Line
NC Not Connected
NICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital

sound system, mainly used in Europe.
NTC Negative Temperature Coefficient,

non-linear resistor
NTSC National Television Standard

Committee. Color system mainly used

in North America and Japan. Color

carrier NTSC M/N= 3.579545 MHz,

NTSC 4.43= 4.433619 MHz (this is a

VCR norm, it is not transmitted off-air)
NVM Non-Volatile Memory: IC containing

TV related data such as alignments
O/C Open Circuit
OSD On Screen Display
OTC On screen display Teletext and

Control; also called Artistic (SAA5800)
P50 Project 50: communication protocol

between TV and peripherals
PAL Phase Alternating Line. Color system

mainly used in West Europe (color

carrier= 4.433619 MHz) and South

America (color carrier PAL M=

3.575612 MHz and PAL N= 3.582056

MHz)
PCB Printed Circuit Board (same as “PWB”)
PCM Pulse Code Modulation
PDP Plasma Display Panel
PFC Power Factor Corrector (or Pre-

conditioner)
PIP Picture In Picture
PLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer

can give directly the desired frequency
POD Point Of Deployment: a removable

CAM module, implementing the CA

system for a host (e.g. a TV-set)
POR Power On Reset, signal to reset the uP
PTC Positive Temperature Coefficient,

non-linear resistor
PWB Printed Wiring Board (same as “PCB”)

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EN 8 TPM3.1E LA3.

Precautions, Notes, and Abbreviation List

PWM Pulse Width Modulation
QRC Quasi Resonant Converter
QTNR Quality Temporal Noise Reduction
QVCP Quality Video Composition Processor
RAM Random Access Memory
RGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are

reproduced.
RC Remote Control
RC5 / RC6 Signal protocol from the remote

control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling

data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et

Téléviseurs
SCL Serial Clock I
SCL-F CLock Signal on Fast I
SD Standard Definition
SDA Serial Data I
SDA-F DAta Signal on Fast I

2

C

2

C bus

2

C

2

C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France
and East Europe. Color carriers=

4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link

standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
STBY STand-BY
SVGA 800 × 600 (4:3)
SVHS Super Video Home System
SW Software
SWAN Spatial temporal Weighted Averaging

Noise reduction
SXGA 1 280 × 1024
TFT Thin Film Transistor
THD Total Harmonic Distortion
TMDS Transmission Minimized Differential

Signalling
TXT TeleteXT
TXT-DW Dual Window with TeleteXT
UI User Interface
uP Microprocessor
UXGA 1 600 × 1 200 (4:3)
V V-sync to the module
VESA Video Electronics Standards

Association
VGA 640 × 480 (4:3)
VL Variable Level out: processed audio

output toward external amplifier
VSB Vestigial Side Band; modulation

method
WYSIWYR What You See Is What You Record:

record selection that follows main

picture and sound
WXGA 1280 × 768 (15:9)
XTAL Quartz crystal
XGA 1024 × 768 (4:3)

Y Luminance signal
Y/C Luminance (Y) and Chrominance (C)

signal

YPbPr Component video. Luminance and

scaled color difference signals (B-Y
and R-Y)

YUV Component video

2009-Jun-26

4. Mechanical Instructions

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090616

Mechanical Instructions

EN 9TPM3.1E LA 4.

Index of this chapter:

4.1

Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal TPM3.1E LA Styling

4.4 Set Re-assembly.

4.1 Cable Dressing

Notes:

• Figures below can deviate slightly from the actual situation,
due to the different set executions.

Figure 4-1 Cable dressing 32" set with AUO panel

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Mechanical Instructions

Figure 4-2 Cable dressing 32" set with LGD panel

2009-Jun-26

Mechanical Instructions

18400_102_090624.eps

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EN 11TPM3.1E LA 4.

Figure 4-3 Cable dressing 42" set

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090121

1

Required for sets

42"

1

Mechanical Instructions

4.2 Service Positions

For easy servicing of this set, there are a few possibilities
created:

• The buffers from the packaging.

• Foam bars (created for Service).

4.2.1 Foam Bars

1. Unplug LVDS connector.
Caution: be careful, as these are very fragile connectors!

2. Unplug all other connectors.

3. Remove all fixation the screws.

4. The SSB can now be taken out of the set.

4.3.3 Power Board

1. Unplug the power board connectors.

2. Remove the screws.

3. Lift the unit and take it out of the set.

When defective, replace the whole unit.

4.3.4 Speakers

1. Unplug the speaker cable connector from the SSB.

2. Take the speakers out together with their casing.

When defective, replace the whole unit.

4.3.5 Key Board

1. Release the clip at the top and take whole the unit out.

2. Unplug the connector.

3. Remove the fixation screws and take the panel from the
unit.

When defective, replace the whole unit.

4.3.6 IR Board

Figure 4-4 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See Figure 4-4
details. Sets with a display of 42" and larger, require four foam
bars [1]. Ensure that the foam bars are always supporting the
cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, the screen can
be monitored.

4.3 Assy/Panel Removal TPM3.1E LA Styling

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before removing

the rear cover.

1. Remove the fixation screws that secure the rear cover.

2. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
the set.

for

1. Remove the speaker that covers the IR board.

2. Unplug the IR board connector.

3. Remove the screw closest to the connector.

4. Lift the IR board and take it out of the set.
When defective, replace the whole board.

4.3.7 Display Panel

1. Unplug the backlight and LVDS connectors.

2. Take the speakers out of their fixation position.

3. Release the key board unit from the bezel.

4. Release the IR board connector.

5. Remove the four fixation screws that fix the subframe to the
front bezel.

6. Lift the complete subframe with boards and speakers from
the front bezel.

7. Remove the four fixation screws from the side of the
subframe that fix the LCD panel to the subframe.

8. Lift the complete subframe from the LCD panel.

When defective, replace the whole unit.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse
order.

Notes:

• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-1

• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted
correctly.

.

4.3.2 Small Signal Board (SSB)

Caution: it is mandatory to remount all different screws at their

original position during re-assembly. Failure to do so may result
in damaging the SSB.

2009-Jun-26

Service Modes, Error Codes, and Fault Finding

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5. Service Modes, Error Codes, and Fault Finding

EN 13TPM3.1E LA 5.

Index of this chapter:

5.1

Service Modes

5.2 Software Upgrading

5.3 Error Codes

5.4 Fault Finding and Repair Tips

5.1 Service Modes

The Customer Service Mode (CSM) is used for communication
between the call centre and the customer, while the Factory
Mode offers several features for the service technician.

This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.

5.1.1 Customer Service Mode (CSM)

Purpose

The Customer Service Mode shows error codes and
information on the TV’s operation settings.The call centre can
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set.This helps the call centre to
diagnose problems and failures in the TV set before making a
service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.

Format:TPAA.AA V2.XX Y Z
TPAA.AA is the chassis name
V2.XX is the revision
Y is the display code (1 digit).
Z is the panel revision code (1 digit).

• Codes
Show the latest 5 error codes (layer 2)status:
000 = No problem, 011 = I

• SSB
Philips 12NC of SSB (small signal board)

• Display
Philips 12NC of display (LCD panel)

• PSU
Philips 12NC of PSU (Power Supply Unit)

• NVM version
Revision (4 letters)

• PQ Version
Revision (4 letter)

• HDCP key
HDCP status (Valid, Invalid)

• Signal quality/present
DTV shows (Digital percentage)
ATV shows (analog Yes/No)

• Audio system
Mono, Stereo, Dual

• Video format
PAL, SECAM, NTSC

• Standby μP SW version
Revision (4 letters)

2

C bus error, 012 = tuner error

How to Activate CSM

Key in the code “123654” via the standard RC transmitter.

Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!

Figure 5-1 CSM Menu

How to Exit CSM

Press “INFO” on the RC-transmitter.

5.1.2 Factory mode

How to enter

To enter the factory mode, use the following method:

• Press the following key sequence on the remote control
transmitter: “062596”directly followed by the “INFO” button.

After entering the factory mode, the following screen is visible
on the top and right of the panel.

How to Navigate

By means of the “CURSOR-DOWN/UP” knob (or the scroll
wheel) on the RC-transmitter, can be navigated through the
menus.

Contents of CSM

General

• Model. Philips model type

• Production serial number
Philips serial number

• Software version

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10000_036_090121.eps

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TO

UART SERVICE

CONNECTOR

TO

UART SERVICE

CONNECTOR

TO
I2C SERVICE
CONNECTOR

TO TV

PC

HDMI
I

2

C only

Optional power

5V DC

ComPair II Developed by Philips Brugge

RC out

RC in

Optional

Switch

Power ModeLink/

Activity

I

2

C

ComPair II

Multi

function

RS232 /UART

Service Modes, Error Codes, and Fault Finding

automatic diagnostics and an interactive question/answer
procedure.

How to Connect

This is described in the chassis fault finding database in
ComPair.

Figure 5-2 Factory Mode Menu

How to Navigate

With the up/dowm cursor keys can be navigated arround the
items, with the Left/Right cursor the values can be changed.

How to EXIT

Choose "EXIT", then press"OK"button.

5.2 Software Upgrading

5.2.1 ComPair

2009-Jun-26

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:

1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No
knowledge on I
because ComPair takes care of this.

3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of

2

C or UART commands is necessary,

Figure 5-3 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Programming software can be downloaded from the Philips
Service portal.

• ComPair UART interface cable for TPS2.2x xx.
(using JST PHR-3, 2 mm pitch connector):
3122 785 90630.

Note: While having problems, contact the local support desk.

5.3 Error Codes

The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.

5.4 Fault Finding and Repair Tips

5.4.1 Exit “SAM”

Choose "EXIT",then press"OK"button. Turn off the TV and then
turn on the TV.

Service Modes, Error Codes, and Fault Finding

5.4.2 Speakers

Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!

5.4.3 Tuner

Attention: In case the tuner is replaced, always check the tuner
options.

EN 15TPM3.1E LA 5.

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6. Alignments

Alignments

Index of this chapter:

6.1

General Alignment Conditions

6.2 TV Mode display adjust

6.3 PC mode Display Adjustment

6.4 Serial Number Definition

Note: The Service Mode are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.

6.1 General Alignment Conditions

Perform all electrical adjustments under the following
conditions:

• Power supply voltage (depends on region):
– 195 V to 264 V

• Connect the set to the mains via an isolation transformer
with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.

• Test probe: R

• Use an isolated trimmer/screwdriver to perform
alignments.

, 50/60 ±3Hz.

AC

> 10 MΩ, Ci < 20 pF.

i

6.2 TV Mode display adjust

Table 6-2 Tint settings

Colour Temp R G B

Normal 85 74 85

Warm 84 63 49

Cool 75 63 85

Luminance:
– >360 cd/m2 for AUO T315XW02
– >400 cd/m2 for LGD LC320WXE
In the centre of the screen when Smart mode at “Vivid” or set
brightness to 100.

Note: These group settings about colour temp are also applied
automatically into HDMI1/HDMI2/Side HDMI/CVI1/CVI2/SIDE
AV/VGA. That means TV/HDMI/CVI/PC are used the same
setting.

6.3 PC mode Display Adjustment

Auto colour adjustment
Set Brightness 100 and Contrast 50 and apply 1024 × 768 at
60 Hz mode with 50 Black and 50 White pattern at the factory
mode.
Activate AUTO-COLOR function for auto ADC offset and gain
setup.

6.2.1 White balance adjustment

General set-up:

• Equipment Requirements: Colour analyser.

• Input requirements:
Input Signal Type:
– RF signal
– Set to PAL B/G system, frequency is decided in factory
– Pattern is white of 100%

• Input Signal Strength: 10 mV (80 dBμV) terminal voltage.

• Input Injection Point: TV Tuner input

Colour Temp Alignment

Apply full white pattern, and smart picture setting to be
standard (Brightness 50, Contrast 50, and Colour 50).
Adjusting SCALER GAIN R G B to reach W/D and luminance
in factory mode as below.
Adjust the colour temperature in the factory mode OSD by
adjusting RGB Gain from 127. The CIE1931 chromaticity (X, Y)
co-ordinates shall be:

Table 6-1 Reading with Minolta CA-210

Colour Temp x y

Normal 0.289 ± 0.004 0.291 ± 0.004

Warm 0.314 ± 0.004 0.319 ± 0.004

Cool 0.278 ± 0.004 0.278 ± 0.004

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).

• Select a COLOUR TEMPERATURE (e.g. COOL,
NORMAL, or WARM).

• Set the RED, GREEN and BLUE default values according
to the values in Table 6-2

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

.

Figure 6-1 50-Black 50-White

Colour temperature alignment is automatically set during TV
alignment.
Apply full white pattern, check picture must satisfy following
table.

Table 6-3 Reading with Minolta CA-210

Colour Temp x y

Normal 0.289 ± 0.015 0.291 ± 0.015

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).

• Select NORMAL COLOUR TEMPERATURE.

• Set the RED, GREEN and BLUE default values according
to the values in the “Tint settings” table.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Table 6-4 Tint settings

Colour Temp R G B

Normal 85 74 85

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6.3.1 Comp video Mode display adjust

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090416

Auto Colour Adjustment
General set-up:
Equipment: Quantum Data Pattern Generator 802G or 802R or

882.
Apply 720p/50 Hz, and the pattern TVBAR100 as shown in

Figure 6-2

.

Alignments

EN 17TPM3.1E LA 6.

Figure 6-2 TVBAR100 pattern

Initial Set-up: Set Smart picture as “Personal” (Brightness to
50, Contrast to 50 and Colour to 50). Access to factory OSD
first, then to enable AUTO-COLOR to get HD ADC OFFSET
and HD ADC GAIN. Check if 32 gray scales can be
distinguished.

Colour temperature alignment is automatically done during TV
alignment.

6.4 Serial Number Definition

BOM Code:

Table 6-5 BOM Code

Panel Supplier Code

AU 1

CPT 2

LPL(LG) 3

QDI 4

CMO 5

HSD 6

SVA 7

2009-Jun-26

EN 18 TPM3.1E LA7.

7. Circuit Descriptions

Circuit Descriptions

Index of this chapter:

7.1

Introduction

7.2 Block Diagram

7.3 MT8222TMMU

Notes:

•Only new circuits (circuits that are not published recently)
are described.

• Figures can deviate slightly from the actual situation, due
to different set executions.

• For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 9) and
circuit diagrams (chapter 10). Where necessary, you will
find a separate drawing for clarification.

7.1 Introduction

This platform LCD-TV uses two main ICs: MT8222TMMU (One
Chip LCD-TV Controller) and WT6703F (Stand-by MCU). The
MediaTek MT8222TMMU is an ultra highly integrated single
chip for flat panel TV supporting multimedia video/audio input
and output format up to full HDTV. It includes advanced 3D
comb filter TV decoder to retrieve the best image from popular
composite signals and embedded HDTV/VGA decoders for the
high bandwidth input signals perfectly reproducing.
The new 4th generation advanced motion adaptive and motion
estimation de-interlace converts accordingly the interlace video
into progressive one with overlay of a 2D graphic processor.
Independent two flexible scalars provide wide adoption to
various LCD panels for two of different video sources at the
same time. On-chip audio processor decodes analog signals
from tuner with lip sync control, delivering high quality post­processed sound effect to customers.
The WT6703F is mainly for TV stand-by remaining function
during off/stand-by mode. When TV set enters to off/stand-by
mode, MT8222 CLD will be totally shutdown and remain only
WT6703F to meet the lowest power consumption.
The WT6703F is a micro controller for system power manager
with Turbo 8051 compatible (3T) CPU, flash memory, SRDAM,
two pulse width modulators, DPMS detector, double timers and
UART, three slave I
converter, real time clock, watch-dog timer, embedded ISP,
power down mode and embedded ICE mode.

2

C interface, a 4 channel 8-bit A/D

Pre-Audio out signal is sent through the DAC out and is
amplified to main speaker by audio amplifier MAX9728AETC +
TPA3123D2 and is simultaneously amplified to head phone by
audio amplifier MAX9728AETC.

7.2 Block Diagram

7.2.1 Features

See Block diagram
The tuner supports NTSC\PAL\SECAM RF signals.
For TV signal, MT8222TMMU with single high-quality 4th
generation TV decoder Automatic TV standard detection
supporting NTSC, NTSC-4.43, PAL (B, G, D, H, M, N, I, Nc),
PAL (Nc), PAL, SECAM New 4th generation NTSC/PAL/PAL­M/PAL-N Motion Adaptive 3D comb filter Embedded VBI
decoder for Closed-Caption/XDS/ Teletext/ WSS/VPS
Supporting macrovision detection.
The platform supports different I/O sources:

• CVI supports YPbPr component input, it can support SD/
HD format

• SIDE-AV supports CVBS, S-Video signal shares with same
audio.

• HDMI supports up to HDMI 1.3a with CEC & HDCP
function, audio included and also supports PC DVI signal
with HDCP function, the audio shares with PC audio
connector via PC mini-jack

• PC supports analog PC input via 15 pin D-sub input

• Analog audio out supports via RCA jack

Each video/audio signal of all sources will directly deliver to
MT8222TMMU for video/audio further digital processing.

2009-Jun-26

Functional diagram for details.

7.2.2 32" & 42" SSB Cell Layout

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TUNER

DDR

CLASS D

FFC

Scaler

VGA

HDMI

HDMI

USB

Scart

Component

AV Input

Circuit Descriptions

EN 19TPM3.1E LA 7.

7.3 MT8222TMMU

7.3.1 Function Description

Analog front end

• set of high resolution ADC with corresponding PGAs
adopting to 0.5 V to 2 V input dedicated for TV/AV/SV input
signals.

• 3 high speed ADCs dedicated for VGA/HDTV input signals
up to 160 MHz.

• All 8-bit programmable gain pre-amplifiers.

• Embedded Schmitt trigger and de-glitch circuits on H
V

/SOG/SOY inputs.

sync

Video Input

Embedded input multiplexers without external switch including.

Figure 7-1 32" & 42" SSB layout

• 8 for TV/AV/S-video input pins available for any possible

• 3 sets for VGA/Component/Scart/D-connector with

• 3 sets of HDMI/DVI input port with internal multiplexers.

• Input sources can be flexibly routed to Main/PIP internally.

Sync Processor

• Two enhance sync processors for all timing detection

• Enhanced measuring mechanism for VGA auto

/

sync

Decoder

TVD

• Single high-quality 4th generation TV decoder.

combination.

differential input pairs.

supporting Macrovision detection.

adjustment.

2009-Jun-26

EN 20 TPM3.1E LA7.

Circuit Descriptions

• Automatic TV standard detection supporting NTSC,
NTSC-4.43, PAL (B, G, D, H, M, N, I, Nc), PAL (Nc), PAL,
SECAM.

• New 4th generation NTSC/PAL/PAL-M/PAL-N Motion
Adaptive 3D comb filter.

• Embedded VBI decoder for Closed-Caption/XDS/Teletext/
WSS/VPS.

• Supporting Macrovision detection.

YPbPr/Scart/D-connector

• Supporting HDTV 480i/480p/576i/576p/720p/1080i/1080p
input.

• Smart detection on Scart function for European region.

• Smart detection on D-connector for Japan region.

• Supporting SCART RGB inputs mixed with composite
signal by adjustable horizontal delay.

VGA

• Supporting various VGA input timings up to UXGA
(1600 × 1 200 @ 60 Hz).

• Supporting Separate/Composite/SOG sync types.

HDMI

• Supports DTV (480i/576i/480p/576p/720p/1080i/1080p)
and PC (VGA/XGA/SXGA/UXGA) resolution up to
165 MHz (using dual edge to transmit video data for pixel
clock over 112 MHz).

• HDMI 1.3/DVI 1.0/EIA/CEA-861B/HDCP 1.1 supported.

• Three HDMI input ports with internal high speed
multiplexers realize flexible design.

• Advanced linear and non-linear Panorama scaling.

• Programmable Zoom viewer.

• Picture-in-Picture (PIP).

• Picture-Out-Picture (POP).

Display

• Advanced dithering processing for LCD display with 8/10
bit output.

• Gamma correction

• Supporting alpha blending for Video and OSD planes.

• Frame rate conversion

• Gamma/anti-Gamma correction to optimise the display
device performance

Seamless performance comparing demonstration function

• Support Left/Right video processing comparing function
without additional resources (DRAM) for customers
demonstration

• All the video functions (De-interlace/3D comb/NR/Flesh
tone/CTI) can be included

Video Output

• Programmable output timing up to 1 920 × 1080 @ 60 Hz
panel support.

• Dual-channel 8/10-bit LVDS, single channel 8/10-bit LVDS

• One CVBS output with CVBS / S-video mixed input

• Spread spectrum function to eliminate display clock EMI
issue on board

VBI

• Dual VBI decoders for the application of V-Chip/Closed­Caption/XDS/ Teletext/WSS/VPS

• Supporting external VBI decoder by YPrPb input

• VBI decoder up to 4000 pages Teletext (L1.5).

MJC/ME/MC

• Support 120 Hz motion judder compensation for horizontal
motion. (option)

• Support 60 Hz to 120 Hz, 50 Hz to 100 Hz in 100/120 Hz
panel

• Support 24 Hz to 60 Hz, 25 Hz to 50 Hz in 50/60 Hz panel

Video Processor

Noise Reduction

• All input sources with 2D/3D adaptive noise reduction to
realize pure clean picture

Colour Management

• Advanced flesh tone and multiple-colour enhancement.
(For skin, sky, grass and white level) to get purely natural
picture quality.

• Advanced Colour Transient Improvement (CTI).

• Saturation/hue adjustment for flexible design.

Contrast/Brightness/Sharpness Management

• Sharpness and DLTI/DCTI

• Brightness and contrast adjustment

• Black level extender to get more detail at dark scene

• White peak level limiter

• Adaptive Luma/Chroma management.

De-interlacing

• 4th generation advanced Motion adaptive de-interlacing
with motion estimation & motion compensation de­interlacing.

• Automatic detect film or video source.

• 3 : 2/2 : 2 pull down source detection.

Scaling

• 4th generation high resolution arbitrary ratio vertical/
horizontal scaling of video, from 1/32× to 32×.

Audio Features

• Supporting BTSC/EIAJ/A2/NICAM decode

• Stereo demodulation, SAP demodulation

• Mode selection (Main/SAP/Stereo)

• Equalizer

• Sub-woofer/Bass enhancement

• MTK proprietary 3D surround processing (Virtual surround)

• Audio and video lip synchronization

• Supporting Reverberation

Audio Input/Output

• Decode audio AF from Tuner

• 2 channels audio L/R digital line in.

• Supports 1-channel (1 R/L pairs) analog audio input.

• Embedded internal 3-ch (L/R) audio DAC & could bundle
with 8292 (MTK audio OP & MUX).

• Supporting 1 tuner audio decoder and 1 digital input and
both output for SCART1/2 output application

• Support SPDIF in/output

2D-Graphic/OSD processor

• Embedded one bitmap OSD plane to support 4-/8-bpp
index colour mode, and 16-/32-bpp direct colour mode with
horizontal/vertical scaling function

• Another character based OSD plane to support 1-/2-/4-/8­bpp index colour mode for low DRAM usage setup menu
and Teletext / Close-caption display

• Supporting alpha blending among these two planes and
video

• Supporting Text/Bitmap decoder

• Supporting line/rectangle/gradient fill

• Supporting bitblt

• Supporting Colour Key function

• Supporting Clip Mask

Host Micro controller

• RISC microprocessor & 8032 dual core CPU inside.

• Supporting serial type flash interface

• Supporting 5/3.3-Volt. FLASH interface

• IR control serial input

2009-Jun-26

• Supporting two RS232 interfaces for external source
communication (Including one RS232 port speeding up to
3 Mbps)

• Supporting up to 4 PWM outputs

• Programmable GPIO setting for complex external device
control

Multi-Media Engine

• Supports HD JPEG decode

• Supports SD MPEG-1/2/4 decode

• Support RM decode (option)

DRAM Controller

• Supporting up to 32M-bytes DDRI/SDR DRAM

• Supporting 16 bits DDRI/SDR bus interfaces

• Build in a DRAM interface programmable clock to optimise
the DRAM performance

• Programmable DRAM access cycle and refresh cycle
timings

• Supporting 2.5/3.3 Volt DDRI/SDR Interface

Flash Usage

• Flash is used to store FW code, fonts, bitmaps, big tables
for VGA, Video, Gamma.

• For single country, we need around 20KB to store font
data.

• For more bitmaps, we need more flash space to store
them.

Circuit Descriptions

EN 21TPM3.1E LA 7.

USB Host

• Embedded host controller

• Compliant with USB specification Rev. 2.0 at high-speed
and full-speed data transfer rate

• Complies with USB Storage Class specification Rev. 1.0

• Support independent USB 2 channel & copy function

FCI

• Supports SD/MMC/MS/MS-Pro type flash card.

Outline

• 256-pin LQFP package

• 3.3/2.5/1.0-Volt. operating voltages

• Advanced 90um process.

2009-Jun-26

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Block Diagram

Pin Configuration

8. IC Data Sheets

This section shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).

8.1 MT8222TMMU/B (IC U4201)

IC Data Sheets

2009-Jun-26

Figure 8-1 Internal block diagram and pin configuration

8.2 WT6703F (IC U4101)

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090619

Block Diagram

Pin Configuration

IC Data Sheets

EN 23TPM3.1E LA 8.

Figure 8-2 Internal block diagram and pin configuration

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Block Diagram

Pin Configuration

8.3 MX25L6405DMI (IC U4105)

IC Data Sheets

2009-Jun-26

Figure 8-3 Pin configuration

8.4 EM6AA160TS (IC U5101)

CK

CKE

CS

RAS

CAS

WE

DLL

CLOCK

BUFFER

COMMAND

DECODER

COLUMN

COUNTER

CONTROL

SIGNAL

GENERATOR

ADDRESS

BUFFER

REFRESH

COUNTER

4M x 16

CELL ARRAY

(BANK #0)

Row

Decoder

4M x 16

CELL ARRAY

(BANK #1)

Row

Decoder

4M x 16

CELL ARRAY

(BANK #2)

Row

Decoder

4M x 16

CELL ARRAY

(BANK #3)

Row

Decoder

Column Decoder

Column Decoder

Column Decoder

Column Decoder

MODE

REGISTER

A10/AP

A9
A11
A12

BA0
BA1

~

A0

CK

DATA
STROBE
BUFFER

LDQS

UDQS

DQ

Buffer

LDM
UDM

DQ15

DQ0

~

18400_303_090301.eps

090619

Block Diagram

IC Data Sheets

EN 25TPM3.1E LA 8.

Figure 8-4 Internal block diagram

2009-Jun-26

EN 26 TPM3.1E LA8.

VSSQ

166

SSVDDV

265

51QD0QD

3 64

QSSVQDDV

463

41QD1QD

562

31QD2QD

661

VSSQ

VDDQ

760

21QD3QD

8 59

11QD4QD

958

QSSVQDDV

10 57

01QD5QD

11 56

9QD6QD

12 55

QDDVQSSV

13 54

8QD7QD

14 53

CNCN

15 52

VDDQ

16 51

SQDUSQDL

18 49

FERVDDV

19 48

SSVCN

20 47

MDUMDL

22 45

KCSAC

23 44

EKCSAR

24 43

CNSC

25 42

21ACN

26 41

11A0AB

27 40

9A1AB

2839

8APA/01A

29 38

A0

A7

17 50

CNCN

21 46

KCEW

31 36

5A2A

32 35

4A3A

33 34

SSVDDV

30 37

6A1A

Pin Configuration

18400_304_090301.eps

090619

8.5 EM6AA160TS (IC U5101)

IC Data Sheets

2009-Jun-26

Figure 8-5 Pin configuration

8.6 MAX9728AETC (IC U1501, U1502, U6202)

CHARGE

PUMP

UVLO/

SHUTDOWN

CONTROL

CLICK-AND-POP

SUPPRESSION

C1N

C1P

PV

SS

SV

SS

PGND

SGND

INR

V

DD SHDN

ON

OFF

SV

SS

V

DD

SGND

INL

R

F

*

30k?

RIN*

20k?

R

IN*

20k?

OUTR

LEFT

AUDIO

INPUT

RIGHT

AUDIO

INPUT

HEADPHONE

JACK

5
(8)

12
(2)

1

(3)

2
(4)

3

(5)

4

(7)

9
(12)

11
(1)

6
(9)

10
(14)

7
(10)

C1

1µ F

C2

1µ F

4.5V TO 5.5V

C3

1µ F

C

IN

0.47µF

SV

SS

V

DD

OUTL

C

IN

0.47µF

8

(11)

R

F

*

30k?

MAX9728A

Block Diagram

Pin Configuration

18400_305_090301.eps

090619

TOP VIEW

12

11

10

4

5

6

123

9 8 7

MAX9728A
MAX9728B

TQFN

C1P

PGND

C1N

PV

SS

SHDN

INL

SGND

INR

SV

SS

OUTR

OUTL

+

V

DD

IC Data Sheets

EN 27TPM3.1E LA 8.

Figure 8-6 Internal block diagram and pin configuration

2009-Jun-26

EN 28 TPM3.1E LA8.

8.7 TPA3123D2PWPR (IC U6301)

Block Diagram

AVCC

REGULATOR

LIN

AGND

IC Data Sheets

AVD D

AVD D

AVD D/2

AVDD

+

-

SC

DETECT

HS

VCLAMP

LS

BSL

PVCCL

LOUT

PGNDL

SD

MUTE

MUTE

BYPASS

GAIN1

GAIN0

RIN

CONTROL

BYPASS

AV

CONTROL

Pin Configuration

AVD D

CONTROL

BIAS

THERMAL

OSC/RAMP

AVD D/2

AVD D

-

+

SC

DETECT

HS

VCLAMP

LS

VCLAMP

BSR

PVCCR

ROUT

PGNDR

2009-Jun-26

PVCCL

SD

PVCCL

MUTE

LIN

RIN

BYPASS

AGND
AGND

PVCCR

VCLAMP

PVCCR

1
2

3

4
5
6
7

8

9

10
11
12

24
23
22
21
20
19
18
17
16

15
14
13

PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR

18400_307_090301.eps

Figure 8-7 Internal block diagram and pin configuration

090619

8.8 CS4344 (IC U4203)

Block Diagram

IC Data Sheets

EN 29TPM3.1E LA 8.

Pin Configuration

18400_308_090301.eps

090619

Figure 8-8 Pin configuration

2009-Jun-26

EN 30 TPM3.1E LA8.

Personal Notes:

10000_012_090121.eps

090121

IC Data Sheets

2009-Jun-26

9. Block Diagrams

PANEL (1053)

MAIN POWER SUPPLY

(1054)

CN903

+5VSB11

S/B

10

+5VSB13

12

24V9

24V

8

GND

7

GND6

GND

5

12V4

12V

3

DIM2

EN1

CN902

AC socket

CN901

CN7101

BRI_PWM

11

+12V10

INV_ON/OFF12

+12V9

GND8

GND7

GND6

+24V

5

+24V

4

STBY3

+5V_STBY2

+5V_STBY

1

CN5205CN5401

GND4

KEY23

KEY12

PWE-ON_OFF

1

KEYBOARD

(1057)

DC_ON_OFF4

KEY13

KEY22

GND1

CN5404

+5V STBY3

LED1-ON

2

PWR_ON_OFF1

LGIHT SENSOR7

GND

6

RC_IR_3V35

LED 2 STBY4

IR OUT

5

GND6

LED2_STBY

4

LIG_SENOR

7

VCC_STBY3

LED_ON2

1

CN0201

LOUT+4

GND3

ROUT+2

GND

1

CN6301

SPEAKER R
(1185)

SPEAKER L
(1185)

NC11

GND

10

DIM13

EN

12

GND

9

GND

8

GND

7

GND

6

24V

5

24V

4

24V

3

24V

2

24V1

GND30

GND31

GND

32

RXO2+19

RXO2-

18

GND

17

RXO1+16

RXO1-

15

GND14

GND

11

10

9

GND8

GND21

GND20

RXO0+13

RXO0-

12

RXO3+

25

RXO3-24

RXOC+

23

RXOC-22

GND29

28

27

GND

26

GND7

GND6

GND5

PANEL_VCC

4

PANEL_VCC3

PANEL_VCC

2

PANEL_VCC1

18400_404_090301.eps

090622

8806

8803

8807

SSB

(1053)

B

IR LED PANEL

(1056)

E

J

A

Wiring diagram 32PFL54xx AUO Panel

Block Diagrams

EN 31TPM3.1E LA 9.

2009-Jun-26

Wiring diagram 32PFL54xx LGD Panel

Block Diagrams

EN 32TPM3.1E LA 9.

8804

8805

CN902

1

2

4

CN803

CN802

MAIN POWER SUPPLY

A

(1054)

IPB

5

6

7

8

9

11

12

13

ENA

DIM

12V3

12V

GND

GND

GND

24V

24V

S/B10

+5VSB

+5VSB

CN901

8807

B

CN5404

4

6

7

PANEL

SSB

(1053)

PWR_ON_OFF1

LED1-ON2

+5V STBY3

LED 2 STBY

RC_IR_3V35

GND

LGIHT SENSOR

CN6301

1

8806

GND

(1050)

CN5401

1

2

3

4

GND

KEY2

KEY1

DC_ON_OFF

CN7101

2

6

11

12

+5V_STBY1

+5V_STBY

STBY3

+24V4

+24V5

GND

GND7

GND8

+12V9

+12V10

BRI_PWM

INV_ON/OFF

CN5205

1

7

8

9

10

12

14

15

PANEL_VCC

PANEL_VCC2

PANEL_VCC3

PANEL_VCC4

GND5

GND6

GND

GND

GND11

RXO0-

RXO0+13

GND

RXO1-

RXO1+16

GND17

RXO2-18

KEYBOARD

IR LED BOARD

(1056)

J

E

1

2

3

(1057)

4

CN0201

1

LED_ON2

VCC_STBY

3

LED2_STBY

4

IR OUT

5

GND6

LIG_SENOR7

PWE-ON_OFF

KEY1

KEY2

GND

AC socket

SPEAKER R

(1185)

SPEAKER L

(1185)

ROUT+

2

GND

3

LOUT+4

20

24

26

27

28

30

32

RXO2+19

GND

GND21

RXOC-22

RXOC+23

RXO3-

RXO3+25

GND

GND29

GND

GND31

GND

18400_405_090301.eps

090622

2009-Jun-26

Wiring diagram 42PFL56xx

Block Diagrams

EN 33TPM3.1E LA 9.

8804

8805

CN803

CN802

CN903

2

3

4

5

6

7

8

9

12

13

ENA1

DIM

12V

12V

GND

GND

GND

24V

24V

S/B10

+5V11

+5V

8807

B

CN5404

1

3

4

6

7

PANEL

SSB

(1053)

PWR_ON_OFF

LED1-ON2

+5V STBY

LED 2 STBY

RC_IR_3V35

GND

LGIHT SENSOR

8806

(1050)

CN5401

1

3

4

GND

KEY22

KEY1

DC_ON_OFF

CN7101

2

4

9

11

+5V_STBY1

+5V_STBY

STBY3

+24V

+24V5

GND6

GND7

GND8

+12V

+12V10

BRI_PWM

INV_ON/OFF12

8804

CN5201

13

14

16

1

2

6

8

9

GND

RXO0-

RXO0+3

RXO1-4

RXO1+5

RXO2-

RXO2+7

GND

GND

RXOC-10

RXOC+11

RXO3-12

RXO3+

RXE0-

RXE0+15

RXE1-

KEYBOARD

IR LED PANEL

(1056)

J

E

1

3

(1057)

4

CN0201

1

LED_ON2

VCC_STBY3

LED2_STBY

4

IR OUT

5

GND6

LIG_SENOR7

MAIN POWER SUPPLY

A

IPB

(1054)

PWE-ON_OFF

KEY12

KEY2

GND

SPEAKER R

(1186)

SPEAKER L

(1186)

SUB WOOFER

(1185)

CN901

AC socket

CN6301

1

ROUT+2

3

LOUT+

4

CN6302

AUD_LOUT

1

AUD_ROUT2

GND

3

GND

GND

20

24

29

30

RXE1+17

GND18

GND19

RXE2-

RXE2+21

RXEC-22

RXEC+23

RXE3-

RXE3+25

PANEL HIGH26

PANEL HIGH27

PANEL_VCC28

PANEL_VCC

PANEL_VCC

GND31

GND32

2009-Jun-26

18400_407_090301.eps

090625

Block diagram Video

TUNER

YPbPr 1

SCART 1

MT8222

Scaler/ADC

Video

processing

MCU

WT6703F

Key pad

Flash memory

DDR memory

Power supply

(regulator/

Switch)
Manage unit
to each block

Panel interface

1920 × 1080

(1366 × 768)

Control interface

PC_ D-sub

HDMI_1

Side CVBS/S-video

EEPROM

EDID/
RS232

EDID

Audio DAC/SPDIF

HDMI_2

RS232 service & ComPair port

iTV

CVBS

Sync slicer

CVBS &
H/V sync

SCART 2

HDMI_SIDE

USB

IR / Power switch

18400_400_090301.eps

090618

Block Diagrams

EN 34TPM3.1E LA 9.

2009-Jun-26

TUNER

YPbPr

S/PDIF Output

MT8222

Audio

decoder

processing

PC_ D-sub

HDMI*3

Side CVBS/S-video

Audio

Switch

SSIF

Head phone

AMP

Head phone

SCART 1

Post AMP

SCART 2

18400_401_090301.eps

090618

Block diagram Audio

Block Diagrams

EN 35TPM3.1E LA 9.

2009-Jun-26

Block diagram Functional diagram

M24C02

WT6703F

M24C02

M24C02

Tuner

MT8222

HY5DU561622

FTP-4

DDR

5V_SCL

5V_SDA

SIF_OUT

TV_CVBS

ISP1_SCL

ISP1_SDA

PC_HSYNC

PC_VSYNC

DDCSCL

DDCSDA

RDQS0

RDQ[15..0]

RA[12..0]

RDQM0

RWE#

RCAS#

RRAS#

RCS#

PC_R/G/B IN

YPbPr1_Y/Pb/Pr

SCART 1_MP

SCART 2_MP

Side AV –S_MP

PC_VSYNC

PC_HSYNC

74HC4052D

TPA3123D

MAX9728AETC

PC_AU R/L

SCT2_AU_ R/L

COMP2 R/L

AUD_MUX_R

AUD_MUX_L

AUD_ROUT

AUD_LOUT

ROUT

LOUT

MAIN_AOL

MAIN_AOR

AUD_ROUT

AUD_LOUT

MT_INT

5V PWR SW

STANDBY

DC_ON_OFF

KEY1

3V_SCL

3V_SDA

RBA0

RBA1

+5V

3.3V_SB

DDC_5V

HDMI3_5V

+5V

+24V

+5V

DDC_WP

RC I/R_3V3

RST_MT8222

MT_SCL

MT_SDA

HDMI1_5V

HDMI

Connector

HDMI1_DDC_SDA

HDMI1_DDC_SCL

HDMI1_RX0/1/2/3/C+-

DSUB

Connector

PC_R/G/BIN

SEL2

SEL1

HDMI 1,2,side

_RX0/1/2/3/C+-

HDMI

Connector

HDMI2_DDC_SDA

HDMI2_DDC_SCL

HDMI2_RX0/1/2/3/C+-

M24C02

HDMI2_5V

USB

KEY1

STANDBY

5V_PWR_SW

RC_IR 3V3

LED2STBY

RDQS1

RDQM1

RCLK0#

RCLKEN

RCLK0

HDMI-SIDE_DDC_SDA

HDMI-SIDE_DDC_SCL

HDMI

Connector

HDMI-SIDE_RX0/1/2/3/C+-

SIDE_CVBS_AU_R/L

HP_LOUT

HP_ROUT

18400_402_090301.eps

090618

Block Diagrams

EN 36TPM3.1E LA 9.

2009-Jun-26

Block Diagram Power diagram

18400_403_090301.eps

090618

Block Diagrams

EN 37TPM3.1E LA 9.

2009-Jun-26

Circuit Diagrams and PWB Layouts

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

01

0

1

1

1

1

1

A

A

B B

C C

D D

E E

F F

G G

H

H

1

2

3

!

!

!

!

!

!

!

!

!

!

!

!

!

!!

To scaler

To panel

USP "23

/ "62

2-1923G517

!

!

!

1E 109NC

1A 109DB

9F 309NC 7F 209NC

1B 2

09C 2D 10

9C

2C 409C

2B

309

C

8D 60

9C

2A 509C

3B 119C 5A 709C

3C

419C 3C 319C

6F 71

9C 3C 519C

6D 13

9C 6E 819

C

3E

339C 2E 23

9C

4F

539C 3F 439

C

6H 739C 4E 639C
5E 939C 8D 839C
6E 149C 4F

049C

7E 349C 3F 24

9C

8F 749C 7E 649

C

8E

059C

3G 849C

6B 089C 5B 069C

6C

38

9

C

7C 189C

8B 589C

8B 489C

8C 989C

9B 689C

5

F 109D 5A 099C

4B

309D 5A 209

D

6G 509D 5F 40

9D

8B 539D 7C 609

D

5E 2

5

9

D 5D 159D

7E 659D 7E 559D
7B

189D

6B 089D

8E 489D

8E

389

D

8B 089BF 5A 409BF
5A 289BF 2B 189B

F

1B 489BF 3B 389BF

1E

109F 5B 589BF

8A 539DH 1A 109DBH

5B 109QH 7D 559DH

6C 139CI 3B 109C

I

4E

159CI 8C

23

9CI

2

G 359CI 2G 259C

I

5G

199CI 8C 289CI

2B 20

9L

1C 109L

8G 239L 8F 139

L

9B 08

9L 8D 179L

1D

10

9

RN 2A

189

L

6C 1

3

9Q 4B

109

Q

6D

159Q 5G 549

Q

6

H 889Q 6E

2

5

9

Q

1F

499Q 8D 39

9

Q

4C 699Q 2F 599Q

1E 109VR 4C 799Q

3B 509R 1C 10

9R

3C 709R

5G 609

R

4C 909R 3C 809R
4C 119R 5C 019R
4C 319R 4C 2

19

R

4C

519R 2F 419R

3C

719R 4B 619R

4B 91

9

R

4B 81

9R

6E 129R 6C 02

9R

5C 039R 5F 229R

5C 339R

5C

1

3

9R

5C 539R 5C 43

9R

5G 649R 5G 549

R

8

G

849R

2

F

7

49R

3E

759R

3

F

6

5

9R

2E

9

59

R

3E

85

9

R

5E 169R 5E 069R
5E 369R 5E 269R

3E 569R 4E 4

6

9R

2G 869R 2G 7

69R

3

G 079R 3G 969

R

3G

279R 4G

1

7

9R

3G

479R 3H 37

9

R

8F 679R 2F 579R

5G 089R

3G

879R

7C 289R

4G 18

9

R

6C 489R 8B 389R

6G 689R 8C 589R
1G 989R

6D

889R

8

C 299R 8C 199R

6H 499R 8D 399R
9D 699R 8C 599R

2C 20

9GS

1

C

1

09

GS

2B

409GS 1

B 309GS

6D 209T 8B 109

T

5C 1

39DZ 5C 039DZ

6G 569DZ 3G 239D

Z

6C 189DZ 7B 089DZ

YBTS

Y

BTS

nimFR

N

I_

Y

BD

NAT

S

IP_C

CV

IP_CCV

NI_YBDNATS

V5+

JDA-THGI

R

B

FFO-NO-RETREVNI

JDA-T

HGIR

BNI

_

Y

BDNAT

SYBDNATS

FFO

-NO

-

RETREVNI

nimF

R

F_V42+

F_V

4

2

+

V42+

V004

+

C

F

P_CC

V

V5+

BSV5+

A_V42+

V004

+

CFP_CCV

CFP_CCV

F_V21+

V004+

A_V42+

BS

V5

+

V

4

2

+

ni_caV

ni_c

aV

V2

1

A_V42+

V004+

F_V21+

089R

K

7.2

0

7

9

R

K74

419

C

F2

u2

139D

Z

1V5C-97XZ

B

1 2

159CI

D9956L

1
2

3

4
5
6
7

8

9

01

1

1

2

1

3

1

41

5

1

6

1

ssC

YALED

FC

nimFR

YBTS
NESI
EN

IL

POTS_CFPSID

D

NG

GVL

ccV

.C.N

TUO

GVH

TOOBV

1

79R

%1_ K7.2

1

79L

Hu5.3

109

D

12VA

B

339R

7M

4

59

9Q

C758CB

609D

3

0

1

VAB

539

DH

knistaeH

1

489

C

V

001/Fn01

1

2

469R

K0

01

+

649C

V

52 Fu074

+

7

0

9C

V054

F

u00

1

399

R

%1_K7

2

C980

1.5nF/500V

069C

VK1/Fp022

139L

Hu5.3

319R

%1_2K

8

719R

R033

389D

012RS

0

89

D

6001GU

109CI

1696GS

123

4 5

678

INV

COMP

MOT

CS ZCD

GND

OUT

VCC

709

R

K42

389C

Fu1.0

109QH

knist

a

eH

2

1

199C

I

G3011TECT

12

43

9

09

R

%

1_R

02

6

189R

%1_

K21

12

0

89BF

daeB

1

2

109GS

-14SGAM10

2

199R

%1_K21

609R
MHO

2

2

0

9

9

C

VK1

FP0051

559

D

00102P

S

1

2

3

209GS

-14SGAM102

959R

K022

479

R

K2.1

599R

K3.3

889R

K033

IRP

209T

7953-

RE

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1
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8

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11
21
31

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2

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4
5
6
7

8

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M

102

2

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PF60L5HTTS

769

R

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8

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5 W2/1 7M2

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1
2

3

4
5
6
7

8

9

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21
31

1
2

3

4
5
6
7

8

9
0

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1

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C748C

B

039R

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699R

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299R

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80

9

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399

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R

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t

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12

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R074

499R

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369R

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1

209L
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2

4

3

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+

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3

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209C

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489

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01

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C

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289CI
134LT

989C

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189

D

Z

5

1C-97XZ

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+

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539R
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M

4

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86

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7

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44ATBMP

10

9

Q

N06MN12FTS

2

1

3

8

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319

C

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5

49R
K74

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6

99

Q

44ATBM

P

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H

m31

124

3

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50

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C

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509

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YNT

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I

1

6

27

4

8

5

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S

M/PBS

D

S

S

519R

W1_R

2

1

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MHO 01

A01

A01

18400_500_090301.eps

090619

Power Board Inverter

10. Circuit Diagrams and PWB Layouts

Power Board Inverter, 32PFL54xx AUO panel

EN 38TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 39TPM3.1E LA 10.

Power Board Adapter, 32PFL54xx LGD panel

A02

A

D

H

2

B B

C C

D D

E

F

G G

1

LIPS without PFC

517"23/"62

12

0

9B

1

1

3

409GS

02-

14SG

R

1

09GS

12

309BF

DAEB

1
2

12

HT

t

3

4

109BF

D

AEB

1

+

!

2

-

B

109D

K

6JB

4

9

50

VR

!

142

209L

AM1

AM102-14SG

109

2 Hm6

3

!

109C

FP074

309C

C

809

V572/Fu22.0

!

!

142

109L

3

6

09C

!

V

572/Fu22.0

!

VR

109

T

YF4CFK16541RV

09NC

4

)CN(NNOC

510YGM65R231KCS

!

1

1

2

109F

V052 A5 ESUF

1-8033G

09J

1

CN

G80

309GS

A0.

AM102-14S

G

!

C

209

FP074

repmuJ

W2/1 %5-+ MHOM3109

!

GS

G

A0.2 Hm41

!

2

NC

109

TEKCOS

2

R904

NC

+

NC

309V

R

C909

1 2

R905

NC

1 2

R906

NC

+

1 2

R907

NC

1 2

209

AM10

2-14S

C

N

209VR

C

N

C907

120uF/450V

0

9D

3

CN_7004N1

109D

CN_7004N1

3

509J

muJ

eriw

p

519C

FP005

VK1

1

4

129C

+

V05/Fu22

C922

1uF/25V

029R

K

01

S-ddV

039R

R7.4

BZX79-C9V1_NC

19R

3

CN_2M2

309R

W

%5-+ MHOK01

4/1

739C

CN_V05

2

N2

ZD909

1 2

1 2

1 2

5

719C

V05 N01

1

2

3

4 5

C919

100pF

309Q

M

1

RLZ20B

R

C

ZD901

Y

NT

6

S

7

S

8

S

209

D

1

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6

4

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8

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H

F

B

SC

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23

23

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I

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7

CN

6

C

CV

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DS

M
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1

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1

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45

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12

Z

D

509

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8

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0

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P

7

B

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C

0

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1

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109

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1

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0

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1

7

8

2

9
1

3

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5
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D

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0

11
21

3

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509

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C

+

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2

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1

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1

1

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R

049

309CI

12

43

1

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G

30

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709

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W

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12

43

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!

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209T

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A081EK6P

1

3

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2

4

5

!

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CN_W2 MHO K51

1

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0

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8

7

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C

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P31 348

4

6

5.2

1
2

3

4
5
6
7

8

9
1

0

1

1

1

2

1

3

9

0

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11

A02

R

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H

M

01

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0

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2

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3

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B

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609

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+

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8

1

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B

1

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7

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0

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9

2

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D

B

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I

C

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Q

A

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M

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1

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B

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R

1F 109NC

B 109

1D 209C

D 309C

1

C 2

9

B

7C 81

8B 929C 9B 829C

D

C

219D

109J

409

409R

929R

159R

2

309D 5G

A 10

7E

1

9BF

CI 8C

409

D

309

9B

509L

8E

6B

Q 9E 709Q

2B 209VR

309VR

2A

R 2A

50

9

G 119R

R

7C

9A 639

R 9

8C

C 249R

149R

9E 649R

S

8F

769R 8F 659R

1C 409GS

HT

6F 309

DZ

5G 209DZ

11

A

C 2

909C 1D 80

9

19C 3G 519C 5F 419C 5F 319C

E

639C 8F 539C 8E 439C 8E 339C
149C 9G 049C 9G 939C 7B 839C

409

9BF

0

7E

9BF

3

20

09CI 8

609CI

5

8D

F

1E 109L 3A 509J 1B

7B 109Q

819Q 8F 809

509VR

B 709R

2

9R 2B

B 60

5F 319R 6G 219R 6

2

7B

9R 6B 529R 7B 429R

6

8B 839R 8B 739R

449R

9C

D

349

849R 9E 749R

8F

359R 8F 259R 7F

G

DZ 6E 409DZ

1D 109C 1F 409NC 8G 209NC

1E 609C 8B 509C 8B 409C

E

219C 6E

6

B 719C 5D 6

5
4B 2

29C 4B 129C 6B 029C 5C 919C

9B 729C 8B 629C 8A 529C 7A 429C 5G 329C

39C 8C 139C 9B 039C

8E 2

4G 739C 9
2C 109D 9G
6D 609D

6E 509D 6E

8B 119D 8B 019D 7B 909D 7B 809D 6B 709D

10

1E

1F

9F

5B 209CI 5F 109CI 7B 109QH 8B 119DH 1A 109

7F 709

7

I

C

9B

309L 1C 209L

Q

5D 309

6G 209Q

1F 109VR

6G

4G 309R 1D 109R 1C

6G

019

2

R

6E 519R 5E 419R

129

5B 029R 5G 919R 6F 819R 6F 719R

6B

R

7

C 829R 7B 729R

539R 5D 239R 5D 139R 4C 039

8A

9B 939R

8C 049R

C 549R

9

8

F 059R 7F 949R 9E

7

9F 559R 8E 459R

309GS

2E 209GS 1E 109

1C

5E 109DZ

7E 209T 8A 109T 1F 109

B 509

9B 609DZ

6

7A 119DZ 6F 019DZ 5D 909DZ 7F 809DZ 8C 709DZ

A

E

F

H

1

2

3

4

5

6

7

8

9

0

1

1

1

H

18400_501_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

Layout Power Board, 32PFL54xx AUO Panel Top Side

EN 40TPM3.1E LA 10.

BD901 C4
C901 D4
C902 E3
C903 E2
C904 E3
C905 C4
C906 B4
C907 D1
C917 B2
C918 C2
C934 C2
C939 C1
C941 C2
C943 A2
C946 A3
C947 A4
C950 A3
C960 D3
C980 B3
C981 B4
C984 A4
C985 A4
C986 A4
C990 D2
CN901 E4
CN902 A4
CN903 A1
D901 C1
D902 D2
D903 C2
D935 A4
D951 C2
D952 C1
D955 A2
D956 A3
D980 B3
D981 B4
D983 A2
D984 A3
F901 D4
FB904 D2
FB980 A4
FB981 D4
FB982 D3
FB983 C2
FB984 D4
FB985 D3
HBD901 C4
HD935 A
HD955 A2
HQ901 D2
IC931 C4
IC932 B4
IC952 B1
IC953 B1
IC982 B4

3

IC991 B3
J941 C2
J942 C2
J943 C3
J944 B3
J945 C3
J946 C4
J947 D3
J951 B1
J952 B1
J953 C1
J954 C1
J955 C2
J961 D2
J981 A3
J982 A4
J983 A4
J985 A2
J986 A3
J987 A2
L901 D3
L902 E2
L931 A3
L932 A3
L971 A2
L980 A4
L981 C3
NR901 D4
Q901 D2
Q945 B3
Q951 C2
Q952 C1
R901 E3
R905 C3
R906 C4
R915 C2
R917 C3
R920 C4
R921 B2
R945 B3
R964 D1
R965 C2
R983 A4
RV901 D4

SG901 D4
SG902 D3
SG903 E3
SG904 E2

T901 B4
T902 B2
ZD930 C4
ZD931 C4
ZD932 B1
ZD965 B3
ZD980 B3
ZD981 B4

2009-Jun-26

18400_503_090301.eps

090619

Circuit Diagrams and PWB Layouts

C911 C3
C913 C3
C914 C3
C915 C3
C931 C4
C932 C2
C933 C2
C935 D1
C936 C1
C937 A4
C938 A4
C940 D1
C942 C2
C948 B1
C983 C4
C989 B4
D904 B2
D905 B3
D906 B4
IC901 C3
IC951 C1
Q931 C4
Q988 A4
Q993 B4
Q994 C2
Q995 D2
Q996 C3
Q997 C3
R907 C3
R908 C3
R909 C3
R910 C3
R911 C3
R912 C3
R913 C3
R914 D2
R916 D2
R918 C3
R919 C2
R922 B1
R930 C4
R931 C4

R933 C4
R934 D4
R935 D4
R946 B3
R947 D2
R948 A3
R956 D1
R957 C2
R958 C2
R959 C1
R960 C2
R961 C2
R962 C1
R963 C1
R967 C1
R968 B1
R969 B1
R970 B1
R971 B1
R972 B1
R973 B1
R974 A1
R975 C2
R976 A3
R978 B1
R980 A3
R981 B1
R982 B4
R984 B4
R985 B4
R986 B3
R988 C4
R989 C1
R991 B4
R992 B4
R993 B4
R994 A4
R995 B4
R996 A4

18400_504_090301.eps

090619

Layout Power Board, 32PFL54xx AUO Panel Bottom Side

EN 41TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 42TPM3.1E LA 10.

Power Board Inverter, 32PFL54xx LGD panel

A A

B B

C

D D

E E

F

G

1

A01

2

Inverter

3

B F

I

+ B

1 0 8 C I

1

F I

1 1 8 C

V 0 5 N 5 1

1 8

2

C

V 0 5 N 0 5

1

3 1 8 C

N 2

7

4 1 8 C

V 0 5 N 0 5 1

5

C

1 8

V

0 5 P 7 4

K 3 3 6 0 8 R

0 1 8 R

M H O 0

6

C

1 8

V 0 5 P 8 6

8 C

3 2

N

F

P 0 7 4

B

2

B F I C

3

B F

V

4

5

6

7

8

9

0 1

1 1

C

1

2

S

B F V C

P W S C

N

T C

N

F C

G

F E R I

M W P C

E

D N G S

M M O

M W

A F

P T L U

, N

1 7 0 2 A B

U

4

5

6

7

8

9

0 1

A01

1

0 8 B F

0 8 C

3

V 0 5 4 F U 1

Jump wire

4 2

H G

3 2

S F

2 2

H

2

1

C N

0 2

C

9 1

C

8 1

L

7 1

D N G P

1

6

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18400_502_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

BD901 E2
C802 B2
C803 B3
C807 A1
C809 A1
C901 E3
C902 E3
C903 E3
C904 D3
C905 D4
C906 D4
C907 D1
C908 E3
C909 D1
C911 C3
C912 D3
C915 D3
C921 C2
C924 B3
C925 C4
C926 C4
C927 B4
C928 B4
C929 B4
C930 B4
C932 C4
C933 C4
C934 C4
CN802 B1
CN803 A1
CN901 E4
CN902 B4
CN904 D4
D901 D2
D902 D3
D903 D2
D904 D3
D905 C3
D906 C2
D909 B3
D910 C4
D911 B4
D912 C4
F901 D4
FB801 B2
FB901 E2
FB902 C4
FB903 D4
HBD901 E2
HD911 B4
HQ901 C3
IC803 A4
IC

804 B3

IC805 A4

IC806 A4
IC901 C3
IC903 B3
IC904 B4
IC905 C4
IC906 C4
IC907 C4
J901 D2
J902 A3
J905 D1
J906 B4
J907 D3
J908 A3
J909 B4
J910 C4
J911 D4
J912 A3
J913 B3
J914 B3
J915 C4
J916 C2
J917 A3
J919 D3
J920 C2
J921 A2
J922 B3
L901 D4
L902 E2
L903 B4
L904 B4
L905 C4
Q801 A3
Q802 A3
Q808 A4
Q901 C3
R812 A4
R813 A4
R824 A4
R901 E3
R910 D2
R912 D3
R917 C3
R929 C2
R930 C2
R939 B4
R949 C4
RV901 D4
RV902 C1
RV903 C1
RV905 E2

SG901 D4
SG902 E3
SG903 E2
SG904 D3

T801 A4
T803 A2
T901 B3
T902 C3
TH901 D4
ZD902 D3
ZD904 C3
ZD906 B4
ZD910 C3
ZD911 B3

18400_505_090301.eps

090619

Layout Power Board, 32PFL54xx LGD Panel Top Side

EN 43TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

C801 A3
C804 A3
C805 A3
C806 A3
C808 A3
C810 A3
C811 A3
C812 A3
C813 A3
C814 A3
C815 A3
C816 A3
C819 A3
C821 A4
C822 A4
C823 A3
C824 A4
C825 A4
C826 A3
C827 A3
C82

8 A3
C913 C3
C914 C3
C916 D3
C917 B2
C918 B3
C919 C2
C920 B3
C922 C2
C923 D3
C931 B4
C935 C4
C936 B4
C937 D3
C938 C3
C939 B4
C940 B4
C941 B4
D801 A3
D802 A3
D803 A4
D907 C2
D908 C3
IC801 A3
IC902 B2
J903 B4
J904 A3
Q806 B3
Q807 A4
Q902 D3
Q903 D3
Q904 B3
Q907 B4

Q908 C4
Q918 D2
R801 A3
R802 A3
R804 B3
R806 A3
R807 A3
R808 B3
R809 A3
R810 A3
R811 A4
R814 A4
R815 A4
R816 A4
R817 A4
R818 A4
R819 A4
R820 A4
R821 A4
R822 A4
R823 A4
R825 A4
R826 A4
R827 A3
R903 D3
R904 C1
R905 C1
R906 C1
R907 C2
R911 D3
R913 D3
R914 D3
R915 D3
R918 C3
R919 D3
R920 B2
R921 B3
R924 C3
R925 C2
R926 C3
R927 C3
R928 B2
R931 D3
R932 D3
R935 C4
R936 C4
R937 B4
R938 B4
R940 B4
R941 B4
R942 B4
R943 B4
R944 B4

R945 B4
R946 B4
R947 B4
R948 B4
R950 C4
R951 C4
R952 C4
R953 C4
R954 C4
R955 C4
R956 C4
R967 C5
ZD801 B3
ZD802 A4
ZD901 D3
ZD903 C3
ZD905 B3
ZD907 B4
ZD908 C4
ZD909 D2

18400_506_090301.eps

090619

Layout Power Board, 32PFL54xx LGD Panel Bottom Side

EN 44TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 45TPM3.1E LA 10.

Power Board Adapter, 32PFL56xx

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D

0 9

D

1 9 D

I

9 C

I

C I

9 L
9

Q

Q

9 R

2 9

R

2 9 R

9

R

3

R

9

R

9 R

R

5 9

R
R

5 9

R
R

D Z

A01

1

0 9 D B

1

D

1

9

C

B 5

6

A 7 0 9 C

2 A 9

7

C

E 1

C

3 1

6 F

6 B 7 1 9 C

9 1 9 C

5

C 1

5 A 3 2 9

C

0 1

B 7

9

D

1

5

G 9

2 B 3

5

4 B

D

7

7

E

4

7 B 7 0 9 D

8

D

B 9
B 1 1 9 D

9

3 C

3

1

1 9 D H

9

D 4 0 9 C I
F 6 0

2

9 0 9

B

9 B 4 0 9 L

6 G 2 0

1

5 0 9 V R

C

B

8 0

5 B 0 1 9 R

6 G

2 1 9 R

7 1 9 R

7 B

1

B 4

7 C 8 2 9 R

6 3

8 3 9 R

2 4

9 E 6 4 9 R

R

0 1 E 8 4 9 R

0

F 6

9

B 4 6 9 R

5 C

8 6 9

3 0 9 D Z

5

0 9

7 A 1 1 9 D Z

1

1

G

1

1 0 9 N C 1 B

F 4

N C 8 G 2 0 9 N

1

0 9

0 9

1 D 2

C

8 B 4 0 9 C 1 E 3 0 9 C

6 0 9

1 F
1 E 8 0 9 C

G 0 1 9 C

3

6

2 1 9

F

6 F 4

1 9

5 D 6 1 9 C 6 G 5 1 9 C
8

C 8 1 9 C

7 B 0 2 9 C 5 C
6 C

2 9

2

C

8 A 4 2 9
9 B 6 2 9 C 9 A 5 2 9 C

9

B 8 2 9 C

0 1 B 0 3 9 C 9 B 9 2 9 C

3 9 C

8 E 2

9 E 4 3 9 C 8 E 3 3 9 C

0 1 E 6 3 9 C 8 F

B 8

8

3 9 C 4 G 7 3 9 C

8 G 0 4 9 C 8

2 B 2 4 9 C 8 H 1 4 9 C

4 4

2 C

9 C

3 B

4 9 C 2 C

6

2 0 9

5 G
7 E 5 0 9 D
7 B 8 0 9 D
9

0 1 9

B

8 E 2 1 9 D

4 A 4 1 9 D

8 E 2 0 9 B F 1 A 1 0 9 B F

5

0 9 B F 1 F 3 0 9 B F

4 A

1

A 1 0 9 D B H 1 G 1 0 9 F

8 B

1 0 9 Q H 9 B

C

5 F 1 0 9

4 B 4 0 9 Q H

I

8 C 3 0 9 C I 6 B 2 0 9 C

8

D 5 0 9 C I

8 F

0 9 C I 7

7

E

1

1

0 9 L

9 B 3 0 9 L 1 D 2 0 9 L

8 E 5

0 9 L

B

8

1 0 9 Q 3 A 6 0

D

5

3 0 9 Q

6 B 5 0 9 Q 4 B 4 0 9 Q

9 F

9 Q 9 E 7 0 9 Q

8 0

0 1 9 Q 7 G 9 0 9 Q

5 C

1 0 9 V R 5 A 1 1 9

1 F
1

E 1 0 9

R

4 G 3 0 9 R 5 A 2 0 9 R
5 B 5 0 9 R 5 A 4 0 9 R

B 7 0 9 R 5 B 6 0 9 R

4
3 B

0 9 R 3

9

G

7

1 1 9 R

5 F 3 1 9 R
6 F 5 1 9 R 6 F 4 1 9 R
7 F

8 1 9 R 7 F

B 0 2 9 R 6 G 9 1 9 R

5

6 G 2 2

9 R

C

2 9 R 8

7

5

8 C 7 2 9 R 7 B 6 2 9 R

9 2

8 D

9 R

D 1 3 9 R 5 C 0 3 9 R

6

9 A

9 R 5 D 2

5 3

9 B

9 R 9 A

7 3

0 1 B 9 3 9 R 9 B

9 C

1 4 9 R 9 C 0 4 9

0 1 C 3 4 9 R 9 D

8 C 5 4 9 R 0 1 D 4 4 9 R

E

7

9

4 9

F

R

8

9 4 9

8 F

1 5 9 R 8 F

8 F

9 R 8 F 2 5 9 R

3 5

9 G 5 5 9 R 8 F 4 5 9
2 B

7

5 9 R

2 C 9 5 9 R 2 B 8 5 9 R

3 B 1 6 9 R 2 C 0 6 9 R
4 B 3 6 9 R 3 B 2 6 9 R

3 C

9 R 4

5 6

9 G 7 6 9 R 4 C 6 6 9

1 0 9 G S

1 E

1

D 3 0 9 G S 2 E 2 0 9 G S

1 G 1 0 9 H T 1 D 4 0 9 G S

7 E 2 0 9 T 8 A 1 0 9 T

4 G 2 0 9 D Z 5 F 1 0 9 D Z

E 4 0 9

7

D Z 6 F

D

6 0 9

0 1 B

Z 6 B

D Z 8 D 7 0 9 D Z

8 F 8 0 9
6 F 0 1 9 D Z 5 D 9 0 9 D Z

A

C

D

H

1

2

3

4

5

6

7

8

9

0

1

1

1

18400_507_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 46TPM3.1E LA 10.

Power Board Inverter, 32PFL56xx

1

A02

A

B B

C

D D

E E

F

G

Inverter

2

3

B

F I

1

I

1 1 8 C

V

0 5 N 5 1

8

2 1

C

5 N

V 0

0 5 1

3 1 8

C

7 N 2

4

1 8 C

V 0 5 N 0 5

1

8

5 1

C

V 0 5 P 7 4

8 R

K 3 3 6 0

1 8

0

R

M H O 0

6 1 8

C

V 0

5 P 8 6

F N

3

2 8 C
0 7 4

P

B F

2

C

I

3

V

B F

4

5

6

T

C

7

C

F

8

E R I

9

0

1

1

1

O C

2

1

4

+ B

1 0 8 C I

B F

B F V C

P W S C

F

M W P C

D N G S

M

M

L U

A F , N

4

2

H G

3 2

S

F

2 2

H S

1 2

C

N

2

0

C N

1

9

C

N

8 1

L

G

1

7

D N G P

6 1

D V

D

5

1

N E

1

4

a M W P

3 1

d

M W P T

1 7 0 2 A B U

8 R

2

R

K 9 3

0 8 R

0

1

1 0 8 C

0 1

V 0 5 N 0

d V

d

7

M H O 0

9

1 8 C

1

N 0

V 0 5

9 0 8

W 8 /

5 - + M H O

1 %

7

%

8 / 1 K 0

1 W

R
4

7

K

5

3 0 8 C

0 5 4 F U

V

1

R

8

1 0

7 R 4

2 0 8 R

7 R

4

4 0 8

C

2 U

V 5 2

2

8 0 8 R

K 8 6

4 3

!

4 3

4 0 8 C I

3

0 1 1 T E C T

4 3

!

8 R

4 2

/ 1

1

% 5 W 6

K 0

!

4 3

6

1 8

5 1 8 R

1 W 8 / 1

%

7 K 2

C

T O H

2

1

3

2

1

S

3

6 0 8 Q

L C 8 4 8 C B

G

Z

1 1 8 R

L R

K 0 0 1

1 2

!

1 2

R

3 0 8 C I

T

1 2

3 1 8

R

/ 1

6

R 0 7 4

8 R

K 2

1 2

5

0 8 C I

3 0 1 1 T E C T

0 8 Q

7

3 2

4 0 9 3 S B M P

1

1 2

7

R

1 8

8 C I

6

0

T

3 0 1 1 T E C

8 0 8 Q

1

3 4 L T

D

L O

6

7

8

D L O C T O H

3 0 8 T

8 2 U U - F R T

1

2

1

0 8 Q

5 K N 4 1 P T S

P F Z 0

4

6

5

8 3

7

C

7 0 8

V K 6 / F p 5 1

6 0 8 C

2

5

N 1

!

2

0 8 Q

5

K

P T

P F Z 0

N 4 1

2 0

8 C

F N 0 7

V 0 5 4

4

4 0 8 R

% 1 W 8 / 1 R 0 7 4

1 0

8 D

3 1 Z

B

E

A

2 1 8

3

0 1 1 T E C

% 5 W

4 1

% 1 W 8 / 1 7

r o h s V

2

2 8 C

0 1

% 1 W 8 / 1 7 K 2

4 2 8 C

U 1

N

% 5 W 6 / 1 R 0 7 4

I D

M

V 2 1

Z

t

1

0 2 8

R

V 0 5 N 0

1

V

2

9 1

8 R

8 1 8 R

W 8 / 1 4 K 5 1

V 5 2 F

T O H

4

3

5 2 8 R

2 8 R

2

R 3 3

7

R

3

!

S - d d V

2 0 8 D

B 6 . 3 Z L R

2

C

8

2

% 1 W 8 / 1 K 0 9 3

0

0

1

W 4 / 1 % 5 - + M H O K 0 9 3

% 1

D L O C

1 0 8 T

1

2

U U - F R T

6 2 8 R

W 8 / 1 % 5 - + K 0 1

1

V 0 5

N

2 8 R

2

% 1 W 8 / 1 K 0 1

8 . 9

C

8 0 8

V

2 N

0 5

1

C

2
1

3 0 8 N

C

N

N O C

6 2 8 C

5 P 0 2 2

V 0

V 0

1

4

1

2 0 8 D

B

9 9 V A

8 2

8 C

0 5 P 0

2 2

V

N C

9 0 8

C

V K 6 / F p 5 1

2
1

0 8 C

5

4

5

7

P 0

3

1 0 8

D

9 V A

9

B

2

7 2 8 C

V 0 5 7 N

2

3

1 8

C

0

P 0

V 0 5

7 4

0 8

2

N N O

9

1

0

1 1

A02

2 0 8 N

8 E

C

V 0

2

0 8

3

D

3

B

9 9 V A

1

8

R

1 2

K 8

6

5

C

2 8
7

N 2

8 B 3 0 8 N C

4 C 1 0 8 C

C

6

2 0 8 C

4 B 3 0 8 C
5 C 4

C

0 8

5

8 B

0 8 C

7

6 0 8 C

C

7

7 0 8 C

B

7

8

D

0 8

C

0 8

7 E 9

C

8 E

0 1 8 C

8

1 1

3 C

C

3 C

2 1 8 C

3 C 3 1 8 C

C 4 1 8

3

C

3 C 5 1 8 C
3 D 6 1 8 C

9 1 8

4 D

C

6

1 2 8 C

F

5 F 2 2 8

C

3

3 2 8 C

D

5 G 4 2 8

C

2 8

9 E 5

C

8 C 6 2 8 C
8 C 7 2 8

C

8 D 8 2 8 C
8 C 1 0 8 D
8

D 2 0 8 D
D 3 0 8

9

D

4

1 0 8 C I

C
E 3 0 8 C

5

I

4

C I

5 E

0 8

I

0 8

5 E 5

C

5 F

6 0 8 C I

5 B

1 0 8 Q

Q

5 C 2 0 8
5

D 6 0 8

Q

5 F

7 0 8 Q

5 G 8 0 8 Q

1 0 8

C

R

5
5 C 2 0 8 R
6 D 4 0 8 R

C 6 0 8 R

3

0 8 R

4 E 7
5 D 8 0 8 R
4 E 9 0 8 R

R

3 C 0 1

8

5 D 1 1 8 R
6 D

2 1 8 R

5 E 3 1 8 R
6 E 4 1 8 R

G

5

1 8

5

R

5 F 6 1 8 R
5 F 7 1 8 R

6

1 8

G 8

R

6

G 9 1 8 R

6 F 0

2 8 R

1 2 8 R

9 E
7 C

R

2 2 8

6 C

3 2 8 R

4 2 8 R

5 F

R

6 C 5 2 8
7 F

6 2 8 R

2

7

4 D

8 R

7 C 1 0 8 T

6 B 3

0 8 T

5 D 1

0 8 D Z

6

2 0 8 D Z

F

A

C

F

G

H

1

2

3

4

5

6

7

8

9

1

0

1 1

H

18400_508_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

Layout Power board, 32PFL56xx Top Side

EN 47TPM3.1E LA 10.

BD901 E2
C802 B2
C803 B3
C807 A1
C809 A1
C901 E3
C902 E3
C903 E3
C904 D3
C905 D4
C906 D4
C907 D1
C908 E3
C909 D1
C910 D2
C911 C3
C912 D3
C921 C2
C923 D1
C924 B3
C925 C4
C926 C4
C927 B4
C928 B4
C929 B4
C930 B4
C932 C4
C933 C4
C934 C4
C947 C1
CN802 B1
CN803 A1
CN901 E4
CN902 B4
CN904 D4
D902 D3
D904 D3
D905 C3
D909 B3
D910 C4
D911 B4
D912 C4
D914 C1
F901 D4
FB901 E1
FB902 C4
FB903 D4
FB905 C1
HBD901 E2
HD911 B4
HQ901 C2
HQ904 C1
IC803 A4
IC804 B3

IC805 A4

806 A4

IC
IC901 C3
IC903 B3
IC904 B4
IC905 C4
IC906 C4
IC907 C4
J901 D1
J902 A3
J905 C1
J906 B4
J907 D2
J908 A3
J909 B4
J910 C4
J911 D4
J913 B3
J914 B3
J915 C4
J916 D2
J917 A3
J919 C2
J921 A2
J922 B3
J923 C2
J924 A3
J925 D3
L901 D3
L902 E2
L903 B4
L904 B4
L905 C4
L906 C2
Q801 A3
Q802 A3
Q808 A4
Q901 C2
Q904 C1
Q911 D2
R812 A4
R813 A4
R824 A4
R901 E3
R907 D2
R911 D2
R912 D3
R917 D3
R929 C2
R930 D2
R932 C3
R939 B4
R949 C4
R966 C2

RV901 D4
RV905 E2

SG901 D3
SG902 E
SG903 E2
SG904 D2

T801 A4
T803 A2
T901 B3
T902 C3
TH901 D4
ZD902 D3
ZD904 C3
ZD906 B4
ZD910 C3
ZD911 B3

3

2009-Jun-26

18400_509_090301.eps

090619

Circuit Diagrams and PWB Layouts

C801 A3 R815 A4
C804 A3 R816 A4
C805 A3 R817 A4
C806 A3 R818 A4
C808 A3 R819 A4
C810 A3 R820 A4
C811 A3 R821 A4
C812 A3 R822 A4
C813 A3 R823 A4
C814 A3 R825 A4
C815 A3 R826 A4
C816 A3 R827 A3
C819 A3 R902 D2
C8

21 A4 R903 D2
C822 A4 R904 D2
C823 A3 R905 D2
C824 A4 R906 D2
C825 A4 R908 D2
C826 A3 R909 C2
C827 A3 R910 D2
C828 A3 R913 D3
C913 C3 R914 D3
C914 C3 R915 C3
C915 D3 R918 C3
C916 C3 R919 D3
C917 B2 R920 B2
C918 B3 R921 B3
C919 C2 R922 D3
C920 B3 R924 C3
C922 C2 R925 C2
C931 B4 R926 C2
C935 C4 R927 C2
C936 B4 R928 B2
C937 D2 R931 C3
C938

C3 R935 C4
C939 B4 R936 C4
C940 B4 R937 B4
C941 B4 R938 B4
C942 C2 R940 B4
C943 C2 R941 B4
C944 C2 R942 B4
C945 C2 R943 B4
C946 C2 R944 B4
D801 A3 R945 B4
D802 A3 R946 B4
D803 A4 R947 B4
D907 C2 R948 B4
D908 C3 R950 C4
D913 C2 R951 C4
IC801 A3 R952 C4
IC902 B2 R953 C4
IC909 C2 R954 C4

J903 B4 R955 C4
J904 A3 R956 C4
J912 C2 R957 C2
Q806 B3 R958 C2
Q807 A4 R959 C2
Q902 D3 R960 C2
Q903 C3 R961 C2
Q905 B3 R962 C2
Q907 B4 R963 C2
Q908 C4 R964 C1
Q909 D3 R965 C2
Q910 D3 R967 C4
R801 A3 R96

8 D3
R802 A3 ZD801 B3
R804 B3 ZD802 A4
R806 A3 ZD901 D3
R807 A3 ZD903 C3
R808 B3 ZD905 B3
R809 A3 ZD907 B4
R810 A3 ZD908 C4
R811 A4 ZD909 D2
R814 A4

18400_510_090301eps

090619

Layout Power Board, 32PFL56xx Bottom Side

EN 48TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

0

1

0 1

1

1

1 1

A A

B

B

C

C

D D

E E

F F

G G

H H

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

C N

!

!

C N

!

!

!

!

C

N

C N

C N

C

N

C

N

C N

2 E

1 0 9 N C

1 B 1 0

9 D

B

1 C

1 0

9 C 0 1 F 3 0 9 N

C

8 B

3 0 9 C 2 C 2 0 9 C

1 C

5 0 9 C 8 B

4

0 9

C

2

D 8 0 9

C 6 A 7 0 9 C

3 G 0

1 9

C

1

C

9

0 9

C

2

B 2 1 9 C 3 A 1 1 9 C

4 E 4 1 9 C 2 B 3 1 9 C
2

B 6 1 9 C 6 C

5 1 9 C

5 C 8 1 9 C 5 B 7 1 9 C
3 B

0 2 9 C 7 B 9 1 9 C

3 C

2 2 9 C 7 A 1 2 9 C

5 A

4

2

9 C 7 C

3 2

9 C

7

B

7 2 9

C

6

E 6

2 9 C

7 A

9

2 9 C 5 B

8

2

9

C

8 A

1 3 9 C 9 E 0 3 9 C

9 B

3 3 9

C

9

B 2 3 9 C

8 C

5 3

9 C

8 B 4 3 9 C

9 B 7

3 9

C

7

C 6

3 9

C

0 1 F 9

3 9

C

0 1 B 8 3 9 C

0 1

F

1 4 9 C 0 1 F 0 4 9

C

5 E 5 4 9

C

5

G 2 4 9 C

5 F

7

4 9 C 5 F 6 4 9 C

7 E 9 4 9 C 5 F 8 4 9 C
8 E

1 5 9 C 7 E 0 5 9

C

6 A 3 5 9 C 7 F 2

5 9

C

2

C 5 5 9 C

5 C

4 5 9 C

7 B 2 0 9 D 5 A

1

0 9

D

4 B

0 1 9 D 3 G

4 0 9

D

6

E

4

1 9

D

7

C 3

1 9

D

5 F 6

1 9 D

6 E 5 1 9 D

8 B

1 2 9

D

7 E 7 1 9

D

7 B

3 2 9 D 8 A 2 2 9 D

1

E 2 0 9 B F 1 A

1 0

9 B F

7 E

7

0 9 B F 5 A

5 0

9 B

F

8

B 1 2 9 D H 1

E 1

0 9 F

7 B 3 0 9 Q H 5 B 2 0 9 Q H

3 B 2 0 9 C I 5 B 1 0 9 C

I

8 D 4 0 9 C I 8 C 3 0 9 C I

6

F 7 0 9

C I 4 F 5 0 9 C I

8

D 1

2 9 C I

7 F 8 0 9 C I

1 C

2

0

9

L 1 D 1 0 9

L

9 A 1 2 9 L 8 E 7 0 9 L

1 D

3 2

9 L

9 B

2

2

9 L

7 B 3 0 9 Q 4 B

2

0

9

Q

9 E 9 0 9 Q 4 D 7 0 9 Q
6 B

1 1 9

Q

8 G 0

1

9

Q

4 C

6 1 9 Q 5 G

5 1

9

Q

4 G

8

1 9 Q 5

A

7 1 9 Q

1 B 2 0 9 V R 2 E 1 0 9 V R

6

A 4 0 9 R 2 D 1 0 9

R

4 C

6 0

9

R 5 B 5 0 9 R

4 A 8 0 9 R 5 A

7 0 9 R

6 A 0 1 9 R 3 A 9 0 9 R
5 B

2 1

9 R

2

A 1

1 9

R

2 B

4

1 9 R 2 B

3 1

9

R

4 B 6 1

9 R

6 B

5 1

9

R

3 B

8 1 9 R 4 B

7 1 9

R

4 C 0 2 9 R 4 B 9 1 9 R

5 F 2

2 9 R

7 F

1 2 9 R

7 C 4

2 9

R

7

A 3 2 9 R

4 D 6 2 9 R 4

D

5

2 9

R

7

C 8 2 9 R 7 B 7 2 9 R

7 C 0 3 9 R 4 B 9 2 9 R

3 G 4 3 9 R 6 B 1 3 9 R

9

A 6 3 9 R 9 A 5 3 9

R

9 D

8 3

9 R 8 C 7

3 9

R

9 D

1 4 9 R 8 C 9 3 9

R

9 B 3 4 9 R 9 B 2 4 9 R
9 E 5 4 9 R 8 E 4 4 9 R

9 E

7 4

9 R 4 G

6

4

9 R

9 C 9 4 9 R 5 G 8 4 9 R

5 F

1

5 9 R 3 B

0

5 9

R

7 F

3 5

9 R 8 G

2

5

9

R

7 F 5 5 9 R

9 B 4 5 9 R

7 G 7 5 9 R

7 F

6 5

9

R

6 F

9 5 9 R 9 C

8

5 9

R

8

B

1 6 9

R 8 F 0 6 9 R

8 C

3 6

9 R

6 F

2 6

9

R

4 G 6 6 9 R 4 F 5 6 9 R
4 F

8 6 9 R 3 G 7 6 9 R

6

F 0 7

9 R 5

F

9

6

9

R

2 D 2

0 9 G S 1 D 1

0 9 G S

2 C

5

0 9

G

S

1 C

4 0 9

G

S

4 G 3

0 9

H T

1

E 2 0 9

H T

4 A

2 0

9 T

8 A

1 0

9 T

6 E 4 0 9 T 3 A 3 0 9 T

7 F

3

0 9 D Z 3

A 5 0 9 T

5 F

7 0

9 D Z 6 B 5 0 9 D Z

3 G 9

0

9

D Z

5

F

8

0

9 D

Z

9 B 4 2 9 D Z 4 F

2 1 9

D Z

8 D 5 2 9 D Z

+

B

B S V 5 +

+

6 4 9 C

V 5 3 F u 7

4

7 0

9 R

W 4 / 1 % 1 - + M H O M 1

4

5

9 C

V 0 5 P 0 7 4

9 5 9

R

W 4 / 1 M H O

0

0 1 9 D

8

4 1 4 L L M

5 4 9

C

V

0

0 5 / F u

2 2 0

0

.

0

2 5 9

R

M H O K

2

2

7 0 9 Q

K A 7 0 9

2 T B

M M

1

2

3

2 0 9 D

7 0 0 1 F U

5 1 9 C

V 5 2 / F u 1

4 0 9 D

1 2 V A B

6 3 9

R

M

H O 0 0 1

9

3 9 R

M H O 0

0 1

5 4 9

R

W 8 / 1

K

0

1

8 4 9

R

K 2

. 2

2 0 9 L

H m

6

1

4

2

3

1

2 9

C

V 0 0 5 / F u 2 2 0 0 . 0

1 0 9

C

F P

0 7

4

5

1 9 D

7 0

0 1 F

U

2 4 9

R

M H O 0 0

1

+

7

0 9 C

V 0 5 4 / F u 0 2 1

4

4 9

R

W 8 / 1 M H O K

2 .

2

5 3 9 R

M H O

0 0 1

7

3 9

R

W 8 / 1 M H O K

1

3 5

9 C

V 0 5 4 F U 1

4 5

9 R

W

4 / 1 M H O 0 0 1

5 0 9 C I

L T - N P 7

7 2

Y N

T

1

2

4

5
6
7
8

V U / N E

M / P B

D

S
S
S
S

1 2 9 D H

1

2 0

9 G

S

A

M 1 0 2 -

1 4 S G

3 0 9

N

C

N N O

C

1
2
3
4
5
6
7
8
9
0

1

1 1
2 1

3 1

8

1 9

Q

5

4 A T B

M P

2 0 9 C I

1 6

9

6 G S

1

2

3

4

8

7

6

5

B

F

p m o C

t l u

M

S

C

c c V

r e v i r

D

D

N

G

D C Z

3 2 9

L

0

_ L - 2

3

- 4 7 1 L 3

7

1

2

4

3

1

1

9

R

M H O K 7 .

8 1

0 2 9 C

V 5 2

/ F

u 1

8

0 9 R

W 4 / 1 % 1 - + M H O M 1

1

6 9 R

K 1

7 0 9 L

H u

8 . 0

1 2 9 L

H u 8 . 0

8 4 9 C

F u 1 . 0

5 2

9 R

W 8

/ 1

K 2

2

ZD905

RLZ18B

1 2

-

+

1

0 9

D B

G 8 0 6 J B

K

2

1

3

4

6

5

9 R

K 0 1

+

2 2 9 C

V 0 5 2 F u 2

1 2 9 R

K 3 . 3

1 0 9 C I

1

7 2

1 P C N

1

2

3

4

5

6

7

8

P

I

K

S

B

F

S C

V

R D D N

G

C

C V

C N

V

H

2

0 9 V R

1

6 5 4 1

R V

T

1 0 9 B

F

D A E B

1 2

4 3 9 R

W

3

M H O

K

5 1

0 1

9 C

F p 0 0 5 1

3 0 9 C

C

A V 0 5 2 F p 0 0 2 2

0 4

9

C

F u 1 . 0

0

2 9

R

M H O K 3 3

4 1 9

R

W 8 / 1 K

9 3

3 0 9 C I

G 3 0 1 1 T

E C T

1 2

4 3

6

1 9 Q

5

4 A T B

M P

9 0 9

R

W 4 / 1 % 1 - + M H O M 1

7 0 9 D Z

B 1 . 9 Z L R

1 2

8 6 9

R

R 0

8 3

9

R

K 5 . 1

5 1 9 Q

C 7 5 8 C B

3 1 9 D

8

4 1

4 L

L M

t

3 0 9 H T

C

T

P

1

2

9

4 9 R

W 8 / 1 K 0 1

1

0 9 L

H m 6

1

4

2

3

1 3 9 R

K 2 2

8

0 9 D Z

B

5 1 Z L R

1 2

5 2 9 D Z

B 3 1 Z L R

1 2

7 1

9

Q

A 4 9 A S P

M

2 6

9 R

% 5

W 4 / 1 R

7 4

1 1

9

C

V

0 5 4 F U 1

1

0 9 F

V 0

5 2 A 5 E S U F

3
4 1 2

1

0

9 D

P F 6

0

L 5 H T T

S

3

4 9 R

M

H

O 0 0 1

5

5 9

C

V

0

5 P 7 2

4

1 9

D

A

0 8 1 E K 6

P

+

1 5 9 C

V 6 1 /

F u

0 7 4

7 0 9 B F

3.5*4.7

7 4 9 R

K

7 4

+

8 3 9

C

V 5 3 F u 0 2 2

3 0 9 D Z

B 6 . 5 Z L R

1 2

0

1 9

R

W 8

/ 1

K 0 0

1

2

1 9

R

W 8 / 1

K 0 1

1

3

9

C

V K 1

F P 0 7 2

2 0 9 B F

D A E B

1 2

0

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F u 1 .

0

5

0 9 G S

A M

1 0

2

- 1

4 S G

9 1 9

C

F

u 1 . 0

1

5 9

R

R

7 4

8

1 9

R

W

8

/

1 K 7 4

4

0 9

C I

G 3 0 1 1 T E C T

1 2

4 3

2 1 9 C
V 5 2

/ F

u 1

7

2 9

R

M H O

0

1

0 7 9 R

W 8 / 1 K 0 9 3

6 0 9 R

W 4

/ 1

3 M 3

3 2 9 D

1 2 V A B

4

2 9

R

W 1

%

5 8 6 R 0

6 1 9 R

M H O 7

. 4

9

2 9 R

W

8 / 1

M H O K 2 2

4

2 9

C

V K 1 / F N 5 . 1

2 2 9 L

H

u 8 . 0

0 3 9 R

M H O K 1

3 1 9

R

W 8 / 1 K

0 1

1

0 9 T

8

2 - R E R E W O

P

1

6

2

3

5

9

1 1
2

1

7
8

0 1

5 0 9 R

W 4 / 1 3 M 3

3 0

9 Q

H

1

1 4 9 R

K

1 6 . 2

8 2 9

R

K

2 2

8 0 9 C I
1 3 4 L

T

9 0 9 C

V 5

7 2 N

0 8 6

0 4 0

1

F

B S 7 1 9

D

1

3

2

9 6 9 R

R 0

2 2 9 D

D

0 3 P G E

6 2 9 C

V 0

5 4 / F u 1 . 0

4 1 9

C

V

5

2 F N

0 1

4 2 9 D Z

A

3 1 E K 6

P

1 2

2

0 9 Q H

2

5 5

9

R

M

H O 0

4

0 9 R

W 4 / 1 3 M 3

3

0 9

Q

P F

Z 0 8 K N

8 P T S

6 2 9 R

W 8

/ 1 K 0 1

8 0 9 C

V 5 7 2 N 0 8 6

9 4 9

C

V 0 0 1 F u 1 0 . 0

2

1

9 D

Z

1

V 9 C -

5 5 X Z

B

1 2

6 3 9 C

V K 1 F P 0 0 1

8

1 9

C

F p 0 0 1

+

2

3 9 C

V 6 1

F u 0

0 2 2

1

2 9 C I

P / T A -

A 1

3 4 A I

K

7 5 9 R

W 8 / 1

%

1 M H O K 4 . 5 1

4 3

9 C

V

K 1 F P 0 7 2

0

5 9 R

W

4

/

1 M H O K 1

3 6 9 R

W 8 / 1 M H O K 7 . 4

8 2

9 C

V K

1 /

F P 0 2 2

5 0 9 C

r

e p m u j

9 1 9

R

W 3 M

H O 3

3 . 0

2 2 9 R

W 8 / 1 K 5 1

5 1

9 R

M H O 0 0 1

2

4

9

C

V

5 2 N 0 3 3

1 0 9 G S

A M 1 0 2 - 1 4

S

G

7 0 9 C I

3 0 1 1 T E C T

1 2

4 3

3

5 9 R

M

H O 0 0 1

1 2 9

D

0 0 1 0 1 P S

1

2

3

3 2 9 C

V 0 5 5 N

1

3 1 9 C

V

0 5 P 0 7

4

7

2 9 C

V

K 1 F P 0 7 2

7 1 9 R

M H O 7 4

9

2

9 C

V 0 5 4 / F u 1 . 0

6 4 9 R

K 1

4 0 9

T

0 2 F

E

3

2

1

4

5

8

0 1

6

9

7

t

2

0 9

H T

7 3 0 5 1

K

C

S

1 2

7 4 9 C

F p 0 0 1

4 0 9

C

C A V 0 5

2 F p 0

0 2 2

7 1 9

C

V 5 2 / F u 1

5 6 9 R

2

M 2

1 0 9 R

W 2 / 1 % 5 7 M 2

6

1 9 C

F u 1 0 . 0

6 1 9 D

D

0 1 P G R

2

0

9

T

8 2 - R E

1

12

5

4

2 5 9 C
F

u 1 . 0

1 4 9

C

F

u 1 . 0

2

0 9

Q

S L 7 8

0 4 K S 2

2

1

3

3

2 9

R

W 1 M H

O

K 2

8

0

6 9 R

W 8 / 1

% 1 - + M

H O K

2 2

2 0 9 C

F P 0 7 4

5 3

9

C

V 5 2 /

F u 2

2

0

.

0

1 0

9 N C

T E K C O S

1 2

3

3 0 9

T

8

2 - R E

1

12

4

5

9

3

0

1 9

Q

2 0 0 7 K R

9 3

9

C

F u 1 . 0

1 1

9

Q

C 7 5 8 C B

+

7 3 9 C

V 6 1 F

u 0

2 2

5 0

9

B

F

3.5*4.7

+

3 3 9 C

V

5 3

/ F

u 0

0 0

1

8 5 9 R

W 8 / 1 % 5 - + M H O 0 4 2

7

6 9

R

W 4

/ 1 K

0

1

+

0 5 9 C

V 0 1 F

u 0 0

2 2

5 0 9 T

L

8

2 -

R

E

1

12

5

4

4

0 9 G S

A M

1 0

2 - 1 4 S G

9

0 9

D Z

1

V 9 C -

5

5

X Z

B

1 2

1 0

9 V R

1 6 5 4 1 R

V

T

9 0 9 Q

4 0 9

3 S B M

P

6

6

9 R

%

5

W 8 / 1 K 0

3

3

V 5 9

3

V 4 2

V 2 1

B /

S

V

4

2

A

N E

V 2 1

M I D

B / S

B S

V 5 +

S - d d

V

B

/

S

A01

A01

18400_511_090301.eps

090619

Adapter

Power Board Adapter, 42PFL56xx

EN 49TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

0

1

0

1

1 1

1

1

A

A

B B

C C

D D

E

E

F F

G G

H H

C N

!

!

!

!

!

!

!

!

l e n a P O U A r e m r o f s n a r t n o f r a D

r

o f 8 2 8

R

l e n a P D G L r e m r o f s n a r t k e t s n a r T r o f 7 2 8 R

l

e

n a P

O U A r

e m r o f s n a

r t

k e t s n a r

T r

o f 5

2 8

R

e t o N

C N

7 D

2 0

8 N C

7 B 3 0 8 N C
4 B 1 0 8 C
5 C 2 0 8 C
4 B 3 0 8 C
4 C 4 0 8 C
7 B 5 0 8 C
7 B 6 0 8 C
7

B

7

0 8 C

7 D 8 0 8

C

7 D 9 0 8 C
7 D

0 1 8 C

2 B 1 1 8 C
2

B

2 1 8

C

2 B 3 1 8 C
2 B 4 1 8 C
2 C 5 1 8

C

2 C 6 1 8 C
4 D

9 1 8 C

6

E

1

2 8

C

5 E 2 2 8 C
2 C

3 2

8 C

5 F 4 2 8 C
7

B 5 2 8 C

7

D 6

2 8

C

7

B 7 2 8 C

8

D 8 2 8

C

7 B 7

0 8

D

7 D 8 0 8 D
8 C

9 0 8 D

3 B 1 0

8 C I

5 D

3 0

8 C I

4

D

4 0 8 C I

4 E

5 0 8

C I

4

E

6 0 8 C I

5 F 8 0 8 C I
5 B

1

0 8 Q

5 B 2 0 8 Q

5 C 6 0

8 Q

5

E

7 0 8 Q

4 B 1 0 8 R
4 C

2 0

8 R

5 C 4 0 8 R
3

B

5

0 8

R

2 C 6 0 8 R
4 D 7 0 8 R
4 C 8 0 8 R
4 D 9 0

8 R

2 C 0

1 8 R

5

C 1 1 8 R

5 D 2 1 8 R
5 D 3 1 8 R
5 D 4 1

8 R

4 F 5 1 8 R
4 E 6 1 8 R
5 E

7 1 8

R

5 F

8

1 8

R

5 E 9

1 8 R

5 E 0 2 8 R
8

D

1 2 8 R

7 C

2 2 8

R

7 C

3 2 8 R

4 E

4 2 8 R

7 C

5 2 8

R

6 E

6 2 8 R

8 C 7 2 8

R

8 C

8 2 8 R

4 C 9 2 8 R
7 C

1

0 8 T

6 A

2 0 8 T

6

B

3 0 8 T

6 C 4 0 8 T

5 C 1 0 8 D

Z

6 E 8 0

8 D Z

t r o h

s V

d d V

F

N

2 S V

1 S

V

5 0 8 C I

3

0 1 1 T E C

T

1 2

4 3

2 0 8 R

% 5 W 8 / 1 R 0 1

9

0 8

R

K 9 3

6 0 8

Q

C 8 4 8 C

B

2 2 8

R

K 0 1

1 0

8 T

8 . 9 U U - F R T

1

4

2

3

7 0 8 C

V K 6 / F p 5 1

5 2

8 C

V 0 5 P 0 2 2

9 1 8 C

F u 1 0 . 0

3 2 8

R

R 0 1

4 0

8 T

4 2 - U

U

1

4

2

3

K 3 3 6 0 8 R

8 0 8 R

K 2 6

1 2 8

R

K

2 6

3 0

8 T

8 2 U U - F

R T

6

5

7

4

1

8

2

3

4 1 8

C

V 5 2 N 0 2 2

7 2 8

R

% 5 W 8 /

1

R 0 2 2

8 0 8

D

9 9 V A B

3

1

2

1 0 8 C

V 0 5 N

0 0

1

8 0 8 D

Z

B 6

. 5 Z L R

1

2

4 0 8 C

V 6 1 U 1

4 1

8 R

K 7 . 2

3

0 8

C I

3

0 1

1 T E C T

1 2

4 3

5 1 8 C

V 0 5 P 2 2

1

0 8

Q

S L 7 9 0 4 K S 2

2

1

3

1 1 8

R

K 0 0 1

6 1

8 C

V 0 5 J F p 2 8

9

2 8

R

M H O 0

5 0 8 C

V 0 5 N 1

3 1 8 R

R 0 7

4

2 0 8 C

V 0 0 5 F N 0 7 4

4 2 8

C

V 5 2 U 1

2

0 8 N C

N N O C

1

2

1 0

8 C I

1 7 0 2

A B

U

1

2

3

4

5

6

7

8

9

2

1

3 1

4 1

5 1

6 1

7 1

9

1

0

2

8

1

0 1

1 1

1 2

2

2

4

2

3 2

B F

I

B F I C

B F

V

B F V C

P

W S C

T C

F

C

F E R I

M W P C

d M W P T L U A F , N

a M W P

N E

D D V

D N G P

C

N

C N

L

G

D N G S

M M O C

C

N

H

S

H

G

S F

1 1 8 C

V 0

5

N 7 4

6 0 8 C

V 0 5 F

N 8 . 1

7 0 8 D

9 9 V A B

3

1

2

5

2 8

R

% 5 W 8 / 1

R 2

8

3 2 8 C

P 0 7 4

0

1 8

C

V

0 5 N

1

8 2 8

C

V 0

5 N

1

6 1 8 R

K 7 4

7 0 8 Q

4 0 9 3 S

B

M

P

1

3 2

7 2 8 C

7 N 4

9 0

8 D

9 9 V A B

3

1

2

8 1 8 R

M H

O K

5 1

7 0 8 R

K 0 0 1

3 0

8 C

V 0 5

4 / F u 1 . 0

8 0

8 C I

1 3 4 L T

0

1 8 R

M H O 0

4

0 8 R

R 0 7 4

8

2 8

R

%

5 W 8 / 1

R 0 0

1

4 2 8

R

W

6 / 1 K 0

1

2 1 8 R

R

0 7 4

2 1 8 C

V 5 2 N 0 2 2

2

2 8 C

V 0 5 N 0 0 1

6 2 8 R

K

1

1

0

8 D Z

B

3 1 Z L

R

1 2

2

0 8

T

4

2

-

U

U

1 4

2 3

9

1 8

R

M

H

O K 0 9

3

0 2 8

R

M H O K 0 9 3

1

2 8 C

V 0 5 N 0 0 1

5 1 8 R

K 7 .

2

6

0 8 C

I

3

0 1

1 T E

C T

1 2

4 3

9 0 8 C

V K 6 / F p 5 1

3 0 8 N

C

N N O C

1

2

2 0 8 Q

S L 7 9 0 4 K S 2

2

1

3

5 0 8 R

M H O 0

6 2 8 C
P 0

3 3

1 0 8 R

% 5 W 8 / 1 R 0 1

8 0

8 C

V 0 5 F N 8

. 1

4

0 8

C I

3 0 1

1 T

E

C T

1 2

4 3

7 1

8 R

K 7 . 2

3 1 8 C

7 N 2

V 2 1

V 2 1

A N E

M I D

S - d d V

V 5 9 3

A02

A02

18400_512_090301.eps

090619

Inverter

Power Board Inverter, 42PFL56xx

EN 50TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

BD901 E2
C802 B2
C803 B3
C807 A1
C809 B1
C901 E3
C902 E3
C903 D4
C904 D4
C905 E3
C907 D1
C908 D4
C909 E3
C910 D3
C911 D2
C921 B3
C922 C3
C924 D1
C926 D3
C927 C3
C928 C1
C929 B3
C931 C4
C932 B4
C933 C4
C934 B4
C936 C3
C937 B4
C938 B4
C945 C3
C946 D3
C949 C4
C950 D4
C951 C4
C953 B2
CN802 B1
CN803 A1
CN901 E4
CN903 B4
D901 D1
D902 B3
D904 D3
D914 C3
D915 C3
D916 D3
D917 C4
D921 C4
D922 C4
D923 C3
F901 E4
FB901 E2
FB902 D4
FB905 D1
FB907 C4
HBD901 E2

HD921 C4
HQ801 A3
HQ802 B3
HQ902 C1
HQ903 C3
IC803 A4
IC804 A4
IC805 A4
IC806 A4
IC808 A4
IC903 B4
IC904 C4
IC905 C3
IC907 D4
IC908 D4
IC921 B4
J901 D2
J902 C2
J903 C2
J904 C2
J905 D3
J906 C4
J907 D2
J908 B4
J909 C4
J910 B4
J911 C3
J912 C2
J913

C3
J914 C3
J915 D4
J916 C4
J918 C4
J920 A3
J921 D4
J922 A4
J923 B3
J924 A3
J925 B3
J926 A3
J927 D3
J928 B3
J929 E3
J930 D2
L901 D4
L902 E3
L907 C4
L921 B4
L922 B4
L923 D3
Q801 A3
Q802 B3
Q902 C1
Q903 C3
Q917 C2
R824 A4

R901 E3
R919 C1
R920 C1
R923 B3
R924 C3
R930 C3
R934 D3
R946 D2
R95

3 D4
R954 B4
R962 D3
RV901 D4
RV902 E2

SG901 D4
SG902 E4
SG904 E3
SG905 E3

T801 A3
T802 A2
T803 A2
T804 B2
T901 B3
T902 C2
T903 D2
T904 C4
T905 C2
TH902 D4
TH903 D3
ZD909 D3
ZD912 D3
ZD924 B4

18400_513_090301.eps

090619

Layout Power Board, 42PFL56xx Top Side

EN 51TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

C801 A3
C804 A4
C805 A4
C806 A4
C808 A3
C810 A4
C811 A3
C812 A4
C813 A4
C814 A4
C815 A4
C816 A4
C819 A4
C821 A4
C822 A4
C823 A4
C824 A4
C825 A4
C826 A3
C827 A4
C828 A4
C912 C2
C913 C2
C914 D3
C915 C3
C916 C2
C917 C3
C918 C3
C919 C3
C920 C2
C923 B3
C930 B4
C935 B4
C939 B4
C940 B4
C941 B4
C942 D3
C947 C3
C948 C3
C952 D4
C954 C3
C955 C2
D807 A4
D808 A3
D809 A4
D910 C2
D913 C3
IC801 A4
IC901 C3
IC902 C2
J917 C3
J931 C2
Q806 B4
Q807 A4
Q907 D3
Q909 B4
Q910 D4
Q911 C3
Q915 D3
Q916 C1
Q918 D2
R801 A3
R802 B3
R804 B3
R805 A3
R806 A4
R807 A4
R808 A4
R809 A4
R810 A4
R811 A4
R812 A4
R813 A4
R814 A4

R815 A4
R816 A4
R817 A4
R818 A4
R819 A4
R820 A4
R821 A4
R822 A3
R823 A3
R825 A3
R826 A4
R827 A3
R828 A3
R829 A4
R904 B2
R905 B2
R906 C1
R907 C2
R908 C2
R909 C2
R910 C2
R911 C2
R912 C3
R913 C2
R914 C2
R915 C3
R916 C2
R917 C2
R918 C2
R921 D4
R922 D3
R925 D3
R926 D3
R927 C3
R928 C3
R929 C2
R931 C3
R935 C4
R936 C4
R937 B4
R938 B4
R939 B4
R941 B4
R942 B4
R943 B4
R944 C4
R945 B4
R947 B4
R948 D3
R949 B4
R950 C2
R951 D3
R952 D4
R955 D4
R956 D4
R957 D4
R958 B4
R959 D3
R960 D4
R961 C3
R963 B4
R965 D3
R966 D3
R967 D3
R968 D3
R969 D3
R970 C3
ZD801 B3
ZD808 A4
ZD903 D4
ZD905 C

3
ZD907 C3
ZD908 C3
ZD925 B4

18400_514_090301.eps

090619

Layout Power Board, 42PFL56xx Bottom Side

EN 52TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 53TPM3.1E LA 10.

SSB: VGA input 32PFL54xx

1

2

3

4

5

6

7

8

9

0 1

1

1

VGA input

B01

A A

1

A

B

C C

D

E

F F

G

2

A

3

4

T6NMW-20C42M

1

1R

0

1

1

1

R

N(MHO

0

D

1

V5

+

C

011U

0
1
2A
SV

P

9

)CN(MHO 0

2

)C

011

1

3

2011

1 N001

V

6

1

8

CV

C

7

PW

6

LCS

5

ADSS

6011C

)CN( P33

OIDUA_CP

V5AGV

C45TAB

2

5-+ MHOK
5-+ MHOK01

W

61/1 R

%5

1 3

BZX84-C5V6(NC)

2

2

.

W61/1 %
W61/1 %

R

4011

7011R

1

H

S

V

S

D

ZD1101

1 3

BZX84-C5V6(NC)

2211R

1

6

5-+ MHOK

W

/1 %

6011BF

6

1 2

5011BF

1

5 W61/1 R0

ADSCDD

LCSCD

ZD1105

BZX84-C5V6(NC)

Am002/R00

Am002/R006

2

%

ZD1103

1 3

3

1 3

3

R

01

R

2

1

1

21

1

3

1

4

51

BZX84-C5V6(NC)

2

8111C

V05 P033

6111C

V05 P0

1011

8011

C

3211R

2.

+ MHOK01 6211R

W

1/1

6

%5-+ MHOK

3V3+

YBTS_

R

%1 W

1 W61/1 R57

%
%1 W61/1 R57

BF

F

BF

7111

5011

2011

1 2

3011B

1 2

4011

1 2

1

XR

1

XT

01CP_PWCDD

W61/1 %

5-+ MHOK2

1XT

1XR

1716

6
1
7
2

8
3

9
4
1

0

5

1011N

51BD

0 1211R

HOK

W61/1 %5-

W61/1 %5-+ MHOK01 4211R

1

2

+ MHO

W61/1 %5-+ M

7211R

1 K

W61/

5211R

1 2

5

9

11R

2

1011B

F

Am000

3/R021

W61/1 %5-+ MHO 0 0211R

W61/1 %5-

%

%5 W61/1 K21

1 3

YSH_

C

N

P

0

3

3

R

G

B

V

C

ZD1102

BZX84-C5V6(NC)

21C

21CNYSV_CP

9111C

V05 P033

7111C

V05 P

)CN(W61/1 50R07311R

)CN(W61/1 50R0

V5AG

1011

V61 N001

81NI_RUA_CP

CP

81NI_LUA_

R

R

6111R

5

6

/1 R

7

1

DSE_3V3+

)CN(K01

2011

D

3

B

1 2

3011

C

)CN(99VA

3

)CN(N001

3011

D

1 2

BG

4011

C

CN(99VAB

)

3

)CN(N001

4011D

1 2

5011C

)CN(99VAB

)CN(N001

CI OT ESOLC

Am007/R03

Am007/R03

Am

007/R03

4111C

3111C

2111C

8111R

V05FP5

V05FP5

V05FP5

1111R

%5 W61/1 R86

4111R

%5 W61/1 R86

5111R

%5 W61/1 R

86

9111R

)CN(%5 W61/1 R012311R

)CN(%5 W61/1 R013311R

%5 W61/1 R014311R

%5 W61/1 R015311R

011C

C

W61/1 %5-+ MHO 001

0U

V61 N018

V61 N019011C

V61 N010111

V05 Fp00741111C

V61 N0

15111C

71,31XR0U

71,31XT0U

71,31XT

71,31XR0U

3

1NI_R_CP

31NI_G_CP

31NI_B_CP

1GOS_C

3

P

31DNG_CP

01

R

3011

011C

7

)

3

CN( P3

1

R

1

1

0

V

SI

R

3111

0

AJ HP

6011R

01

W61/1 %5-+ MHO 0

31ADS_AG
21ADS_1PSI
21LCS_1P

31LCS_AGV

W61/1 %5-+ MHO

ZD1104

mm5.3 P3 KC

3

2
1

2011NC

0 1 1 C

C

C

1 C
1 C

C

1 1 1 C
1 1 1 C

0 1 1 D

0 1 1 D

1 1 B F

1 1 B F

F

R

0 1 1 R
0 1 1 R

0 1 1 R

1 1 1 R

1

1 1 R

1 1 1 R

1 1 R

R

2 1 1 R

2 1 1 R

3 1 1 R
3 1 1 R

R

1 U

Z

B01

4 C 1 0 1 1 N C

2 E 2 0 1 1 N C
5 D 1 0 1 1 C
2 A 2
7 B 3 0 1 1
8 B 4 0 1 1 C

0 1 B 5 0 1 1 C
2 B 6 0 1 1
2 B 7 0 1 1 C
9 C 8 0 1 1 C
9 C 9 0 1
9 C

0 1 1

9 C

1 1 1 1

7 C 2 1 1 1 C
7 C 3 1 1 1 C
8 C 4 1 1 1 C
9 D 5 1 1 1 C

3 F 6
5 F 7

3 E 8 1 1 1 C
5 E 9 1 1 1 C
2 A

1

7 B 2 0 1 1 D

3 0 1 1 D

8 B
9 B 4

5 C 1 0 1 1 B F
7 C 2 0 1 1 B F
7 C 3 0
7 C 4 0 1 1 B F
3 F

5 0

3 E 6 0 1 1 B
4 A 1 0 1 1 R
2

A

3 0 1 1

3 A 4
7 B 5
2 B 6 0 1 1 R
3 B 7 0 1 1 R
4 B 8
2 B 9 0 1 1 R

0 1 1 1 R

2 B
8 C 1
2 C 2 1 1 1 R
2 C 3

8 C 4 1 1 1 R
8 C 5 1 1 1 R

6 C 6
6 C

7 1

6 C 8 1 1 1 R
8 D 9 1 1 1
4 D 0 2 1 1 R
4 D 1 2 1 1 R
3 D

2

4 D 3 2 1 1 R

F

4

4

4 F 5 2 1 1 R

6 2 1 1 R

4 E
4 E 7 2 1 1 R
5 C 9 2 1 1 R
7 E 2
7 E 3
7 E 4 3 1 1 R
7 E 5 3 1 1 R
5 B 7 3 1 1
2 A 1 0 1

3 D 1 0 1 1 D Z

5 D 2 0 1 1 D Z

4 D 3 0 1 1 D

3 D 4 0 1 1 D Z

4 D 5 0 1 1 D Z

B

D

E

G

H H

1

2

3

4

5

6

7

8

9

0 1

1 1

18400_517_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 54TPM3.1E LA 10.

SSB: Rear I/O

1

2

3

4

5

6

7

8

9

1

0

1 1

Rear I/O

B02

A

B

C C

D

E E

F

G

H H

N I _ R _ 1 T C S 6

N I _ G _ 1 T C S 6

I _ B

_ 1 T C S 6

N

C

A 1 0

1 N

2

2

1

4

3

6

5

)

0 -

8 -

A

5 V

A

V

5

A

5 V

C

-

V A

5

C N ( 1 0 - 2

4 .

N I _ L U A _ 1 T C S 6

N I _ R U A _ 1 T C S 6

B 1 0 2 1 N C

8

7

0 1

9

)

0

0 -

8 -

C N (

- 2

4 .

1

A

2 0 2 1 N C

2

1

4

3

6

5

0 -

8 -

1 0 - 2

4 .

B

2 0 2 1 N

8

7

0 1

9

0

2 0 - 4 . 8

1

-

5 0 2 1 R

7

1

1 2

6

3 2 2 1 R

7

1

1 2

1 B F

F

F

F

0 2 1 R

1 W 6 1 / 1 R 5

4 0 2 1 B F

0

2

5

% 1 W 6 1 / 1 R 5

0

2 1 B

6

%
% 1 W 6 1 / 1 R 5 7
% 1 W 6 1 / 1 R 5 7

2
A m 0 0 2 / R 0 0 6

0 0 2 / R 0 0

A m

4 2 2 1 R

%

1 W 6 1 / 1 R 5 7

7

9 0 2 1 B F

0 1 2 1 B

2 / R 0 0 6

1

1

1 2

3 0 2 1 B

1

7 0 2 1 R

1

1

1

1

5 2 2 1 R

1

1 W 6 1 / 1 R 5

%

2
A m 0 0 2 / R 0 0 6

A m 0 0

A

3

m

/ R 0

0 0 7

2

A m 0 0 7 / R 0 3 2 0 2 1 B F

R 0 3

A

/

m 0 0 7

2

6

0 2 1 C

5 0 2 1 C

V 0 5 P 5

C

2

3 7 0 2 1 B F

0 0 7 / R 0

m

2

/ R 0 3 8 0 2 1 B F

m 0 0 7

2

0

2 2 1 C

V 0

5

1

5 P 5

P 5

C

0 3

3

C

0 3

3

7 0 2 1 C

V 0 5 P 5 1

V 0 5 P 5

1

1 2 1

0

0 5

V

P 0 3 3

0 1

1 1 2 1 R

2 1 2 1 C

V 0

5 P 0 3 3

A m 0 0 7 / R 0 3 6 0 2 1 B F

A

A

1 2 2 1 C

2 2 2 1 C

5

V 0 5 P

0

1

V

R

4 1 2 1

V 0 5 P

0 1

9 2 2 1 R

8 2 2 1

V 0 5 P

K

1

2

1 % 5 - + M H O K

1 2 1 R

/

% 5 - + M H O K 0 1 7 2 2 1

1

1

2 1

M

1 % 5 - +

H O K

1 R

3 2

, 3 0 2 1 N C , 1 0 2 1 N C : U E C N 2 3 2 1 C , 1 3 2 1 R

1 0 2 1 R

%

1 /

6

5 W 6

1 R 8

2 0 2 1 R

W 6 1 /

8

% 5

1

6

R

3 0 2 1 R

%

1 /

6

5 W 6

1 R 8

1

2 1 R

3

)

0

C N (

8 0 2 1

R

0

1

0

W

6 1 / 1 % 5 - + M H O K 0 1 9 0 2 1 R

0 1 2 1 R

W 6 1 /

2

1 K 2 1

1 /

R

R

R

1

6

W

6

8 2 2 1 R

1 K

5

W 6 1 /

W 6 1 /

0

1

- + M H O

% 5

% 5 W 6 1 / 1

% 5 W 6

0 2 1

4

5 W 6 1 / 1 R 8 6

%

9 1 2 1

6 1 / 1 R 8 6

% 5 W

2

2

1

5 W 6 1 / 1 R 8

%

4 3 2 1 R

% 5

- + M H O 0

1 2 1 R

5

%

% 5 W 6 1 / 1 K 2 1

C I O T E S O L C

1 1 0 2 1 C

V 6 1 N 0

C

N 0 1 2 0 2 1

C

2 1

C

W 6 1 /

1

2 1 C

1

V 0 5 P 0 3 3

3 1 2 1 C

V

0 5 P 0 3 3

V 6 1

V 6 1 N 0 1 3 0 2 1 C

) C N ( F p 0 0 7 4 2 3 2 1 C

V 6 1 N 0 1 4 0

C

1 N I

1 P M O

3

_ Y _

P

N I

_

_ 1 P M O C

3 1

B

3

1 N I _ R P _ 1 P M O C

3 1

/ 1 Y O S

, 6 1 B F

1 D

P M O C

3

N G _ 1

1

8 1 N I _ L

U A _ 1 P M O

8 1 N I _ R U A _ 1 P M O C

N I _ 1 S

C 3 1

B V

N I _ L U A _ N I _ 1 S B V C 8 1

N I _ R U A _ N I _ 1 S B V C 8

C

3

C I O T E S O L C

1

0

1 C

2

C

W 6 1 / 1

W 6 1 / 1 % 5 - + M H O 0 0 1

7 2 2 1 C

V 0 5

3

P 0 3

0

3 2 1 C

3

V 0 5 P

3

0

V 6

N 0 1 8

V 6 1 N 0 1 9 0 2 1 C

M

C

O

6 1 N 0 1 5 1 2 1

V

V 0 5 F p 0 0 7 4 5 3 2 1 C

1 N

1 7 1 2 1 C

V 6

0

C

C

O

3 1

P M O C

N I _ Y _ 2

_ B P _ 2 P

3 1 N I

1

3 1 N I _ R P _ 2 P M O C

G O S

3 1

_ 2 P M O C

3 1 D N G

2 P M O

_

P M

2

8

_ L U A _

1 N I

8 1 N I _ R U A _ 2 P M O C

K 1

H O

T U O _ F I D P S 3

6 1 2 1 R

0 1 / 1 R

% 5 W

0 1 9

K 1

H O

3 3 2 1 C

2 3 2 1 R

) C N ( V 6 1 N 7 4

9 2 2 1 C

) C N ( V 0 5 P 0 3 3

3 2 1 R

2 1

7 3

C N ( V 0 5 P 0 3

)

3 1 2 1 R

6 1 / 1 % 5 - + M

W

3 2 2 1 C

V 6 1 N 0 0 1

R

7 1 2 1

6 1 / 1 % 5 - + M

W

2 1 R

) C N ( % 5 W 6 1 / 1 R 0 0 1

4

C

3 2 1

) C N ( F p 7

7

4

9 3 2 1 R

0 4 2 1 R

8

1 4

) C N ( % 5 W 6 1 / 1 K 0 1

) C N

( % 5 W 6 1 / 1 K 2 1

)

W

C N ( % 5

6 1 / 1 K 0 1

) C N ( % 5 W 6 1 / 1 K 2 1

N O _ V 5 +

R 0

1

1

0 2 1 Q

C 7 4 8 C B

0 2 2 1 R

0 8 1

1 1 2 1 B F

1 2

) C N ( A m 0 0 5 / R 0 2 1

2 1

3 3

R

) C N ( % 1 W 6 1 / 1 M H O 5

4 1 2 1 B F

1 2

6

2 1

1 3

C
3

6 3 2 1 C

P 0

3 3

4 1 2 1 R

% 5 W

6 1 / 1

V 6 1 N 0 0 1 8 1 2 1 C

0 1 / 1 R

% 5 W

) C N

( A m 0 0 2 / R 0 0

) C N ( V 0 5 P 0 3

5 1 2 1 B F

1 2

) C N ( A m 0 0 2 / R 0 0 6

) C N

( V 0 5

1 2 1 R

8

% 1 W 6 1 / 1 R 5 7

T U P N I 1 S B V C

2

1

4

3

6

5

0 1

5

3 0 2 1 N C

8 9

) C N (

- 3 8 0 - 0 7 8 - 5

T U O F I D P S

2

9 1 2 1 C

0 5

3

V

P 3

1

4 0 2 1 N C
9 A - 1 0 0 - 0 1 8 - 5 0 1 5

B02

B A1021N

1021C

5B
5B 2021C
5B 3021C
5C 4021C

C

3B 5021
3B 6021C

021C

4B 7

C

5D 8021
5D 9021C
3C 0121C
5C 1121C
3D 2121C
5D 3121C

C

3F 4121
5E 5121C

C

5E 7121
9E

8121C

9E 9121C

C

3E 0221

C

3E 1221
4E 2221C

C

8D 3221

5F 7221C

3F 8221C
8C 9221C

C

5F 0321
9C 1321C
5B

C

2321

8B 3321C

C

9B 4321
5E 5321C
9C 6321C
8C 7321C

1BF

D 7021BF

F

B 4121B

R

4B 1021
4B 2021R

R

4B 3021
4D 4021R
2B 5021R
2B 6021R
2B 7021R
4C 8021R

3C 9021R

4C 0121R

R

3D 1121

4D 2121R

121R

8D 3

R

8D 4121
4

E 5121R

121R

7D 6

R

8E 7121
9E 8121R

R

4D 9121
8E 0221R

R

4E 1221
2E 3221R
2E 4221R
2E 5221R

3E 7221R

4F

8221R

R

3F 9221

4F 0321R

321R

4B 1

R

8B 2321
9B 3321R

321R

4E 4

R

8C 8321
8B 9321R

R

8C 0421
8C 1421R

1

1C B1021N
1D A2021N

1E B2021N

01B 3021NC
01E 4021NC

3A 1021BF
3B 2021BF
3B 3021BF

2C 4021BF
2C 5021BF

3D 602
3
3E 8021BF

2E 9021BF

2F 0121BF

9B 1121BF
9
9C 5121BF

8D 1021Q

A

B

D

F

G

1

2

3

4

5

6

7

8

9

0 1

1 1

18400_518_090301.eps

090619

2009-Jun-26

SSB: SCART

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

0 1

0 1

1

1

1 1

A

A

B B

C C

D

D

E E

F

F

G

G

H H

T R A

C

S L L U F

T R A C S F L A H

C N 2 0 3 1 N C , 1 0 3 1 N C : W O R

2 B 1 0 3 1 N C
7 B 2 0 3 1 N C

5 A 1 0 3 1

C

9 A

2 0

3 1 C

4

B

3

0 3 1 C

8 B 5 0 3 1 C
9 B 8 0 3 1 C

9 C 0 1 3 1 C
7 D 1 1 3 1 C
3 D 2 1 3

1 C

2

D 3 1 3 1 C

7 E

5 1 3 1 C

9 E 6 1 3 1

C

7 F 7 1 3 1 C
9 F 8 1 3 1 C
2 F 0 2 3 1

C

3 F 1 2 3 1 C
4 F 2 2

3 1 C

5

F 3 2 3 1 C

4 E

4 2 3 1 C

3 E 5 2

3 1 C

1 F 4 0 3 1

D

2 F 5 0 3 1 D
4

F 6 0 3 1 D

5 F 7 0 3 1 D
4 E 8 0 3 1

D

2 E 9 0 3 1 D
5 E 0 1 3

1 D

3 A

1 0 3 1 B F

8

A 2 0 3 1 B F

8

B 3 0 3 1 B F

7 E 4 0 3 1 B F
7 E 5 0 3 1 B F

4

A 1 0 3 1 R

3 A 2 0 3 1

R

8 A

3 0

3 1 R

8 A 4 0 3 1 R

9 B 5 0 3

1 R

8 C

6

0

3 1 R

3 D 7 0 3 1 R
7 D 8 0 3 1 R
3 D 9 0 3 1 R

7 D 0 1 3 1 R
2 D 1 1 3 1 R
3 D 2 1 3 1

R

8 E 3 1 3 1 R
8 E 4 1 3 1 R
8 E 5 1

3

1

R

8 F 6 1 3 1 R

N I L U A _ 2

T C

S

N

I R U A _ 2 T C

S

N I _ B

F _ 1 T C S

N I _ C S _ 2 T C S

N I _ B F _ 1 T C S N

I

_

B _ 1

T

C

S

N

I

_ G _ 1 T C

S N I

_ R _ 1 T C S

N

I

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B03

B03

18400_519_090301.eps

090619

Scart

Circuit Diagrams and PWB Layouts

EN 55TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 56TPM3.1E LA 10.

SSB: Side I/O

1

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18400_520_090301.eps

090619

2009-Jun-26

SSB: CVBS, Audio out

1

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B05

18400_521_090301.eps

090619

CVBS, Audio out

Circuit Diagrams and PWB Layouts

EN 57TPM3.1E LA 10.

2009-Jun-26

SSB: Tuner

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1 A 1 0 6 1 U T 6 D 7 2 6 1 R
6

C 1 0 6 1

U

1

C 2 0 6 1

U T

I V

A _ U T

C G A _ U

T

R

E

N U

T _ S

V

F I S _ U

T

R E

N U

T _ S

V

C

G A _ U

T

S

A _

U

T

T

F A _ U

T

S B V C _ U

T

A D S _

U

T

L C S

_ U

T

L C S _ U T

A

D S _ U T

F I

S _ U T

A D S _

U T

L C S _ U T

S

B V C _ U T

S

A _

U T

3 1 S B V

C _

V T

3 1 P _ F I S

3 1 N _ F

I S

3 1 , 2 1 L C S _ T M

3

1 , 2 1 A

D S _ T M

3 1 D N G _ S B V C _ r e n u T

3 1

# L T C _ T U O _ S B V

C _ 1 T C S

6 T U O _ S B V C _ 1 T C S

R E N U T _ V 5

+

N

O _ V 5 +

N O _ V 5 +

N O _ V 5 +

R E N U T _

V 5

+

3 V 3 +

3 V 3 +

R E N U T _ V 5 +

R E N U T _ V 5 +

4 0 6 1 C

V 6 1 N 0

0 1

5 1 6 1 R

W

6 1 / 1

% 5

-

+ M H O 0

2 2 6 1

C

V

0 5

P 3 3

4 0 6 1 Q
2 0 0 7 N 2

2

0

6 1 Q

C 7 4 8 C B

8

1 6

1 C

V 6 1 N 0 0 1

V 6 1 N 0

0 1

0 2 6 1

C

8 1 6 1 R

% 1 W 6 1 / 1 R 5 7

6

2 6 1 R

% 5 W 6 1 /

1 7 K 4

6 0 6 1

R

W

6 1 / 1 % 5 - + M H O 0

0 1 6 1 C

V 6 1

N 7 4

+

3 0 6 1

C

V 0 1 F u 0 0 0 1

+

6 1 6 1 C

V

0 1 F U

0 7 4

1 0 6 1

Q

2

0 0 7

N 2

1 1

6 1

R

W 6 1 / 1 % 5 - + M H O K 3 3

9 0 6 1 R

W 6 1 / 1 % 5 -

+ M H O 0 0 1

2 0

6 1 R

W 6 1 / 1

%

5 - + M H O K 0 1

4 2 6 1

C

V

0 1 U 0 1

V

6 1 N 0 0

1

5 1 6 1 C

5

0 6 1 R

% 5

W

6 1 / 1 R 0 1

0 2 6 1 R

W 6 1 / 1 % 5 - + M H O K 3 3

7 1 6 1

C

V 0 5 P 2 2

% 5

W 6

1 / 1

R 0 1

5 2 6 1

R

) C N ( R 0 7 2 6 1 R

1 0 6 1 U

X 6 P 7 5 1 3 B S 7 C N

1
2
3 4

5

6

1 B

D N

G

A 0 B

C

C V

S

1 2 6 1

C

V 0 5

P 3

3

6 0 3 1 C

3

V 6 F U 1

8 0 6 1 R

% 1 W 6 1 / 1 R 5 7

2 2 6 1 R

W 6 1 / 1

% 5 - +

M H

O 0

3

1 6 1 C

V 6 1 N 0 0 1

0 1 6 1 R

% 1 W 6 1 / 1 R 5 7

% 5

W 6

1 / 1

R 0 1

4 2 6 1

R

9

1 6 1 R

) C N ( 2 K 2

2 1 6 1 C

V 0 5 F p 7 4

1 1 6 1

C

) C N

( V 6 1

N 0 3 3

2

0 6 1

U T

) C N ( 5 3 2 / 3

C 6

- M

T S

1
2
3
4
5
6
7
8
9

0 1
1 1
2

1

13

14

15

16

) P T ( T B

) P T ( F I
C N
S A
A D S

L C S

V

5 +

F I

S

C

G

A

T F A

O

I D U A

O E D I V

TH1

TH2

TH3

TH4

3 1 6 1 R

W 6 1 /

1 %

5 -

+ M H O

K 0 1

+

9 0 6 1

C

V 5 2

F u

7 4

1

0 6 1

U

T

R E N U

T

1
2
3
4
5
6
7
8
9

0 1
1 1
2 1
3 1
4 1
5 1
6 1

17

18

19

20

C

N

C

N

D N

G

) V 5 ( B +

C G A F

R

D N G
A D S
L C S
S A

U T

C N
C

N

C

N

F I

S

C N
O I D U A
O E D I V

TH1

TH2

TH3

TH4

9

1 6 1 C

V

5 2 U 1

3 0 6 1 Q

C 7 4 8 C B

3

2 6 1 R

% 5 W 6 1 / 1 7

K 4

2

0 6 1 C

V 6 1 N 0 0 1

6 0 6 1 Q
2

0 0 7 N 2

1 2 6 1 R

% 1 W 6 1 / 1 R 5 7

1 0

6 1

R

) C N (

R 0

2 1 6 1 R

% 1 W 6 1 / 1 R 5 7

7 1 6 1

R

W 6 1 / 1

% 5 - +

M H

O 0

5

0 6 1 Q

2 0 0 7 N 2

1 0 6 1

C

) C N (

V 6 1 2

U 2

1 0 6 1 L
H u

0 5 1

6 1 6 1 R

% 5 W 6 1 / 1 R 0 1

B06

B06

18400_522_090301.eps

090619

Tuner

Circuit Diagrams and PWB Layouts

EN 58TPM3.1E LA 10.

2009-Jun-26

SSB: HDMI Input

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

E

5 D 3 0

7 1

C 5 B 2 0 7 1 C 5 A 1 0 7 1 C 1 D 2 0 7 1 N C 1

A

1 0 7 1 N C

5 A 5 0 7 1 D

7 B 4 0 7 1 D

7 A 3 0 7 1 D

7 A 2 0 7 1 D 7 A 1 0 7 1 D

2 C

3 0 7 1

Q 7 B 2 0 7 1 Q 7 A 1 0 7 1

Q 5

D 7 0 7 1 D 5 B 6 0 7 1

D

2

E 8 0 7 1 Q 2 E

7 0 7 1 Q 7 C 6 0 7 1 Q 7 C 5 0 7 1 Q 2 C 4

0 7 1

Q

5 A 6 0 7 1 R 4 A 5 0 7 1 R

4

A 4 0 7 1 R 2 A 3 0 7 1 R 2 A

1 0 7 1 R

7 B 1 1 7 1 R 7

B 0 1

7 1

R 5 B 9 0 7 1

R 2

A 8 0

7 1 R

2

A 7 0

7 1

R

7 C 6 1 7 1 R

7 C

5 1 7 1

R

5 C

4 1

7 1 R

4

C 3 1 7 1 R

4 C 2 1 7 1 R

7 C 1 2

7 1

R 5 C

0 2 7 1

R

7 C 9 1 7 1 R 2 C 8 1 7 1 R 2 C 7 1 7 1 R

4 D 6 2 7 1

R

2 D 5 2 7 1 R 2 D 4 2 7 1 R

2 D

3 2 7 1 R 2 D 2 2 7 1

R

2

E 1 3

7 1

R

2 E

0 3 7

1 R

5 D 9

2 7 1 R 5

D 8 2

7 1

R 4 D 7 2 7 1

R

5 D 4 0 7 1 U 5 C

3

0 7 1 U 5 A 2 0 7 1 U 1 C 1 0 7 1 U 7 A 2 3 7 1 R

1 1 D P H _ 1 I M D H

3 1 , 1 1 A D S _ C D

D _ 1 I M

D H

3 1 , 1 1 L C S _ C D

D _ 1 I M

D H

3 1

P W _ C D D

A D S _ C

D D _ 1

I M D

H 3 1 , 1 1

L C S _

C D

D _ 1

I

M D

H 3 1 , 1 1

3 1 , 1 1 + K

C _ 1 I M

D

H

3 1 ,

1 1 - 0

D _ 1 I M

D H

3

1

, 1 1

+

0

D _ 1 I M

D

H

3 1 , 1 1 - 1 D _ 1 I M D H

3 1

, 1 1

+ 1 D _ 1 I M D H

3 1 , 1 1

- 2

D

_ 1 I

M D

H

3 1

, 1 1

+ 2

D _ 1 I M

D H

3 1 , 1

1 -

K

C _ 1 I

M D

H

C P _ P W C D D 4

L C S _ C

D D _ 2 I

M D

H 3 1 , 1 1

A D S _ C D D _ 2 I M D H 3 1 , 1 1

2 I

M D

H

_

P W C

D D

D P H _ 2 I M D H 1 1

D P H

_ 1 I M

D H

1 1

D

P H

_ 3 I M D H 1 1 ,

7

3 1 L T

C _

D P H _ 1

I M D H

2 I M

D H _ P W C D D

3 I M D H _ P W C D D

1 I M D

H _

P W

C

D D

1 I M D H _ P W C D D

1 1 D P

H _ 2 I M

D

H

3 1 ,

1 1

A D S _ C D D _ 2 I M D

H

3 1 , 1 1

L C S _ C D D _ 2 I M D

H

3 1 C E

C _ T M

C E C 1 1 , 7

2

1 C E C _

U C M

3 1 , 1 1 + K C _ 2 I M D H

3

1 , 1 1 - 0

D _ 2 I M

D H

3

1

, 1 1

+

0

D _ 2 I

M D H

3 1 , 1 1

- 1

D _ 2

I M D

H

3 1

, 1 1

+ 1

D _ 2 I M D

H

3 1 , 1 1

- 2 D

_ 2 I

M D H

3 1

, 1 1

+ 2 D _ 2 I M D H

3 1

, 1 1 - K

C _ 2 I

M D H

L C S _

C D D _ 3 I

M D H 3 1 , 1 1 ,

7

A D S _

C D

D _ 3

I M

D H 3 1 ,

1 1 ,

7

3 I M D

H _

P W C D D

3 1 L T C _ D P

H _ 2

I M D H

3 1 L T C _ D P H _ 3 I M D H

V 5 _ 1 I M D

H

V 5 _ 2 I M D

H

Y B T S _ V 5 +

V 5 +

3

V 3 +

V 5

_ 1 I M

D H

V 5 +

V 5 _ 2 I M D H

V

5 +

V 5

_ 3 I M

D H

V 5 +

8

4 1 4 S L

4 0 7

1 D

5 0 7 1 Q

G I T 1 1 2 2 N U M

7 0 7 1

D

C 4 5 T A B

1

3

2

6 2 7 1 R

W 6 1 / 1

% 5

- + M H O

K 7 4

9 2 7 1 R

) C N ( K 0 0 1

)

C N ( K 0 7 4 1 0 7 1 R

1

0 7

1 N C

2 7 - 1 4

4

- 9 1 5

- 0 0 3

5

0 2

1

2

1

2

3

4

5

6

7

8

9

0 1

1 1

2

1

3

1

4 1

5 1

6 1

7 1

8 1

9 1

2 2

3 2

4 2

1 H T

2

H T

+

2

D

d

l e i h S 2

D

-

2 D

+ 1

D

d l e

i h S 1 D

- 1 D

+ 0 D

d l e i h

S

0

D

- 0 D

+

K C

d

l e

i

h S

K

C

- K C

e t o m e R E C

C

N

K L

C C

D

D

A

T A D C D D

D N G

V

5

+

T

E

D P H

3 H

T

4

H

T

5 H T

7 2 7 1 R

W 6 1 / 1

% 5 - + M H O K 7 4

1 0 7 1 C

V 6 1 N 0 0 1

6 0 7 1 Q

G I T 1 1 2 2 N U M

% 5 W 6 1 / 1 R 0 1 1 2 7 1

R

8 4

1 4

S L

2 0 7 1

D

6 0 7 1 D

C

4 5 T A B

1

3

2

% 5 W 6 1 / 1 R 0 1 9 1 7 1 R

2 0 7 1 Q

G I

T 1

1 2 2 N U M

5 0 7 1

R

W 6 1 / 1 % 5 -

+ M H O

K 7 4

4 0 7 1 Q

2 0 0 7

N 2

2 3 7 1 R

W 6 1 / 1 % 5 - + M H O K 0 1

% 5 W 6 1 / 1 R 0

1 6 1

7 1 R

% 5 W 6 1 / 1 R 0

1 7 0 7 1 R

) C N ( 2 0 0 7

N 2

3

0

7 1

Q

% 5 W 6

1 / 1 R 0 1 0 1 7

1 R

9 0 7 1 R

) C N ( K 0 0 1

3 0 7 1 C

V 6 1 N 0 0 1

4 0 7 1 R

W 6 1 / 1 % 5 - + M H O

K 7 4

2 0 7 1 U

P 6 W D W - 2 0 C 4 2 M

1
2
3
4

5

6

7

8

0 E
1

E

2

E

S S V A D S

L C S

C W

C

C V

% 5 W 6 1 / 1 R 0 1 5 1 7 1 R

% 5 W 6 1 / 1 R 0

1 8 0 7

1 R

) C N ( 2 0 0 7

N 2

7 0 7 1 Q

4 1 7 1 R

W 6 1 / 1 % 5 - + M H O K 0 1

) C N (

R 0

8 1 7 1

R

W 6 1 / 1

% 5

-

+

M H

O K 1 3 0

7 1 R

)

C N (

R 0

0 3

7 1 R

5 0 7 1 D

C 4 5 T A B

1

3

2

8 0 7 1

Q

2 0 0 7 N 2

2 1 7 1 R

W 6 1

/ 1 % 5

- + M H O

K 7 4

3 0 7 1 U

P 6 W D W - 2 0

C 4 2 M

1
2
3
4 5

6

7

8

0 E
1

E

2 E

S S V A D S

L

C S

C W

C C V

7 1 7 1 R

W

6 1 / 1 % 5 - +

M

H O 0

) C N (

K 0 7 4 5 2 7 1 R

6 0 7 1 R

W 6 1 / 1 % 5 - + M H O K 0 1

8 2 7 1 R

W 6 1 / 1 % 5 -

+ M H O

K 0 1

3 1 7 1

R

W 6 1 / 1 % 5 - + M H O K 7 4

1 0 7 1 Q

C 7

4 8 C B

% 5 W 6 1 / 1

R 0 1 4 2 7 1 R

8 4 1 4 S

L

1 0 7 1 D

% 5 W 6 1 / 1

R 0 1 3 2 7 1

R

2 0 7 1

C

V 6

1 N

0 0 1

1 3 7 1

R

W 6 1 / 1 % 5 - + M H O 0

1 0 7 1 U

)

C N ( T C

T . B 0 2 5 0 p

m a l

C

R

3

1

2

W 6 1

/ 1

% 5 - + M H O K 1 2 2 7 1 R

4 0 7 1

U

P

6 W D W - 2 0 C 4 2 M

1
2
3
4

5

6

7

8

0 E
1 E
2

E

S S V A D S

L C S

C W

C C V

2 0 7

1 N C

2 7

- 1 4

4 - 9 1 5

- 0 0 3

5

0 2

1 2

1

2

3

4

5

6

7

8

9

0

1

1

1

2 1

3 1

4 1

5 1

6 1

7 1

8

1

9 1

2 2

3

2

4 2

1 H

T

2 H

T

+ 2

D

d l e

i h S 2 D

- 2

D

+

1

D

d

l e i h

S 1

D

- 1 D

+

0 D

d

l e i h S 0 D

- 0 D

+ K C

d l e

i h

S K

C

- K C

e

t o m e R E C

C N

K L

C C

D D

A T A D C

D

D

D N G

V 5 +

T E D P H

3 H T

4 H T

5 H T

8

4 1 4

S L

3 0 7 1

D

0 2 7 1 R

) C N (

K 0 0 1

% 5 W 6 1 / 1 R 0 1 1 1 7 1

R

B07

B07

18400_523_090301.eps

090619

HDMI Input

Circuit Diagrams and PWB Layouts

EN 59TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

E

3 B 1 0 1 2

R

2 A 1 0 1 2

U

2 B 2 0 1 2 U
2 B 3 0 1 2 U
6 B 4 0 1 2 U
6 B 5 0 1 2 U
6

C 6 0 1 2 U

2 C 7 0

1 2

U

2 D 8 0 1 2 U
2 E 9 0 1 2 U

L C S

_ C

D D

_ 1 I M

D

H

A D S

_ C D D _ 1

I

M

D H

D P H _ 1 I M

D H

L C S _ C D D _ 3 I M D H

A D S

_

C

D D _ 3 I M

D H

D P H _ 3

I M

D

H

- 2

D _ 1 I M

D H

- K C _

3 I M

D

H

+ K C _ 3 I M

D H

- 0

D

_ 3 I M

D H

+

0 D _ 3 I M

D H

E _ C E

C

- 1 D _ 3 I

M

D

H

+

1 D _ 3 I M D H

- 2 D _ 3 I M D H

+ 2 D _ 3

I M

D

H

+ 2 D _ 1 I M D H

E

_ C E C

+ 1

D _ 1 I M

D H

L C S _ C D D _ 2 I M D H

- K

C _ 2 I M D H

+ K C _ 2 I M D H

- 0 D _ 2 I M D H

+ 0 D _ 2 I M D H

+ 0 D _ 1 I M D H

-

1 D _ 2 I M D H

+ 1 D _ 2 I M D H

- 0 D _ 1 I M D H

- 2 D _ 2 I M D H

+ K C _ 1 I M D H

+ 2 D _ 2 I M D H

A D S

_ C D D _ 2 I M D H

- K C _ 1 I M D H

D P H _ 2

I M D H

- 1 D _ 1 I M D H

3 1 , 0 1 - 0 D _ 1

I M

D H

3

1 , 7

- K C _ 3 I M D H

3 1

, 0 1

+ 2 D _ 1 I M D H

3 1 , 0 1 - 0 D _ 2 I M D

H

3 1 , 0 1 + 2 D _ 2 I M D H

3 1 , 0 1 + K C

_ 2

I M D H

0 1 D P H _ 2 I M D H

3 1 , 0 1 L C S _ C D

D _ 2 I M D

H

3 1 ,

0 1

- 1

D _ 2 I M

D H

3 1 , 0 1

- 2 D _ 2

I M

D H

3

1 , 0 1 + 1 D _ 2 I

M D

H

3 1 , 0 1 A D S _ C D D _ 2 I M D H

3 1 , 0 1 + 0 D _ 2

I M D

H

3 1 , 0 1

+ K C _

1 I

M

D H

3 1 ,

0 1

- K C _ 1 I M D H

0 1 , 7

C E C

0 1 D P

H _ 1

I M

D H

3 1 , 0 1 L C

S _

C D D _ 1

I M

D H

3 1 , 0 1 - 1 D _ 1 I M D H

3 1 , 0 1

- 2

D _ 1 I M

D H

3 1 , 0 1 + 1 D _ 1 I M D H

3

1 , 0

1 A D S _ C D D

_ 1

I M

D H

3 1 , 7 - 0 D _ 3 I

M

D

H

3 1 , 7

+ 2

D _ 3 I M

D H

3 1 , 7 + K C _ 3 I M D H

3 1 , 0 1 - K C _ 2 I M D H

0 1 , 7 D P H _ 3 I M D H

3

1 , 0 1 , 7

L C S _ C

D D _ 3 I

M D H

3 1 , 7 - 1 D _ 3 I M D

H

3 1

, 7 - 2

D _ 3 I M

D H

3 1 , 7

+ 1

D _ 3 I M

D H

3 1 , 0 1 , 7 A D S _ C

D D _ 3 I

M D

H

3 1 , 7 + 0 D _ 3 I M

D H

3 1 ,

0 1

+ 0 D _ 1 I M D H

) C N ( T C T . P 4 2 5 0 p m a l C

R

7 0 1 2 U

1
2

3

4
5

6

7

8

9

0

1

1

N I

2

N I

GND

3

N I

4 N I 4

T U O

3

T U

O

GND

2 T U O

1 T U

O

) C N ( T C T . P 4 2 5 0 p m a l C

R

1 0 1 2 U

1
2

3

4
5

6

7

8

9

0 1

1

N I

2

N I

GND

3

N I

4 N I 4 T U

O

3

T U O

GND

2 T

U

O

1 T U

O

) C N ( T

C T .

P 4

2 5 0 p m a l C

R

8 0 1 2 U

1
2

3

4
5

6

7

8

9

0 1

1 N

I

2

N I

GND

3

N I

4

N I 4

T U

O

3 T U O

GND

2 T U O

1 T

U O

) C

N ( T

C T . P

4 2 5

0 p m a l C R

4

0 1 2 U

1
2

3

4
5 6

7

8

9

0 1

1 N I
2

N I

GND

3 N I
4 N

I

4

T U

O

3 T U O

GND

2 T U O

1

T U

O

) C N ( W 6 1 / 1 5 0

R 0 1

0 1

2 R

) C N (

T C

T . P 4 2 5 0 p m a l C

R 3 0 1 2

U

1
2

3

4
5

6

7

8

9

0 1

1 N

I

2

N I

GND

3

N I

4 N

I 4

T U O

3

T U

O

GND

2 T U O

1 T U O

) C N ( T C T . P 4 2 5 0 p m a l C R 6 0 1 2 U

1
2

3

4
5 6

7

8

9

0

1

1

N I

2 N I

GND

3 N I
4 N

I 4 T U O

3 T U

O

GND

2 T U O

1 T U O

)

C N ( T

C T . P 4 2 5 0 p m a l C

R

2

0

1 2 U

1
2

3

4
5 6

7

8

9

0 1

1

N I

2

N I

GND

3

N I

4 N I 4 T U O

3

T U

O

GND

2 T U

O

1 T U

O

)

C

N

( T C T . P 4 2 5 0 p m a l C R

9 0 1 2

U

1
2

3

4
5

6

7

8

9

0 1

1

N

I

2 N I

GND

3 N I
4

N I 4

T U O

3

T U O

GND

2

T U O

1 T

U O

) C N ( T C T . P 4 2 5 0 p m a l C R 5 0 1 2

U

1
2

3

4
5 6

7

8

9

0 1

1 N I
2 N I

GND

3

N I

4 N I

4 T U O

3 T U

O

GND

2 T U O

1 T U O

B08

B08

18400_524_090301.eps

090619

HDMI ESD protection

SSB: HDMI ESD protection

EN 60TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 61TPM3.1E LA 10.

SSB: Stand-by MCU

1

2

3

4

5

6

7

8

9

0 1

1

1

Stand-by MCU

B09

A A

3V3+

01

9

Q

4

1514

R

)CN(%5 W61/1 K01

B B

1

31

512,

4
4

C

D

E

F F

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H H

1

1YEK71,31

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W

P

3V3_RI_CR71,31

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CEC_UCM01

CNYSV_CP

NYSH_CP

C

1DXT61

1DXR61

WS_RWP_DUA02,31

YBTS2DEL71,31

4

LCS_1PSI

DS_

SI4

A

1

P

L

CS6

ADS61

2514

R

1

01

)

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P4

P4

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6

1 %5-+ M

1/

LCS_TM31,9
ADS_TM31,9

PW_MORPEE31

3

214R

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CNYSH_C

7314R

W

)CN(2007N2

R4106 10KOHM +-5% 1/16W

R4105 10KOHM +-5% 1/16W

R4101 27K 1/16W 5%

R4104 10KOHM +-5% 1/16W

)CN(%5 W61/1 R74

1

0114Q

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6414

R

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8314R

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1

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0

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1

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R4108 10K(NC)

R4109 10K(NC)

R4110 10KOHM +-5% 1/16W

3514R

4514R

7514

2

1

1

R4107 10KOHM +-5% 1/16W

9314R

GIT1122NUM

S_TM

C

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1

U

8

7

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6
5

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4

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W61/1 %5-+ MHOK0

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3+

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W61/1 %5-+ MHOK01

3014

CV

C

PW

LCS

S-NC23C

R4112 33K OHM 1/16W(NC)

R4111 10KOHM +-5% 1/16W

31CNYSV_TM

31CNYSH_TM

3V

1

0

A

2

1A

3

2A

4

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D

T-H

R4113 10KOHM +-5% 1/16W

R4114 10KOHM +-5% 1/16W

R4115 33K 1/16W 5%

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1

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1 31

D

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R4116 6K8 1/16W 5%

1

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4

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4

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4

114

9

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4

7

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4

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2

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3

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I

1

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PG

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2

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8

7
6
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CN
CN
C

N
C

S

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cc

1
2

3

4
5
6
7
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2

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001

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6A 3014C
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5A 1014D

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5A 1014B

3E 3014BF

3F 1014Q

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2C 3014Q

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2D 40

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2E 70

5E 8014Q

2A 9014Q

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3

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3A 5
3A 6014R

701

3A

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3A

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3A 9014
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4

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4A
4A 3114R
4A 4114R

R

4A 5114
4A 6114

R

5B 7114R

R

5B 8114
5B 9114R
8A 0214R
5B 1214R

214R

8B 2

2

14R

2B 3

B 4214R

7

R

2B 5214
7B 6214R

721

5B

4R

R

5B 8214
5B 9214

R

5B 0314R

R

2B 1314

3

5B

14R

2

5B 3314R

R

4

1

5B 43
5B 5314R

5C 6314R
2F 7314R

F 8314R

3
3F 9314R

414

7D 0

R

3F 1414R
7F 2414R

3414R

7E

3C 5414R

3D 6414R

7414R

5C

5D 8414R
3E 9414R

514R

5E 0
2A 1514R

2C 2514R

4R

3C 351

3D 4514R

6C 5514R

6D 6514R

7514R

3E

8514R

6E

8E 9514R

1014U

6A

9C 2014U
4F 301

4U

4014U

8E

U

8E 5014
9B 1014X

01B 6014C

01E 8014
01E 9014C

C

D

E

G

1

2

3

4

5

6

7

8

9

0 1

1 1

18400_525_090301.eps

090619

2009-Jun-26

SSB: Scaler

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

0

1

0

1

1

1

1

1

A

A

B

B

C

C

D D

E

E

F

F

G

G

H H

ECAFRE

TNI

SDV

L

FI hs

a

lF la

ireS

elbissop sA 2228TM ot esolC

tu

pni

1PM

OC

tup

ni AGV

tu

pni

2PM

OC

I

M

D

H

YE

K

7C 3024C 6A 2024C 7A 1024

C

8C 6024C 7C 5024C 7C 4024C
9C 90

24

C

7C 8024C 7C

7

0

24

C

9C 2124C 9C 1124C 9C 0124C

7D 5124C 7D 4124C 01C 3124

C

9D 8124C 8D 7124C 9

D

6124C

8D 1224C 9D 0224C 9D 9124C

9E 4224C 1E

3224C 8E 2224C

9E 7224C 8E 6224C

9E 52

24C

9

F 03

24C 8F

9224C 9E 8224

C

9F 33

24C 9F 23

24C

9F 1324C

8

F

6324

C

01F

53

24C 9F 4324C

1G 9324C 4G 8324C 01F 7324C
1G 2424C 1G 1424C 1G 0424C
4G

54

24C 2G

4424C 2G 3424C

2G 8424C 2G

7

424C 2G 6424C

9

G 1524C 9G 0524C 8G 9424C

1G 4524C

01G 3524C 01G 2524C

2

G 7524C 1G 6

5

2

4C 1G 5524C

2G 0624C 2

G

9524C 2G 8

524

C

5

G

3

6

2

4

C

4G 26

2

4C

2G

16

24C

6G 6

6

2

4C 5G 562

4C

5G 4624

C

3G 9624C 3G 8624C 3G 7624C
7G

2

724C 6G 1724C 4G

0724C

9G 57

2

4

C

9G 4

724C 8G 3724C

1G

8724C 01

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6

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2G 1824C 1G 0824C 1G 9

7

2

4C

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58

24C

5H 0924C 5H 9824C 4H 8824C
3

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3G 4924C

7C 9924C

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01C 2034C 9C

1034C

9C 0034C

9C 2024BF 4F 1024B

F 7A 1024

D

9

E 5024BF 9D 4024BF 9D 3024BF

9F 8024BF 9F 7

0

2

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E 6

024BF

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0

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F 9

024BF

4

G 4124BF 3G 3124BF 1G 2124BF

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5G 5124BF

5

G 0224BF

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7E 1024Q

8A

2224BF 01B 1224BF

7D 4

414R 8B

3024Q 8A 2024Q

7

A 40

24R

7D 3024R 2A 2024R

6B 0124R 5A 7024R 6A 6024R
7D 3124R 7B 2124R 6B 1124

R

7B 6

124R

7A 51

24R 7A 4124R

7

B 0224R 6D 9124R 7D 7124R

6B 3224R 1A 2224R

2F

1224R

7

B 7224R 1A 6224R 6B 4224

R

7

E 0324R 6A 9224R 7B 8224R

7C 3324R 7B 2324R 7B 13

24R

5A 6324R 5A 5324R 7B 4324R
5A 9324R 5A 8324R 5A 7324

R

8B 2424R

6D

1424R

5A

0424R

2A 1024U 8A 4424R 8A 3424R
7D 1024X 8B 3024U 6A 2

0

2

4U

2

LA

2RA

1

L

A

3

LA

1RA

3

RA

DV10

UP31

UP35

GPIO_7

GPIO_8

DV33

U0TX

U0RX

5NI

DA

MT_RC_3V3

KLCMOA

AV12A_RGB

AV12D_RGB

GPIO_4DV10

DV33

VGAHSYNC#

L

L

P_21V

A

GIDFIS_33VA

GPIO_0

GPIO_9

GPIO_10

T

UO_FIDPS

LTX_

33VA

GPIO_1

L_DUA

C

DA_33V

A

E3P

KCR

LOA

KCBOA

SPI_SO

E3N

SPI_SI

SPI_SCK

3NIDA

E0N

O0N

2

2_

O

I

PG

2NIDA

ECKP

ECKN

MCIVA

3

2_OIP

G

ICE

4

2

_O

IPG

GPIO_11

E2P

E2N

E1P

E1N

02_OIPG

1NID

A

0NI

D

A

AV33_LVDS

UP30

E0P

GPIO_2

GPIO_3

GPIO_5

GPIO_6

4NIDA

VGASOG

VGAGND

REDP

GRNP

BLUP

PR0P

YPBPR0_N

Y0P

PB0P

SOY0/FB0

YPBPR1_N

PR1P

Y1P

PB1P

O3P

O3N

OCKP

O2P

O2N

O1P

O1N

O0P

UP33

UP34

Y

B

T

S

_2DE

L

01VD

AV33_USB

3

3VD

O

LATX

HDMI1_D0+

HDMI1_D0-

HDMI1_D1+

HDMI1_D1-

HDMI1_D2+

HDMI1_D2-

HDMI1_CK+

HDMI1_CK-

HDMI1_DDC_SCL

HDMI2_DDC_SCL

HDMI2_DDC_SDA

HDMI3_DDC_SCL

HDMI3_CK+

HDMI3_D1+

HDMI3_D1-

HDMI3_D0+

HDMI3_D2+

HDMI3_D2-

HDMI3_D0-

HDMI3_CK-

HDMI2_CK+

HDMI2_D1+

HDMI2_D1-

HDMI2_D0+

HDMI2_D2+

HDMI2_D2-

HDMI2_D0-

#S

C

_IP

S

O

S

_

I

PS

I

S_

IP

S

P3E

N3E

PKC

E

NKCE

P2E

N2E

P

1E

N1

E

P

0

E

N

0

E

P

3O

N3O

PKC

O

NKCO

P2O

N

2

O

P1

O

N1

O

P0O

N

0O

AV33_LVDS

HDMI1_DDC_SDA

HDMI3_DDC_SDA

OCKN

52_

OIP

G

FERCDA_33VA

R_DU

A

DIMV_DU

A

ILATX

USBVRT

HDMI2_CK-

VGAVSYNC#

SOY1

DV10

1QD

R

3QD

R

2QD

R

6QD

R

5

Q

DR

4QDR

7QDR

8QDR
9QD

R

01QD

R

9AR

11QDR

33VD

2

1

Q

DR

31QDR
4

1QD

R

5

1QD

R

2

1AR

11

AR

8

A

R

7A

R

6

AR

5AR
4AR

0

1

A

R

0

AR

1AR

2A

R

3AR

0QDR

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#

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V

P

0RP

N_0RPBPY

P

0Y

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N

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P1RP

P1Y

P1BP

GOSAG

V

DNGAGV

PDE

R

PNRG
PULB

1YOS

0B

F/0YO

S

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MDH

ADS_CDD_3IMD

H

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H

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-KC_3IMDH
L

CS_CDD_3IMDH

+0D_3IMD

H

-

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I

MDH

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+

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ADS_CDD_2IMD

H

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H

LCS_CDD_2IMDH

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DH

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H

ADS_CDD_1IMD

H

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1IMDH

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-

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LCS_CDD_1IMDH

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IMD

H

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T

M_

T

SR

222

8

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2

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4

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1

2

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G

0

ATA

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CS

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P

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4

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L

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PD_BSU7

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11,01+1D_2IMD

H

11

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D_2IMD

H

11,01+2D_2IMDH
11,01-2D_2IMDH
11,01+KC_2IMD

H

11,01-KC_2IMDH

11,01-0D_1IMD

H

11,01+

0D_1IMD

H

11,0

1ADS_CDD_1IMDH

11,01LCS_CDD_1IMD

H

1

1,01+1D_1IMDH

11,01

-1D_1IMDH

11,01+2D_1IMD

H

11

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D_1IMD

H

11,01+KC_1IMDH
11,01-KC_1IMD

H

82R

A

82LA

83RA

83LA

12MWP_SSE

NTHGI

R

B

02ETUM_PMA

21PW_MORPEE

0

2NE_P

M

A

020NIAG_

PMA

0

21NIAG_PMA

81L_DUA

81R_DUA

6NI_Y_SBVC_2TCS

6NI_C_S_2TC

S

7NI_Y

VS_EDI

S

7

NI_CVS_EDIS

6NI_SBVC_1TCS

7NI_SBVC_EDI

S

6

NI_

SF_1TCS

6NI

_SF_2

TCS

71ROSNES_THGIL

5NI_1SBVC

02

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W

P_DUA

71

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2

DEL

12,21

Y

BDNAT

S

12,2

1WS_R

W

P_

V

5

8

1

1

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91E

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RW

_HS

ALF

P

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L

T

C_DPH_1IM

D

H

0

1

L

T

C

_

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01

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P

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1

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2

1

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51

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NO_1DEL7

1

C

O_BSU7

FFO_

N

O_RETRE

V

NI

1

2

7

12YEK

71,211YEK

71,211DXT_

TM

X

T0U71,4

X

R0U71,4

71,211DXT_

TM

71,211DXR_T

M

71,211DXR

_TM

61Rt

uOUA_V

TI

61LtuOUA_VT

I

812LES_NIDUA

813LES_NIDUA

814LES_NIDU

A

91ROA_NIAM

91LOA_NIAM

7

1,213V3_RI_CR

7

1,21FFO_NO_CD

71,21FFO_NO_

CD

21KC

S

IP

S

5

1-4EXR

5

1+4E

X

R

51-4OXR

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1+4

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CAD_33V

A

L

LP_21

V

A

SBVC_33VA

GIDFIS_33V

A

LTX_

33VA

FERCDA_33V

A

B

SU_33VA

LLPME

M

_

2

1

V

A

BSU_21V

A

BGR_A21VABGR_D21VA

01VD

33VD

01V

D

VRDD

LLP_21VA21VA SDVL_21V

A

21VA IMDH_21VA21VA

BSU_33VA3V3+

FERCDA_33VA3V3

+

F

IS_33V

A

CAD_33

VA

CDA_33V

A

V5_3IMDH V5_2IMDH

I

MDH_33VA

V5_

1IMD

H

IM

DH_21

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AGV_33VA

L

LPSDVL_2

1

VA

S

DVL_

21VA

S

DVL_33

V

A

3

3

VD

VRDD

LLPSDVL_21VA21VA

LLPMEM_21VA

21VA

B

SU_21VA

21VA BGR_D21VA

2

1VA

BGR_A21VA

21

VA

LTX_33VA3V3+

3V3+

GID

FIS_33VA

3V3+ CDA_33VA 3V3+ IMDH_33VA

SDVL_33VA3V3+

01VD

01V

D

3V3+

SBVC_33VA

3V3+

3V3+

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FIS_33

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AGV_33V

A

33VD3V3+

3

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+

3V3+

3

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3

+

3V3+

3V3+

3V3+

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1
2
3
4
5

6

7

8

9

0

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1

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1

2

3

4

5

6

7

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51

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0

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3

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25

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1

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1

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1

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1

141

04

1

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831

73

1

63

1

531

431

33

1

23

1

13

1

031

921

256

255

254

253

252

251

250

249

248

247

246

245

244

243

242

241

240

239

238

237

236

235

233

234

232

231

229

230

228

227

226

225

224

222

223

221

220

218

219

217

216

215

214

213

212

210

211

209

208

206

207

205

204

203

202

201

200

199

198

197

196

195

194

193

6566676869707172737475767778798081828384858687888990919293949596979899

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

7

52

1CS_SBVC

1YS_SBVC

0CS_SBVC

0YS_SBV

C

P3SBVC

P2SB

VC

P1SBVC

N0SBVC

P0S

BVC

0SSAP

YB_

SB

V

C

1

SSAPYB_SBVC

SBVC_33DDV

A

F

IS_33DDV

A

P_2XPM

N_2XPM

1XP

M

GID_

33DDVA

0NID

A

1NID

A

2NID

A

3NIDA

4NIDA

5NIDA

LA

TX_33DDV

A

OLATX

ILAT

X

LL

PMD

_

21D

D

V

A

LLP

SP_21DDV

A

LLPCDA_21DDVA

LLPSYS_21DDVA

LLPA_21DDV

A

C

DAA_33DDV

A

DIM

V

L_NIA

R_N

IA

CDAA_P

FER_33DDVA

CADA_

3

3

DDVA

3LA

3R

A

2LA

2RA

2

MCIV

A

1L

A

1RA

3_01DDVD

1

_33DD

V

KLC

M

O

A_S2I

KCRLOA_S2I

KLCBOA_S2

I

0ATADSOA_S2I

NIDA_S

2I

02OIP

G

12OI

PG

22O

IPG

3

2OIPG

42OIP

G

52OI

PG

ADS_WH

LCS_WH

1DXR

1D

X

T

TUO_FIDPS

0

MWP

1MW

P

LCS_AGV

ADS_A

GV

2_33DDV

2_01DDVD

0FERVR

1_OI2CCV

3AR

2AR

01DDVD

1AR

0AR

01AR

1

A

BR

0ABR

#SCR

#SARR

#SA

CR

#EWR

4

AR

5AR

6AR

7AR

8AR

9A

R

2_OI2CCV

11AR

21AR

EKCR

2_OI2CCV

0K

LCR

#

0

K

LCR

1_OI2CC

V

1

_LLPMEM_21DDV

A

5

1QD

R

41QDR

31QDR

2_OI2CCV

21QD

R

1

1QDR

01QDR

2_OI

2CCV

9

QDR

8QDR

2_OI2CCV

1SQDR

2_OI

2CC

V

1

MQDR

2_01

D

DVD

0MQ

D

R

2_O

I

2

CCV

0SQDR

3

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V

7Q

D

R

6

QDR

5QD

R

2_OI2

CCV

4QDR

3QDR

2

QDR

2_OI2CCV

1QD

R

0QDR

2_01DDVD

2_01D

D

VD

AVDD12_RGB

AVDD12_DIG_RGB

PR0P

PB0P

COM0

Y0P

SOY0

PR1P

PB1P

COM1

Y1P

SOY1

AVDD33_VGA

RP

COMGPSOGBPHSYNC

VSYNC

AVDD12_HDMI_3

RX0_2

RX0_1

RX0_2B

RX0_1B

RX0_0

RX0_C

RX0_0B

RX0_CB

HDMI_SCL0

HDMI_SDA0

PWR5V_0

RX1_2

RX1_1

RX1_2B

RX1_1B

RX1_0

RX1_C

RX1_0B

RX1_CB

AVDD33_HDMI

HDMI_SCL1

HDMI_SDA1

PWR5V_1

RX2_2

RX2_1

RX2_2B

RX2_1B

RX2_0

RX2_C

RX2_0B

RX2_CB

HDMI_SCL2

HDMI_SDA2

PWR5V_2

HDMI_CEC

DVDD10

USB_DP1

USB_DM1

AVDD12_USB

USB_VRT

AVDD33_USB

USB_DP0

USB_DM0

PWM2

PWM3

ICE

PRST#

SPI_CS0

SPI_SO

SPI_SI

SPI_SCK

SPI_CS1

INT0_

IR_

RXD0

TXD0

UP30

UP31

UP33

UP34

UP35

VDD33_1

DVDD10_4

AVDD12_VPLL

TP

E4P

E4N

E3P

E3N

ECKP

ECKN

AVDD33_LVDSB

E2P

E2N

E1P

E1N

E0P

E0N

AVDD12_LVDS

O4P

O4N

O3P

O3N

OCKP

OCKN

AVDD33_LVDSA

O2P

O2N

O1P

O1N

O0P

O0N

DVDD10_3

DVDD10_3

VDD33_2

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

1H

T

2124C

V61

N001

%5 W61/1 R228224R

8224C

V61 N00

1

6124B

F

Am0003/R02

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V61 N001

%

5

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V61

N001

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F

Am0

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1 2

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C

V61 N001

3424C

V61 N001

1324C

V61 N001

5824C

V61 N001

2

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C

3V

6 7U4

+

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Am0003/R021

1 2

2

0

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2007N2

18400_526_090301.eps

090619

B10 B10

Scaler

Circuit Diagrams and PWB Layouts

EN 62TPM3.1E LA 10.

2009-Jun-26

SSB: DDR1 Memory

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D

D

E

E

3 B 1 0 1 5 C
4

A 2 0 1 5

C

5 A 3 0 1 5

C

5 A 4 0 1 5 C
5 B 5 0 1 5 C
5

B 6 0

1 5

C

5 B 7 0 1 5

C

4 B

8 0

1 5

C

5

B 9 0 1 5 C

5 C 0 1 1 5

C

1

C 1 1 1 5

C

2 C 2 1 1 5 C
2 C 3 1 1 5 C
2 C 4 1 1 5 C

3 C 5 1 1 5 C
3

C 6 1 1 5 C

1 C 7 1

1 5

C

3 C 8 1

1 5

C

3 C 9 1 1 5

C

3

C 0 2 1 5

C

5 C 1 2 1 5 C
2 C

2 2 1 5 C

5 C

3 2 1 5

C

1

C 4 2 1 5 C

2 C 5 2 1 5 C
5 D 6 2

1 5

C

2 D 7 2 1 5 C
3

D 8 2 1 5

C

3 D 9 2 1 5 C
4 D 0 3 1 5 C
5 D 1 3 1 5 C

5 A

1 0

1 5 P

R

6

A

2 0

1 5 P

R

5 A 3 0 1 5 P R
6 A 4 0 1 5 P

R

5 B 5 0 1 5 P R
6 B

6 0 1

5 P R

5 B 7 0 1

5 P

R

6 B 8 0 1 5 P R
5

C

9 0

1 5 P R

6

C

0 1 1 5 P R

5

C

1 1 1 5 P R

6 C 2 1 1 5 P

R

5 C 3 1 1 5 P R
6 C

4 1 1 5

P R

5 D 5 1 1 5 P R
6

D

6 1 1

5 P

R

5 D 7 1 1 5 P R
6 D 8 1 1 5 P R

2 D

1 0 1 5

R

5 B 2 0 1 5

R

6 B 3 0 1 5

R

5 B 4 0 1 5

R

6 B 5 0 1

5 R

5

B 6 0

1 5

R

6 B 7 0 1 5 R
5

B 8 0 1 5 R

6 B 9 0 1 5 R

6

D 0 1 1 5

R

6 E 1 1 1 5

R

6 E 2 1 1 5 R
6 E 3 1 1 5

R

2

A 1 0

1 5

U

2

D 2 0 1 5 U

6 R D D

A _ M

E M

5

R D D A _ M E M

4

R D D A _ M E M

0 Q D _ M E M

F

E R V _ M E M

5 1 Q D _ M E M

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B11 B11

18400_527_090301.eps

090619

DDR1 Memory

Circuit Diagrams and PWB Layouts

EN 63TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

EN 64TPM3.1E LA 10.

SSB: Panel Interface

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18400_528_090301.eps

090619

2009-Jun-26

Circuit Diagrams and PWB Layouts

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C13 B13

18400_529_090301.eps

090919

iTV Interface and AOC Hotel

SSB: iTV Interface and AOC Hotel

EN 65TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

E

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B14

B14

18400_530_090301.eps

090619

Keyboard, IR & ComPair interface

SSB: Keyboard, IR & ComPair interface

EN 66TPM3.1E LA 10.

2009-Jun-26

SSB: Audio Switch

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B B

C C

D D

E

E

4

L E S _ N I D U A 3 L E S _ N I D U A

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L E S _ N I D U A 1 L E S _ N I D U A

N

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t u p n i o i d u

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N

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B15

B15

18400_531_090301.eps

090619

Audio Switch

Circuit Diagrams and PWB Layouts

EN 67TPM3.1E LA 10.

2009-Jun-26

SSB: Audio Preamplifier

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

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4 B

1

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5 B

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4 B

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B16

B16

18400_532_090301.eps

090619

Audio Preamplifier

Circuit Diagrams and PWB Layouts

EN 68TPM3.1E LA 10.

2009-Jun-26

SSB: Audio Amplifier

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

E

Subwoofer

7

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3

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4 A 1 0 3 6 C
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4

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B17

B17

18400_533_090301.eps

090619

Audio Amplifier

Circuit Diagrams and PWB Layouts

EN 69TPM3.1E LA 10.

2009-Jun-26

SSB: DC-DC Power

1

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B18

B18

18400_534_090301.eps

090619

Circuit Diagrams and PWB Layouts

EN 70TPM3.1E LA 10.

2009-Jun-26

SSB Layout Top view

C1101 D2 C1702 C2 C5325 A4 C7140 A3 FB5301 A4 R1123 E2 R1703 C3 R4211 B3 R5415 D1 RP5102 B2
C1103 D2 C1703 D5 C5326 A4 C7141 A3 FB5302 A4 R1124 D2 R1704 C3 R4212 B3 R5416 C1 RP5103 B2
C1104 D1 C4101 A4 C5327 A4 C7142 A1 FB5303 A4 R1125 D2 R1705 C3 R4213 B3 R5417 C1 RP5104 B2
C1105 D1 C4102 B4 C5328 A4 C7143 A3 FB6201 A5 R1126 D2 R1706 C2 R4216 B3 R5418 C1 RP5105 B2
C1108 C3 C4103 A4 C5329 A4 C7144 A2 FB6301 A4 R1127 D1 R1707 C3 R4217 B4 R5419 E2 RP5106 B2
C1109 C3 C4104 B4 C5330 A4 C7146 A3 FB6303 A5 R1129 E1 R1708 C3 R4219 C3 R6115 D3 RP5107 B2
C1110 C3 C4105 B4 C5331 A4 C7147 A3 FB7101 A1 R1132 E1 R1709 C2 R4220 B3 R6125 C4 RP510

8 B2
C1111 C3 C4106 B4 C5332 A4 C7149 A4 FB7102 A1 R1133 E2 R1710 C3 R4222 B2 R6126 D4 RP5109 B2
C1112 D1 C4108 A3 C5333 D5 C7152 A2 FB7103 A2 R1134 E1 R1711 C2 R4226 B2 R6127 C4 RP5110 C2
C1113 D1 C4109 A4 C5334 A4 C7153 A4 FB7104 A2 R1135 E2 R1712 C2 R4227 B3 R6128 D4 RP5111 B2
C1114 D1 C4201 B4 C5401 C1 C7154 A3 FB7105 A2 R1137 E2 R1713 C2 R4228 B3 R6137 B4 RP5112 C2
C1115 C3 C4202 B3 C5402 C1 C7155 A3 FB7106 A1 R1201 C3 R1714 C2 R4229 B3 R6138 B4 RP5113 B1
C1116 D2 C4205 B3 C5403 D1 C7156 A3 FB7107 A1 R1202 C3 R1715 C2 R4230 B3 R6202 B5 RP5114 C2
C1117 D1 C4207 B3 C5404 C1 C7157 A3 FB7108 A2 R1203 C3 R1716 C2 R4231 B3 R6203 A5 RP5115 B2
C1118 D2 C4208 B3 C5405 C1 C7158

B4 FB7109 A2 R1204 C3 R1717 C1 R4232 B3 R6204 B5 RP5116 B2
C1119 D2 C4209 B3 C5406 A3 C7159 B4 FB7111 A3 R1208 C3 R1718 C2 R4233 B3 R6205 B5 RP5117 B1
C1201 C3 C4214 B4 C6119 C4 C7160 A4 FB7112 A1 R1213 D5 R1719 D5 R4235 B3 R6207 B5 RP5118 C2
C1202 C3 C4215 B3 C6121 D4 CN1101 E2 FB7113 A1 R1214 D5 R1720 C2 R4236 B3 R6209 B5 TH1401 B5
C1203 C3 C4219 C3 C6122 D4 CN1102 D2 FB7114 A3 R1215 C3 R1721 D5 R4237 B3 R6210 B5 TH5301 D5
C1204 C3 C4220 C3 C6123 C3 CN1201 D3 FB7115 A3 R1216 D5 R1722 C2 R4238 B3 R6211 B5 TU1601 D5
C1208 C3 C4223 C2 C6124 B4 CN1202 E3 FB7116 A4 R1217 D5 R1723 C2 R4239 B3 R6212 B5 TU1602 D5
C1209 C3 C4225 B3 C6125 B4 CN1203

E5 L1601 C5 R1218 D5 R1724 C2 R4240 B3 R6213 B5 U1401 B5
C1215 C3 C4227 C3 C6201 B5 CN1204 D5 L6301 A5 R1219 C3 R1725 C2 R5101 B2 R6214 B5 U1501 E4
C1217 C3 C4228 C3 C6203 B5 CN1301 D3 L6302 A5 R1220 D5 R1726 D5 R5102 B2 R6215 B5 U1502 D4
C1218 D5 C4234 B3 C6204 B5 CN1302 D3 L7101 A2 R1221 C3 R1727 D5 R5103 B2 R6216 A5 U1601 B5
C1219 D5 C4242 B2 C6205 B5 CN1401 C5 L7102 A2 R1231 C3 R1728 D5 R5104 B2 R6217 B5 U1701 D1
C1223 D5 C4244 C2 C6206 B5 CN1402 B5 L7104 A3 R1232 C3 R1729 D5 R5105 B2 R6218 B5 U1702 C2
C1232 C3 C4247 B2 C6207 B5 CN1403 E5 Q1201 D5 R1234 C3 R1730 D2 R5106 B2 R6301 A4 U1703 C2
C1233 C3 C4253 B3 C6208 B5 CN1404 C5 Q1502 E4 R1301 C4 R1731 D1 R5107 B2 R6302 A5 U1704 D5
C1235 C

3 C4275 B3 C6209 B5 CN1405 C5 Q1601 C4 R1303 C3 R1732 C2 R5108 B2 R6303 A4 U2101 C3
C1301 C4 C4277 B3 C6210 B5 CN1501 E5 Q1602 B5 R1305 C3 R2101 C3 R5109 B2 R6304 A5 U2102 C3
C1302 C3 C4278 B2 C6211 B5 CN1701 C3 Q1603 B5 R1402 C3 R4101 B4 R5110 B2 R6305 A5 U2103 C3
C1306 C3 C4279 B2 C6212 B5 CN1702 C2 Q1604 C4 R1404 B5 R4102 B4 R5111 B2 R6306 A5 U2104 C2
C1308 C3 C4280 B2 C6213 B5 CN5201 A3 Q1605 C4 R1405 C3 R4103 B3 R5112 B2 R6307 A5 U2105 C2
C1404 C3 C4281 B2 C6214 A5 CN5202 A3 Q1606 C4 R1407 C3 R4104 A4 R5113 B2 R6312 A5 U2106 C2
C1405 B5 C4282 B2 C6215 B5 CN5203 A3

Q1701 C2 R1411 E5 R4105 A4 R5201 A3 R6313 A5 U2107 E5
C1406 B5 C4283 B2 C6301 A5 CN5204 A3 Q1702 C3 R1412 E5 R4106 A4 R5202 A3 R6314 A5 U2108 E5
C1407 C3 C4284 B2 C6302 A5 CN5205 A3 Q1703 C1 R1413 D5 R4107 A4 R5203 B3 R6315 A5 U2109 E5
C1408 C3 C4285 B2 C6303 A4 CN5301 B5 Q1704 C2 R1415 E5 R4108 A4 R5204 B3 R6316 A5 U4101 A4
C1409 B5 C4286 B2 C6304 A5 CN5302 A4 Q1705 C2 R1417 B5 R4109 A4 R5205 B3 R6317 A5 U4102 B4
C1413 B5 C4287 C2 C6305 A5 CN5303 D4 Q1706 D5 R1418 C5 R4110 B4 R5206 A2 R6318 A5 U4103 A4
C1418 C5 C4293 B2 C6306 A5 CN5304 A4 Q1707 D1 R1419 B5 R4111 B4 R5207 A2 R6319 A5 U4104 A

3
C1501 E4 C4294 B2 C6307 A5 CN5305 A4 Q1708 D2 R1501 E4 R4112 B4 R5208 A2 R6320 A5 U4105 B3
C1502 E4 C4295 B2 C6308 A5 CN5306 D5 Q4101 A4 R1502 E4 R4113 A4 R5209 A3 R6321 A5 U4201 B3
C1503 D4 C4298 B4 C6309 A5 CN5307 D4 Q4102 B4 R1503 E4 R4114 A4 R5210 B3 R6322 A5 U4202 B4
C1504 E4 C4299 B4 C6310 A5 CN5401 C1 Q4107 A4 R1504 E4 R4115 A4 R5214 B3 R6323 A5 U4203 B4
C1505 E4 C4300 B4 C6311 A5 CN5402 E2 Q4108 A4 R1505 E4 R4116 A4 R5215 A3 R6324 A5 U5101 B2
C1506 E4 C4301 B4 C6312 A5 CN5403 D1 Q4109 B4 R1506 E4 R4117 A4 R5217 B2 R6325 A5 U5102 B2
C1507 E4 C4302 B4 C6313 A5 CN5404 C1 Q4201 B3 R1507 E4 R4118 A4 R5218 B2 R7102 B1 U5401 D1
C1508 E4 C5101 B2 C6314 A5 CN6301 A5 Q5303 D5 R1508

E4 R4119 A4 R5219 B2 R7103 B1 U6101 D3
C1510 E4 C5102 B2 C6315 A5 CN6302 A5 Q5304 A4 R1509 E4 R4120 B4 R5220 B2 R7104 B1 U6102 D4
C1511 D4 C5103 B2 C6316 A5 CN7101 A1 Q5305 A4 R1510 E4 R4121 A4 R5221 B2 R7105 A2 U6201 A5
C1514 E4 C5104 C1 C6317 A5 CN7102 B1 Q5401 C1 R1511 E4 R4122 B4 R5226 B2 R7106 A2 U6202 B5
C1516 E4 C5105 C2 C6318 A5 D1102 D2 Q5402 D1 R1512 D4 R4123 B4 R5305 B5 R7107 B1 U6301 A5
C1517 E4 C5106 C1 C6319 A5 D1103 D2 Q6201 B5 R1513 D4 R4124 B4 R5306 B5 R7108 B1 U7101 A2
C1518 E4 C5107 B1 C6320 A5 D1104 D2 Q6202 B5 R1514 D4 R4125 B4 R5311 B5 R7109 A2 U7102 B1
C1520 E4 C5108 B1 C6321 A5 D1701 C2 Q6301 A4 R1515 D4 R4126 B4 R5312 B5 R7111 A2 U7103 A2
C1521 E4 C5109 B2 C7101 B1 D1702 C2 Q6302 A5 R1516 D4 R4127 B4 R5322 A4 R7112 A2 U7104 A3
C1522 E4 C5110 B2 C7102 B1 D1703 C2 Q6303 A4 R1523 E4 R4128 B4 R5323 D5 R7113 A2 U7105 A3
C1523 D4 C5111 B1 C7103 B1 D1704 E5 Q6304 A5 R1524 E4 R4129 B4 R5324 A4 R7114 A2 U7106 A4
C1524 E4 C5112 B2 C7104 B1 D1705 C3 Q63

06 A5 R1529 D4 R4130 B4 R5325 A4 R7115 A2 X4101 B4
C1525 D4 C5113 B2 C7105 B1 D1706 C2 Q7101 B1 R1530 D4 R4131 A4 R5326 D5 R7116 A2 X4201 B4
C1526 E4 C5114 B1 C7106 B2 D1707 D5 Q7102 A2 R1601 C5 R4132 A4 R5327 D4 R7117 B4 ZD1101 E2
C1527 D4 C5115 B2 C7107 B1 D4101 B4 Q7103 A2 R1602 B5 R4133 A4 R5328 A4 R7118 A2 ZD1102 E2
C1528 D4 C5116 B2 C7108 A2 D4201 B4 Q7104 A2 R1605 B5 R4134 A4 R5329 A4 R7119 A2 ZD1103 E2
C1529 D4 C5117 B2 C7109 A2 D6201 A5 Q7105 A2 R1606 C5 R4135 A4 R5330 D5 R7120 A2 ZD1104 E2
C1533 D4 C5118 B2 C7110 A1 D6202 A5 Q7106 A1 R1608 B5 R4136 A4 R5331 D4 R7121 B1 ZD1105 E2
C1601 C4 C5119 B2 C7111 A2 D6203 A5 Q7107 A1 R1609 C3 R4137 A4 R5332 D5 R7125 A1 ZD5301 D5
C1602 C5 C5121 B2 C7112 A1 D6301 A5 Q7108 A1 R1610 B5 R4138 A4 R5333 A4 R7126 A1 ZD5302 D5
C1603 C5 C5122 B2 C7113 A1 FB1101 E2 R1105 D1 R1611 B5 R4139 A4 R5334 A4 R7129 A2 ZD5303 D4
C1604 C5 C5123 C2 C7115 A1 FB1102 D1 R1106 E2 R1612 B5 R4140 A3 R5335 A4 R7130 A1 ZD5

304 D4
C1609 B5 C5124 B2 C7117 A2 FB1103 D1 R1107 E1 R1613 B5 R4141 A4 R5336 C1 R7131 A1 ZD5401 C1
C1610 C3 C5125 B2 C7118 A2 FB1104 D1 R1109 E1 R1615 C4 R4142 B3 R5401 C1 R7132 A3 ZD5402 C1
C1611 C5 C5126 B2 C7119 A2 FB1105 D2 R1110 E1 R1616 B5 R4143 B3 R5402 C1 R7133 A3 ZD5403 E2
C1612 B5 C5127 B2 C7120 A2 FB1106 D2 R1111 C3 R1617 C4 R4144 B3 R5403 E1 R7134 A3 ZD5404 E2
C1613 C5 C5128 B2 C7121 A2 FB1402 B5 R1112 E1 R1618 B5 R4149 A4 R5404 C1 R7135 A3 ZD6201 B5
C1615 C3 C5129 B2 C7123 A1 FB1405 C5 R1113 E1 R1619 C4 R4150 A4 R5405 E2 R7137 A3 ZD6302 A5
C1616 B5 C5130 B2 C7124 A2 FB1406 C5 R1114 C3 R1620 B5 R4151 A4 R5406 E2 R7138 A3 ZD7101 A2
C1621 C4 C5312 B5 C7129 A2 FB4103 A4 R1119 C3 R1625 C4 R4204 B4 R5411 D1 R7144 A4
C1622 C4 C5313 B5 C7137 A1 FB4202 B3 R1120 E1 R1626 C4 R4206 B3 R5412 C1 R7145 B1
C1624 C4 C5323 A4 C71

38 A3 FB4221 B4 R1121 E1 R1627 B5 R4207 B3 R5413 C1 R7146 B1

C1701 C3 C5324 A4 C7139 A3 FB4222 B3 R1122 E2 R1701 C3 R4210 B3 R5414 C1 RP5101 B2

1617 C4 C5131 B2 C7125 A2 FB1407 C5 R1115 C3 R1621 B5 R4157 A4 R5407 D1 R7139 A4 ZD7103 A3
C1618 B5 C5201 A2 C7126 A2 FB1408 C5 R1116 D2 R1622 C4 R4158 A4 R5408 D1 R7140 B4 ZD7104 A1
C1619 C4 C5308 B5 C7127 A2 FB1409 B2 R1117 D2 R1623 C4 R4202 B2 R5409 D1 R7141 B4 ZD7105 A2
C1620 C3 C5309 B5 C7128 A2 FB4101 A4 R1118 D2 R1624 C4 R4203 B3 R5410 D1 R7142 B4

C

18400_553_090301.eps

090619

Circuit Diagrams and PWB Layouts

EN 71TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

SSB Layout: Part 1 Top side

EN 72TPM3.1E LA 10.

2009-Jun-26

18400_553a_090301.eps

090619

Circuit Diagrams and PWB Layouts

18400_553b_090301.eps

090619

SSB Layout: Part 2 Top side

EN 73TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

18400_553c_090301.eps

090619

SSB Layout: Part 3 Top side

EN 74TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

18400_553d_090301.eps

090619

SSB Layout: Part 4 Top side

EN 75TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

C1102 E2 FB1208 E3
C1106 E2 FB1209 E3
C1107 E2 FB1210 E3
C1205 D3 FB1211 E4
C1206 D2 FB1214 E5
C1207 D2 FB1215 E5
C1210 D3 FB1301 D2
C1211 D3 FB1302 E2
C1212 D3 FB1303 E3
C1213 D3 FB1304 E3
C1214 E3 FB1305 E3
C1220 E3 FB1401 D5
C1221 E2 FB1403 D5
C1222 E2 FB1404 D5
C1227 E3 FB4201 B3
C1228 E3 FB4203 C3
C1229 E5 FB4204 C3
C1230 E3 FB4205 B3
C1231 E5 FB4206 C3
C1234 E4 FB4207 B3
C1236 E5 FB4208 B3
C1237 E5 FB4209 C

3
C1303 D3 FB4210 C3
C1305 E2 FB4211 B3
C1310 E3 FB4212 B3
C1311 E3 FB4213 B3
C1312 D3 FB4214 B3
C1313 D3 FB4215 B3
C1315 E3 FB4216 B3
C1316 E3 FB4217 B3
C1317 E3 FB4218 B3
C1318 E3 FB4219 B2
C1320 D2 FB4220 B3
C1321 D3 Q4103 C3
C1322 D3 Q4104 C3
C13

23 D3 Q4105 B4
C1324 E2 Q4106 B4
C1325 D2 Q4110 A4
C1401 D5 Q4202 B3
C1402 D5 Q4203 B4
C1403 D5 Q6101 C3
C1414 C5 Q6102 D4
C1415 C5 Q6103 C4
C1416 C5 Q6105 D4
C1417 C5 R1101 E2
C1513 E4 R1103 E2
C1519 E4 R1104 E2
C1530 D4 R1108 E1
C1537 D4 R1205 D2
C4107 B3 R1206 D2
C4203 B3 R1207 D3
C4204 B3 R1209 D3
C4206 B3 R1210 D3
C4210 B3 R1211 D3
C4211 B3 R1212 D3
C4212 C2 R1223 E2
C4213 B3 R1224 E2
C4216 C3 R1225 E3
C4217 C3 R1227 E3
C4218 C3 R1228 E3
C4221 C3 R1229 E3
C4222 B3 R1230 E3
C4224 B3 R1233 E4
C4226 C3 R1238 E5
C4229 B3 R1239 E5
C4230 B3 R1240 E5
C4231 B3 R1241 E5
C4232 B3 R1302 D2
C4233 B3 R1304 E2
C4235 C3 R1306 E3
C4236 B3 R1307 D3

C4237 C3 R1308 E3
C4238 B3 R1309 D3
C4239 B3 R1310 E3
C4240 B3 R1311 D3
C4241 B3 R1312 D3
C4243 B3 R1313 E3
C4245 B3 R1314 E3
C4246 B3 R1315 E3
C4248 B3 R1316 E3
C4249 C3 R1401 D5
C4250 C3 R1406 D5
C4251 C3 R1408 D5
C4252 B3 R1409 C5
C4254 B3 R1410 C5
C4255 B3 R1414 C5
C4256 B3 R1416 C5
C4257 B3 R1517 E4
C4258 B3 R1518 E4
C4259 B3 R1519 D4
C4260 B3 R1520 D4
C4261 B3 R1525 E4
C4262 B3 R1526 E4
C4263 C3 R1527 D4
C4264 B3 R1528 D4
C4265 C3 R4145 C3
C4266 C3 R4146 C3
C4267 B3 R4147 B4
C4268 B3 R4148 B4
C4269 B3 R4152 A4
C4270 B3 R4153 C3
C4271 C3 R4154 C3
C4272 C3 R4155 B4
C4273 B3 R4156 B4
C4274 B3 R4159 B3
C4276 B3 R4214 B3
C4288 B3 R4215 B3
C4289 B3 R4221 C3
C4290 C3 R4223 B4
C4291 C3 R4224 B4
C4292 C3 R4234 B3
C4296 B3 R4241 B4
C4297 B3 R4242 B4
C5120 B2 R4243 B3
C6101 D4 R4244 B3
C6102 D3 R5211 A3
C6103 D3

R5212 A3
C6104 D3 R5213 A3
C6105 D4 R5222 A2
C6106 D3 R5223 A2
C6107 D4 R5224 A2
C6108 D3 R5225 A2
C6109 D3 R6101 C4
C6110 D4 R6102 D4
C6112 D4 R6103 C4
C6113 D4 R6104 D4
C6114 D4 R6111 D4
C6116 D4 R6112 D4
C6117 D4 R6113 C3
C6118 D4 R6114 C3
D1101 E1 R6118 C3
D1304 D2 R6119 C3
D1305 D3 R6120 C3
D1306 D3 R6121 D4
D1307 D3 R6122 D4
D1308 E2 R6123 D4
D1309 D2 R6129 C4
D1310 E3 R6130 C3
FB1201 D2 R6131 C3
FB1202 D2 R6132 C4
FB1203 D3 R6134 D4
FB1204 D

3 R6135 D4
FB1205 D3 R6136 D4
FB1206 E2 U1101 E1
FB1207 E2

18400_558_090301.eps

090619

SSB Layout: Bottom view

EN 76TPM3.1E LA 10.

2009-Jun-26

Circuit Diagrams and PWB Layouts

SSB Layout: Part 1 Bottom side

EN 77TPM3.1E LA 10.

2009-Jun-26

18400_558a_090301.eps

090619

Circuit Diagrams and PWB Layouts

SSB Layout: Part 2 Bottom side

EN 78TPM3.1E LA 10.

2009-Jun-26

18400_558b_090301.eps

090619

Circuit Diagrams and PWB Layouts

SSB Layout: Part 3 Bottom side

EN 79TPM3.1E LA 10.

2009-Jun-26

18400_558c_090301.eps

090619

Circuit Diagrams and PWB Layouts

SSB Layout: Part 4 Bottom side

EN 80TPM3.1E LA 10.

2009-Jun-26

18400_558d_090301.eps

090619

IR Board

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

A

A

B

B

C C

D D

E

E

W R

N O _ C D

F

F O _ C D

Y B T S _ C C V

V 5

V 7 . 3

1 C 1 0 2 0 N C
1

C 2 0

2 0

N C

2 B 1 0 2 0

C

5 B

2 0 2 0 C

2

C 3 0 2 0 C

2

C 4 0 2 0 C

3 C 5 0 2 0 C
3 C 6 0 2 0 C

2 B 1 0 2 0 B F
2

B 2 0 2 0 B F

2 B 3 0 2 0

B

F

2 C 4 0 2 0 B

F

2 C 5 0 2 0 B F
3 A 1 0 2 0 D E

2 A 1 0 2 0

Q

3 B 2 0 2 0 Q
3 B

3

0 2 0 Q

2 A 4 0 2 0 Q
3 A 1 0 2 0

R

3 A 2 0 2 0 R
2 B 3 0 2 0 R
3

B 4 0 2 0 R

3

B

5 0 2 0 R

4 B

6 0 2 0

R

4 B 7 0 2 0 R
4 B

8 0

2 0

R

5 B 9 0 2 0 R
2 A 0 1 2 0

R

2 A 1 1 2 0 R
5 B

1 0 2 0

U

5 C 1 0 2 0

D Z

Y B T S _ 2

D

E L

N O _ D E L

R

O S N E S _ T H G I L

L T

C _ R O S N E

S _ T H

G I L

L T C _ R O S N E S _ T H G I L

Y B T

S _

C C

V

Y B T S _

C C V

D N G _ I M E

Y

B T

S _

C C V

Y

B

T S _ C C V

7 0 2 0

R

% 5

W 6

1 / 1 7

K 4
4 0 2 0 R
% 5 W 6 1 / 1 7 K 4

1 0 2 0 D Z

1 V 5 C - 4 8 X Z B

1 3

1

0 2 0 Q

1

0 X

0 0 0 6 T M E T

1

3 2

2 0 2 0

B F

A m 0

0 2 /

R 0 0 6

1 2

3

0 2 0 B F

A m 0

0 2 / R 0 0 6

1

2

4 0 2 0

B

F

A

m 0

0 2 / R 0 0 6

1

2

5

0 2 0 B F

A

m 0

0 2 / R 0 0 6

1

2

2

0 2 0 N C

K

- 2 0 S - B V

S 7 0

- 5 1 3 1 S

1

2

3

4

9 8

5

6

7

9 0 2 0 R

% 5 W 6 1 / 1 R 0 2 2

3 0 2 0 R

% 5 W 6 1 / 1 M H O K 0 0 2

2

0 2 0

Q

C 7 4 8 C B

4 0 2 0 Q

C 7 5 8

C

B

1 0 2 0 D E L

F A W P K R U

S 5

2 0 3 - B P K

1

3

2

4

6 0 2 0 C

V 0 5 P 0 0 1

0 1 2 0 R

% 5 W 6 1 / 1 K 3 3

2 0 2 0 C

V 0 1 F

U 1

2 0 2 0

R

% 5 W 6 1 / 1 5 K 1

1

0 2 0 B F

A

m 0

0 2 /

R 0 0 6

1

2

1 0 2 0

C

V

0 1 F

U 1

1 0 2 0

R

% 5 W 6 1 / 1 5 K 1

8 0 2 0

R

% 5 W 6 1 / 1

M H O

7

K

2

5 0 2 0 C

V 6 1 N 0 0 1

4 0 2 0

C

V 6 1

N 0 0 1

3

0 2 0

C

V 6 1

N 0 0 1

1 1 2 0 R

% 5 W 6 1 / 1 K 8 1

1 0 2 0

U

1 B S 6 3 3 4

3

P O S

T

3

1

2

S V

T U O

D N G

6 0

2 0 R

% 5 W 6 1 / 1 K 0 1

1 0 2 0 N C

K - 1 0 S - B V R 7 0 - 5 1 3 1 S

1

2

3

4

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5

6

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R

% 5

W 6

1 / 1 K 0 1

3 0 2 0

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C 7 4 8 C B

J

J

18400_515_090301.eps

090619

IR Board

Circuit Diagrams and PWB Layouts

EN 81TPM3.1E LA 10.

2009-Jun-26

Layout IR

Circuit Diagrams and PWB Layouts

EN 82TPM3.1E LA 10.

C0201 A2 Q0204 A3
C0202 A2 R0201 A2
C0203 A2 R0202 A2
C0204 A1 R0203 A2
C0205 A2 R0204 A2
C0206 A2 R0205 A2
FB0201 A2 R0206 A2
FB0202 A2 R0207 A2
FB0203 A2 R0208 A2
FB0204 A1 R0209 A3
FB0205 A1 R0210 A3
LED0201 A2 R0211 A3
Q0201 A3 U0201 A2
Q0202 A2 ZD0201 A2
Q0203 A2

CN0201 A2
CN0202 A2

2009-Jun-26

18400_516_090301.eps

090619

Keyboard control panel

J1

1
2

3

4

4 HEADER

VSS

1

C1

2

C2

VOL-

R7 470 ΩΩΩΩΩΩ

VOL+

R8 5.6k

SOURCE

R3 2.2k

CH-

R4 470

CH+

R5 5.6k

ON/OFF

R6 0

VSS

104 VSS

VSS

VSS

104

C7

104

VSS

7

C8

104

VSS

8

C3

104

VSS

3

C4

104

VSS

4

C5

104

VSS

5

C6

104

VSS

6

1

2

12

12

12

12

12

12

12

18250_558_090210.eps

090612

Keyboard control panel

E

Circuit Diagrams and PWB Layouts

EN 83TPM3.1E LA 10.

2009-Jun-26

Layout Key board

18250_559_090210.eps

090410

Circuit Diagrams and PWB Layouts

EN 84TPM3.1E LA 10.

2009-Jun-26