z Transmit frequency band : 880 MHz ~ 915 MHz(For EGSM), 1710 MHz ~ 1785 MHz(For DCS)
1850 MHz ~ 1910 MHz(For PCS)
z Receive frequency band: 925 MHz ~ 960 MHz(For EGSM) , 1805 MHz ~ 1880 MHz(For DCS),
1930 MHz ~ 1990 MHz(For PCS)
z Channel spacing : 200 KHz
z ARFCN(Absolute Radio Frequency Channel Number) : 1~124 and 975~1023 (For EGSM),
512~885 (For DCS), 512~810 (For PCS)
z Transmit·receive frequency spacing: 45 MHz(For EGSM),
z Frequency band and Channel Arrangement
For standard GSM Fl(n)=890+0.2*n 1 ≤n≤ 124 Fu(n)=Fl(n)+45
890 MHz ~915 MHz : Mobile Transmit,Base receive
935 MHz ~960 MHz : Base Transmit, Mobile receive
For Extended GSM Fl(n)=890+0.2*n 1 ≤n≤ 124 Fu(n)=Fl(n)+45
Fl(n)=890+0.2*(n-1024) 975 ≤n≤ 1023
880 MHz ~915 MHz : Mobile Transmit,Base receive
95MHz(For DCS), 80MHz(For PCS)
925 MHz ~960 MHz : Base Transmit, Mobile receive
For DCS Fl(n)=1710.2+0.2*(n-512) 512≤n≤885 Fu(n)=Fl(n)+95
1710 MHz ~ 1785 MHz : Mobile Transmit,Base receive
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1805 MHz ~ 1880 MHz : Base Transmit, Mobile receive
For PCS Fl(n)=1850.2+0.2*(n-512) 512 ≤n≤ 810 Fu(n)=Fl(n)+80
1850 MHz ~1910 MHz : Mobile Transmit,Base receive
1930 MHz ~1990 MHz : Base Transmit, Mobile receive
** Fl(n)= frequency value of the carrier , Fu(n)= corresponding frequency value in upper band
1.3 Item Name and Usage
GB100, GSM digital cell phone, is supercompact, superlight mobile communication terminal for
personal use. It has a 900MHz, 1800MHz and 1900MHz frequency band and adopts GSM and
PCS mode having excellent spectrum efficiency, economy, and portability.
This product is GSM Cellular type portable phone, adopting 1-cell Li-ion battery and power saving
circuit to maximize its operation time. Also, it is equipped with a fixed antenna (snap-in type) and its
color LCD with font built in enables both Chinese and English text service. And power control(basic
feature of GSM), security feature, voice symbol feature, and variable data rate feature are used
appropriately to ensure its best performance. This product consists of a handset, battery pack, and
Travel charger.
1.4 Characteristics
1) All the active devices of GB100 are made of semiconductors to ensure excellent performance
and semi-permanent use.
2) Surface mounting device (SMD) is used to ensure high reliability, compactness and lightness.
3) GB100 adopts the Skyworks’s RF transceiver, which is CMOS RF front-end for multi-band GSM
digital cellular handsets. The Skyworks’s RF transceiver highly-integrated architecture
eliminates the IF SAW filter, low noise amplifiers (LNAs) for three bands, transmit and RF
voltage-controlled oscillator (VCO) modules, and more than 60 other discrete components found
in conventional GSM handsets to deliver smaller, more cost effective GSM solutions that are
easier to design and manufacture.
4) GB100 is designed to perform excellently even in the worst environment
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Section 2. Electrical Specifications
2.1 General E-GSM / PCS Band
Mobile Transmit Frequency
Mobile Receive Frequency
The Number of Time Slot 8
The Number of Channels 174 / 374 / 299
Channel Spacing 200 kHz
Power Supply Rechargeable Li-Ion Battery 3.7V/680mAh
Operating Temperature
For GSM900 small MS :-102dBm Reference Sensitivity
For Adjacent interference
For Adjacent(200KHz) interference
For Adjacent(400KHz) interference
For Adjacent(600KHz) interference
Section 3 Operation
3.1 Name of each part
For DCS1800 / PCS1900 class3 MS : -102dBm
C/Ic
C/Ia1 -9 dB
C/Ia2 -41 dB
C/Ia3 -49 dB
9 dB
Antenna
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Two-mode
Speaker
Display
Screen
Mic
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3.2 Display(Single LCD)
Parameter Projected Actual (MAIN LCD)
Display Color STN LCD with white LED back lighting
65,000 colors
European Character
: (font size : 16×16) 7 lines x 8 characters
Chinese Character
: (font size : 16×16) 7 lines × 8 characters
Driver HCD667A66UBP
Module Dimen. 34.8(W) x 41.61(H) x 4.94(D)
Active Area 28.868(W) x 28.868(H)
Dot pitch 0.07(W) x 0.21(H)
3.3 Keypad
Market Goal Projected Actual Comments
English
Keypad
0-9, *,#
Send (Color)
End/Pwr (Color)
Up (Melody),
Down (Phonebook),
Left (My menu),
Right (SMS)
Center (WAP)
MENU, OK, CLR
* Key: Vib. Mode
# Key: Auto Lock
0/+Key:
International
0-9, *,#
Send (Color)
End/Pwr (Color)
Up (Melody),
Down (Phonebook),
Left (My menu),
Right (SMS)
Center (WAP)
MENU, OK, CLR
* Key: Vib. Mode
# Key: Auto Lock
0/+Key: International
2 Volume Keys
Applying battery voltage and pressing “END” key on the key pad short-circuits “Ground” and “
PowerON”. AD6535(U102) control that power manage regarding power on/off in handset
Pressing POWERKEY on the key pad is active on the handset.
This will turn on all the LDOs, when PowerON is held low. The power of RF Tx power amplifier is
supplied directly by the battery.
4.1.2 Logic part
4.1.2.1 Summary
The logic part consists of AD6525 ARM7 microprocessor-combined DBB(Digital BaseBand)
GSM-ASIC, COMBO(flash ROM & SRAM), AD6535 ABB(Analog BaseBand) Chip. AD6525 is
GSM-ASIC chipset implemented for GSM terminal’s system control and baseband digital signal
processing.
Major parts used in the logic part are as follows:
AD6525 is a GSM core device containing ARM7 CPU core. AD6525 is 160 pin LFBGA (mini-BGA)
package, consisting of terminal chips. The function and characteristics of clock are as follows:
1) Complete single chip GSM Processor
2) Channel codec sub-system
• Channel coder and decoder
• Interleaver and Deinterleaver
• Encryption and Decryption
3) Control Processor Subsystem including
• Parallel and serial Display interface
• Keypad Interface
• SIM Interface
• Control of RADIO subsystem
• Real Time Clock with Alarm
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☞ Configuration by Function of AD6525
1 Microprocessor Core
AD6525 has a built-in ARM7 microprocessor core, including microprocessor interrupt controller,
timer/counter, and DMA controller. And besides, 32bit data path is included, and up to 8Mbyte
addressing is enabled and can be extended up to 16Mbyte. Although external clock should be
provided to operate the microprocessor, this core uses 13MHz VCTCXO to provide clock.
2 Input Clock
1) Main Clock(13 MHz):
This is the clock needed for the microprocessor built in AD6525 to operate.
2) VC-TCXO(13 MHz) , 32.768KHz Clock:
This is the system reference clock to control SLEEP mode.
This is the clock derived from 13MHz VC-TCXO clock, provided by RF part. It is the timing
reference clock for GSM signal processing.
3 DSP Subsystem
This is a GSM signal processing part in GSM mode, consisting of speech transcoding and
Channel equalization as follows:
1) Speech transcoding
In full rate, the DSP receives the speech data stream from VBC and encodes data from 104kbps to
13kbps. Using algorithm is Regular Pulse Excitation with Long Term Prediction (RPE-LTP).
2) Equalization
The Equalizer recovers and demodulates the received signal
The Equalizer establishes local timing and frequency references for mobile terminal as well as
RSSI calculation.
The equlization algorithm is a version of Maximum Likelihood Sequency Estimation(MLSI)
using Viterbi Algorithm.
☞ GSM Core and RF Interface
1) Transmitter:
AD6535 ABB receive data at 270kbps and use an on chip lock-up table to perform GMSK
modulation. A pair of 10bit matched differential DACs convert the modulated data and pass
I and Q analog data to the transmit section of the radio system.
2) Receiver:
The receiver I and Q signals are sampled by a pair of ADCs at 270kbps.
The I and Q samples are transferred to the EGSMP through a dedicated receive path serial port.
4 RF Interface
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This interfaces the RF part to control power amplifier, Tx LO buffer amplifier, VC-TCXO, and
AGC-end on transmit/receive paths in the RF part.
1) Transmitter Interface:
This transmits TX_AGC signal to Tx AGC amplifier to adjust transmit power level and sends
Ramp_DAC signal to the RF part to control power amplifier.
2) Receiver Interface:
This transmits RX_AGC signal to Rx AGC amp. to adjust receive path gain.
5 General Purpose ADC Support
The AD6535 includes a general purpose 10bit auxiliary ADC with four multiplexed input channel
These are used for measurment of battery voltage ID , temperature and accessory ID.
6 USC(Universal System Connector) Interface
A Typical GSM handset requires serial connections to provide data during normal phone operation
manufacturing,testing and debugging.
7 General Purpose Interface
The AD6525 provides 32 interface pin for control of peripheral devices.
All GPIO pins start up as inputs. Additional purpose inputs and outputs are available under SW
control.
8 Speech Transcoding
In full rate mode, the DSP receive the speech data stream from the ABB and encodes data from
104kbps to 13kbps.Using algorithm is Regular Pulse Exitation with Long Term Prediction as
specified GSM Recommandation
9 Power Down Control Section
1) Idle Mode Control:
If IDLE/ signal turns ‘Low’, transmitter section becomes disabled.
2) Sleep Mode Control:
If IDLE/ and SLEEP/ signals turn ‘Low’, all the sections except for VC-TCXO circuit become
disabled.
3) Receiver & Transmitter Mode Control:
If IDLE/ and SLEEP/ signals turn ‘High’, all the sections become enabled to perform
transmit/receive operation.
4.1.3 Memory Part
Memory consists of COMBO (flash ROM & SRAM).
1 Flash ROM
Flash ROM has a capacity of 64Mbit(8MByte). The main programs of the terminal(call processing,
user interface, and diagnostic task) and supplemental programs (NAM program and test program)
are stored in the flash ROM. Even if the program version may be changed in the future, customers
can download the program.
2 Static RAM
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SRAM has a capacity of 16Mbit(2MByte) and stores system parameters, data buffer, and stack of
each task in it.
3 Key Tone Generation
All alert signals are generated by melody IC output.
4.1.4 Notification Part
The notification of incoming call is given by melody, vibrator, and 7color-LED.
1) Melody:
This is a device sounding alert/melody tones.
The melody datas are stored in flash memory (U104) And generated by 6525 DBB internal DSP.
2) Vibrator:
This is a device enabling vibration. The vibrator data is stored in flash memory(U104)
And generated by C5(GPO_23)pin.
3) 7color-LED:
This is a device to indicate a notification mode using the lamp.
U101 Nos. H12, C9 and B8 signal drives the lamp to flash.
4.1.5 Key Pad Part
To enable key operation to input information, the key matrix is configured using strobe signal of
KEYPADROW(0-4) and 5 input ports of KEYPADCOL(0-4). Also, to use the key even at light, the
backlight circuit is provided for LED 6s.
4.1.6 LCD Module(Display Part)
LCD module consists of LCD, controller, LED-Backlight,
LCD: 1S/W Icon x 1 lines[(128x3)x128] can be displayed on the LCD panel. 6 icons could be
provided by S/W. Controller with English font built in has been used.
LED-backlight Using illuminates the LCD panel, and LCD reflector enhances LCD display effect.
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4.2 Radio Transceiver Section
Fig.4-1. RF Transceiver block diagram
Fig.4-2. Top view of RF Transceiver PCB Layout
The RF Transceiver of GB100, which is AERO I , consists of the GSM transimitter, the GSM
Receiver, and the RF synthesizer. The highly integrated solution eliminates the IF SAW filter,
external low noise amplifiers (LNAs) for three bands,
transmit and RF voltage controlled oscillator
(VCO) modules, and more than 60 other discrete components found in conventional designs.
The receive section uses a digital low-IF architecture that avoids the difficulties associated with
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direct conversion while delivering lower solution cost and reduced complexity. The transmit section
is a complete up-conversion path from the baseband subsystem to the power amplifer (U701) and
uses an offset phase locked loop (PLL) with a fully integrated transmit VCO.
The frequency synthesizer includes integrated RF and IF VCO’s, Varactors, and Loop filters. The
unique integer-N PLL architecture produces a transient response that is superior in speed to
fractional architectures without suffering the high phase noise or spurious modulation effects often
associated with those designs.
4.2.1 DC Distribution and Regulation Part
The battery voltage, in return, is applied to the logic part and RF part via LDO(Low Drop-Out) regulator.
As several LDO regulators are used, power can be supplied for each necessary part efficiently.
Audio/Logic parts use +2.8V. SI4205 RF Transceiver(U501) and RF3133 Power Amplifer(U701) also
use +2.8V DC voltage.
4.2.2 Transciever pin description
Fig.4-3. Top View of Si4205
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Table 4-1. Pin Description of Si4205-BM
4.2.3 Receiver Section
4.2.3.1 An Overview of Receive section
Fig.4-6. Receiver block diagram
The GB100 model’s Aero transceiver uses a low-IF receiver architecture that follows for the
on-chip integration of the channel selection filters, eliminating the external RF image reject filters
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and the IF SAW filter required in conventional superheterodyne architectures. Compared to a direct
conversion architecture, the low-IF architecture has a much greater degree of immunity to dc
nd
offsets that can arise from RF local oscillator (RFLO) self-mixing, 2
order distortion of blockers,
and device 1/f noise. This relaxes the common-mode balance requirements on the input SAW filters
and simplifies PC board design and manufacturing.
Three differential-input LNAs are integrated on the Aero I transceiver. The GSM input supports
EGSM 900 (925– 960 MHz) band. The DCS input supports the DCS 1800 (1805 – 1880 MHz).
A quadrature image-reject mixer downconverts the RF signal to a 100 kHz intermediate frequency
(IF) with the RFLO from the Si4133T frequency synthesizer. The RFLO frequency is between
1737.8 and 1989.9 MHz, and is divided by two in the Si4200 for GSM 850 and EGSM 900 modes.
The mixer output is amplified with an analog programmable gain amplifer (PGA), which is controlled
with the AGAIN[2:0] bits in register 05h. The quadrature IF signal is digitized with high resolution
A/D converters (ADCs).
ADC output is downconverted to baseband with a digital 100 kHz quadrature LO signal. Digital
decimation and IIR filters perform channel selection to remove blocking and reference interference
signals. After channel selection, the digital output is scaled with a digital PGA, which is controlled
with the DGAIN[5:0] bits in register 05h.
These analog and digital gain resigters must be set to provide a constant amplitude signal to the
baseband receive inputs.
DACs drive a differential analog signal onto the RXIP,RXIN,RXQP and RXQN pins to interface to
standard analog-input baseband Ics
4.2.3.2 Receiver Part
A. Diplexer: Z702
Diplexer consists of Tx filter, having an antenna port, and dual configuration with the transmitting
path isolated from the receiving path. A signal receives from the antenna of frequency band which
is 942.5±17.5MHz for EGSM bands, 1842.5±37.5 MHz for DCS bands and transmits it to dual saw
filter. The Tx filter passes through the output signals of frequency band that is 897.5MHz ±17.5MHz
for EGSM bands, 1747.5 ±37.5 MHz for DCS bands from the power amplifier and transmits it to the
o
antenna. The maximum insertion loss is about 0.8 dB for the receiving bands at 25
1.35 dB for the transmitting bands at 25
o
C.
B. SAW filter (BPF / Band select filter): U502, U503,U504
The U502 filter is for the EGSM band signals which range 942.5±17.5MHz with low insertion loss.
C and about
And the U503 filter passes the DCS bands that cover 1842.5 ±37.5MHz, the U504 filter passes the
PCS bands that cover 1960±30MHz.
These filters degrade other band signals with high passing loss of 30~60 dB. The EGSM and
DCSand PCS’s maximum insertion loss is 3.5 dB.
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Fig.4-7. Receiver part PCB Layout
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4.2.4 Transmit Section
4.2.4.1 An Overview of Transmit Section
Fig.4-8. Transmitter block diagram
The transmit (TX) section consists of an I/Q baseband upconverter, an offset phase-locked loop
(OPLL) and two 50 ohms output buffers that can drive external power amplifiers (PA), one for the
EGSM 900 (880 – 915 MHz) bands and others for the DCS 1800 (1710 – 1785 MHz) bands and
PCS1900(1850 – 1910MHz). The OPLL requires no external duplexer to attenuate transmitter noise
and spurious signals in the receive band, saving both cost and power. Additionally, the output of the
transmit VCO (TXVCO) is a constant-envelope signal which reduces the problem of spectral
spreading caused by nonlinearity in the PA.
A quadrature mixer upconverts the differential in-phase (TXIP,TXIN) and quadrature(TXQP,TXQN)
signals with the IFLO to generate a SSB IF signal which is fitered and usesd as the reference input
to the OPLL. The Si4133T generates the IFLO frequency between 766 and 896 MHz. The IFLO is
divided by two to generate the quadrature LO signals for the quadrature modulator, resulting in an IF
between 383 and 448 MHz.
The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated
TXVCO. The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its output is
divided by two for the generate the RFLO frequency between 1272 and 1483 MHz. To allow a single
VCO to be used for the RFLO, high-side injection is used for the EGSM 900 bands, and low-side
injection is used for the DCS 1800 and PCS 1900 bands. The I and Q signals are automatically
swapped when switching bands.
Low-pass fitlers before the OPLL phase detector reduce the harmonic content of the quadrature
modulator and feedback mixer outputs. The cutoff frequency of the filters is programmable.
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4.2.4.2 Transmitter Part
A. 6 dB attenuator : Z705, Z706
These passive components are used for PAM to operate in a stable output power.
B. ASM(Antenna Switch Module / built in LPF): Z702
These filters pass through the signals of which frequency band of 880~915MHz,
1710MHz~1785MHz,1930MHz~1990MHz which is the transmit frequency of GSM, DCS, PCS
system terminal, and it suppresses other images and spurious frequencies when the terminal
transmits GMSK modulated frequencies.
C. Power AMP Module(PAM): U701
This device amplifies signals ahead of transmiting them through the antenna to provide a
sufficient RF power. It has amplification factor of 28dB and efficiency of about 55% typically in GSM
band and amplification of 27dB and efficiency of about 52% typically DCS and PCS band,
D. RF Switch connector: J701
RF Swithc connector used to test Mainboard’s RF characteristics.
E. Antenna: Antenna Contact Plate ; J702
This device enables signals to be transmitted and received from BTS by Um interface.
External Antenna can be contacted with Mainboard through Antenna Contact Plate.
Fig.4-9. Transmit part PCB Layout
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4.2.5 Offset PLL
4.2.5.1 An Overview of Synthesizer
Fig.4-10. Si4133T Frequency Synthesizer Block Diagram
The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators, loop
filters, reference and VCO dividers, and phase detectors. The RF PLL uses two multiplexed VCOs.
The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL is
used only during transmit mode. All VCO tuning inductors are also integrated.
The IF and RF output frequencies are set by programming the N-Divider registers, NRF1, NRF2
and NIF. Programming the N-Divider register for either RF1 or RF2 automatically selects the proper
VCO. The output frequency of each PLL is as follows:
fOUT= N×fφ
The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a 13 or 26
MHz reference frequency. For receive mode, the RF1 PLL phase detector update rate (fφ ) should be
programmed fφ = 100 kHz for DCS 1800 and PCS 1900 bands, and fφ = 200 kHz for GSM 850 and
E-GSM 900 bands. For transmit mode, the RF2 and IF PLL phase detector update rates are always f
φ =200 kHz.
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4.2.5.2 VC-TCXO(Voltage Controlled Temperature Compensated Crystal Oscillator): V801
This is the mobile station’s reference frequency source. Its frequency is 13MHz, this signal is
applied to Si4205(U501)_ pin8 and AD6525(U101).
Fig.4-11. Top view of VCTCXO part on the PCB artwork
Fig.4-12. VCTCXO schematic circuit
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Section 5. Alignment Procedure
5.1 Recommended Test Equipment
Model No. Description Maker Remark
8960
8593E Spectrum Analyzer Hewlett Packard
TDS 340A Oscilloscope Tektronix
FLUKE 87 Digital Multimeter Fluke
E3630A DC Power Supply Hewlett Packard
Others Accessory
GSM Mobile Station
Test Set
Agilent Technologies
5.2 Connection of Test Equipment
Interface Connectors
RF Connectors
Fig.5-1. Test Set Configuration
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SECTION 6. Equipment Repair Procedure
6.1 No Power On with battery Applied.
6.1.1 Power CHECK
1. Check battery power : 3.5V~4.2V.
VBATT GND
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2. Check to see if C114.1 or C149.1 or C115.1 pin voltage is same with battery power : CP100
CP100
CP100
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3. Check to see if Q101.5,6 and R135.1 pin is same with battery power : CP101
CP101
CP101
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4. Check to see if U102 and C167, C168, C170, C171, C172, C173, C174 pin is 2.8V_EXT,
Step Test point Typical Value Condition Check point
When Pin#11 is Logic High and Pin#2
Pin#3 is Logic Low the mode is EGSM
band.
While Pin#2 is Logic High and
Pin#11and Pin#3 is Logic Low the
operating mode is DCS band.
While Pin#3 is Logic High and
Pin#11and Pin#2 is Logic Low the
operating mode is PCS band
5-1
5-2
5-3
Z702
Pin#1
Z702
Pin#2
Z702
Pin#3
2.8V 2
2.8V 3
2.8V 4
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STEP 5-3
STEP 5-2
STEP 5-1
Fig. 6-10 Antenna Switch Module Circuit
STEP 5-1
STEP 5-2
Fig. 6-11 Antenna Switch Module PCB Layout
STEP 5 -3
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