Panasonic MN38663S Datasheet

CCD Delay Line Series
MN38663S
NTSC-Compatible CCD Video Signal Delay Element
Overview
The MN38663S is a CCD signal delay element for video
signal processing applications.
It contains such components as a threefold-frequency circuit, a shift register clock driver, charge I/O blocks, two CCD analog shift registers switchable between 680.5 and 605 stages, a clamp bias circuit, resampling output amplifiers, and booster circuits.
When the switch input is "L" level, the MN38663S samples the input using the supplied clock signal with a frequency of three times the NTSC color signal subcarrier frequency (3.579545 MHz) and, after adding in the at­tached filter delay, produces independent delays of 1 H (the horizontal scan period) each for the two lines. When the switch input is "H" level, the MN38663S disables the threefold-frequency circuit and samples the input with the image sensor drive frequency (9.545454 MHz) for the camera's 510 horizontal pixels and, after adding in the attached filter delay, produces independent delays of 1 H (the horizontal scan period) each for the two lines.
Features
Single 4.4 V power supply Choice of camera and VCR modes, so that both the
camera and VCR portions of a video camera with 510 horizontal pixels can use the same MN38663S for sig­nal processing
Pin Assignment
XIC
V
SS3
V
DD3
VINC1
N.C.
VINVC
VGC1 VO1C
V
DD1
V
SS1
1 2 3 4 5 6 7 8 9 10
SOP020-P-0300
( TOP VIEW )
20 19 18 17 16 15 14 13 12 11
XIV
PCOUT
&
VCOIN
–V
BB
V
SS2
V
DD2
VINVY SW VINC2 VGC2 VO2Y
Applications
Video cameras
1
MN38663S CCD Delay Line Series
Block Diagram
DD1VSS1VDD2VSS2VDD3VSS3
V
9
Bias circuit
3
10
16
17
2
Clamp circuit
SW
14
Mode switch
Booster circuit
VGC1
7
VGC2
12
Voltage generator
VINVC
VINC1
VINVY
VINC2
XIV
XIC
6
4
15
13
20
1
L
H
Waveform amplifier adjustment block
L
H
Phase comparator
L
Charge input block
H H
Charge input block
L
L
Charge input block
H H
Charge input block
L
78.5
analog shift register
3-stage
analog shift register
78.5-stage
analog shift register
3-stage
analog shift register
H
L
H
L
H
L
H
602-stage analog shift register
602-stage
analog shift register
Charge
detector
Charge detector
L
-stage
Voltage generator
Resampling output amplifier
Resampling output amplifier
øS driver
8
VO1C
11
VO2Y
H
1/3rd frequency divider
L
Waveform adjustment block
ø1 driver
øR driver
øSH driver
VCO
Timing adjustment
L
H
V
19
SS
ø2 driver
Substrate bias generator
18
BB
–V
PCOUT & VCOIN
2
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