Panasonic CF-2700 Service Manual
ORDER NO. IED84113035C2
Service
MSX
Specifications
Microprocessor
Memory
Video system
Controller
Number of displayable
Number of displayable
Output signals .
Sound system
Controller
Functions .
Keyboard .
Cassette tape interface
System .
Transfer rate .
I/O ports
Slot .
Printer port .
General port .
Sound output ..
Dimensions and Weight (Main unit)
Power requirements
Voltage .
Power consumption
.
.
.
.
characters
dots .
.
Manual
Personal Computer
CF-2700
Z-80A
ROM 32 K bytes (MSX-BASIC)
Main RAM 64K.bytes
Video RAM 16K bytes
TMS 9929A
32 characters
8 (H) x 8 (W) dots/character
40 characters
8 (H) x 6 (W) dots/character
256 (H) x 192 (V) dots
Video output, RF output
AY-3-8910A
8 octave, 3 chord output
73 keys
FSK
1200/2400 baud
2 (comforms to MSX specifications)
1, 14-pin
2, 9-pin each
1
436 (W) x 245 (D) x 90 (H) mm
approx. 3.6 kg
220 V, 50 Hz
(Only for UK 240 V, 50 Hz)
28 W
x 24
x 24
lines
lines
mode
mode
Panasonic
Design and Specifications are subject to change without notice.
Matsushita Electric Trading Co., Ltd.
P.O. Box 288, Central Osaka Japan
CONTENTS
Location of Controls and Components .
Memory Map .
I/O Map .
General for Peripheral
Display Screen, Character Codes .
Self Test .
Block Diagram .
Disassembly
Adjustment .
Connector Pin Connection .
Wiring Connection Diagram .
Schematic Diagram (Main Board) .
Printed Circuit Board (Main Board) .
Schematic Diagram & Printed Circuit Board (Power Source) .
Schematic Diagram (Video Board) .
Printed Circuit Board (Video Board) .
Printed Circuit Board (Keyboard) .
IC Block Diagram .
Parts Location .
Parts Location (Keyboard) .
Packing Instruction
Replacement Parts List .
Instructions
.
Circuit .
.
3
5
5
7
20
21
33
34
39
40
42
43
47
49
50
51
52
53
62
63
64
64
Copyright Matsushita
Co., Ltd. 1984
The EE3 system
compatibility
computers.
Microsoft Corporation.
IMPORTANT (FOR U.K.)
The wires in the mains lead are coloured
in accordance
Blue: Neutral
As the colours of the wires in the mains
lead
correspond
of this
with the coloured markings
with the following
Electric Industrial
realizes
between
Brown: Live
is a trademark
apparatus
software
personal
of
codes:
may not
identifying
proceed as follows:
•The wire which is coloured blue must be
connected
marked with the letter N or coloured
black.
•The wire which is coloured brown. must
be connected
marked with the letter L or coloured
red.
Notes:
•Disconnect
supply socket when not in use.
•Do not remove cover. Live parts inside.
the terminals
to
the terminal
to
the terminal which is
the mains plug from the
in
your plug,
which is
(located on
the left side)
I fctr-i
ON POWER
o
OFF
(T^Function keys
Key used for easy inputs of pre¬
defined character strings.
(2)Power indicator
Lights when the power switch is
turned on and goes out when the
power is turned off.
(3)
S
pecial keys
Keys used to select,
edit input characters,
program execution.
correct,
and control
(14) Sound output jack
and
Audio (sound) signal
Connects
terminal.
(l5) Video output jack
Video signal output jack. Connects
to the TV video input terminal.
(16) RF output jack
RF signal output jack,
the TV antenna terminal.
to
the TV
output
audio
Connects
jack.
input
to
(4)Space bar
Bar used to input a space between
characters.
(3)
Character
Keys used to input characters.
(6)Cursor keys
Keys used to move the cursor.
(7)
(¥) General port 1, General port 2
Connectors
joysticks,
, 9;(10) Slot 1. Slot 2
Slots for MSX cartridges.
(ll)Printer
Connector used to connect a printer,
plotter,
(l2) C
assette Input/Output
Connector used to connect a cassette
tape recorder.
keys
connector
etc.
tablets,
used
to
etc.
Connector
connect
(17) Channel adjust trimmer
After
(18) Power switch
computer, turn on the power switch.
Set the TV to UHF channels
Insert
into the channel adjust trimmer and
adjust for a clear picture.
Power turns on when set to "ON" and
the power indicator
turns off when set to "OFF".
connecting
the adjustment
the
TV and
screwdriver
lights up. Power
35-37.
(13) P
ower cord
-
4 -
Memory Map (when using BASIC)
Address in hexadecimal
0000
ROM
area
8000
User
area
RAM
area
F380
FFFF
I/O Map
Array variable
Character string area
File control block
(User reserve area)
MSX BASIC
ROM
Program area
(text area)
Variable area
Free area
Stack area
Work area
(system area)
area
Area storing the program to which line
numbers have been added.
Area for variables.
variables,
pointer which points to the character
string (string descriptor).
Area for array variables.
variables
this area stores
points to the string in the string area.
This area is allocated
statement is executed and an array with
a subscript
The free area is an unused area. The
size of the free area is the size of
the user area minus the sizes of the
character
area, and program area. The size of
the free area can be obtained by the
FRE function.
Stack area storing the return address
for BASIC when the FOR-NEXT statement
or GOSUB statement is executed.
Area storing the strings contained in
the character
variables.
is as specified
statement.
the CLEAR statement,
bytes is allocated.
Area used during the input and output
of files.
according
the MAXFILES statement.
The high limit address can be set in
the CLEAR statement
so that an area (such as for machine
language subroutines)
up until the work area for free use by
the user.
Work area used by BASIC.
this
are of the character
of 10 or
area, stack area, variable
If no
to
variables
The size of the string area
This area is allocated
the number specified
For character
area stores
If
the pointer
when the DIM
less is used.
and array
in the CLEAR
size is specified in
an
to
area of 200
F380 or below
can be allocated
the array
type,
which
in
the
Port
A
B
C
Bit
0
1
mm
5
6
7
||
5
6
7
ffH
I/O
IB
■
MB
SK
Signal Name
'If
•
KB0, KB1
KB2, KB3
SOUND
Specifies
&H0-&H3FF
Specifies
&H4000-&H7FFF
Specifies
&H8000-&H8FFF
Specifies
&HC000-&HFFFF
Keyboard return signal
Keyboard scan signal
Cassette control (ON when L)
Cassette write signal
CAPS lamp signal (lights when L)
Software controlled
-
5 -
Description
the slot number for addresses
the slot number for addresses
the slot number for addresses
the slot number for addresses
sound output
I/O Address Assignment
I/O address
(hexadecimal)
00
80
■
RS-232C
90
Printer
98
(9929A)
AO
(AY-3-8910A)
A8
(8255)
BO
CO
DO
D8
FF
PSG Bit Assignment
Port
A
B
Note 1: Either port 1 or 2 is selected by the output level of bit 6 at port B.
Note 2: Be sure to output a high level at these pins if portB is to be used for input.
VDP
PSG
PP1
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Writing a "1" to bit 6 at port B
Writing a "0" to bit 6 at port B low level output
R/W
I/O
Input
Output
I/O address
&H98
&H99
&HA0
&HA1
&HA2
&HA8
&HA9
&HAA
&HAB
&H90
&H91
•The I/O address with the
•For details on the VDP, PSG, and PPI, see their respective
•Addresses &H40-&HFF represent the system reserve area.
Bit 6 at Port B
Low level
High level
Low level
High level
Low level
High level
Low level
High level
Low level
High level
Low level
High level
Keymatrix assignment input (low level)
CSAR (Read signal of the cassette tape)
Port 1 pin 6
Port 1 pin 7
Port 2 pin 6
Port 2 pin 7 J
Port 1 pin 8
Port 2 pin 8
Input select of port A
W
Data write to the video
RAM
R
W
R
W
w
R Data read
W Port A data write
R
W Port B data write
R Port B data read
W Port C data write
R Port C data read
W Mode set
W
R
W
■+
■
high level output
-
6 -
Data read from the video
RAM
Command, address set
Status read
Address latch
Data write
Port A data read
Strobe output (bO)
Status input (bl)
Print data
■
mark are provided to optional equipment.
_
►
Contents
Note 2
Connector Pin Number
Port 1 pin 1
Port 2 pin 1
Port 1 pin 2
Port 2 pin 2
Port 1 pin 3
Port 2 pin 3
Port 1 pin 4
Port 2 pin 4
Port 1 pin 6
Port 2 pin 6
Port 1 pin 7
Port 2 pin 7
port 2 selected.
port 1 selected.
Remarks
Latch output
"l” when busy
Latch output
manuals.
General for Peripheral
CPU (Central Processing
Circuit
CPU Peripheral
Clock Generator
Circuit.
Circuit consists of CPU,
Circuit
Circuit
Unit) Peripheral
and Reset
Z80A (pPD780C-l, IC8) is used as CPU. An
interruption
rupt, not non-maskable.
VDP's INT and an external
fed to INT terminal.
is inserted,
cepted asynchronously
system is maskable inter¬
and external
AND signals of
In Ml
interrupt
cycle, 1 WAIT
WAIT is ac¬
with CLOCK signal.
are
BUSRQ and BUSAK are not used, neither
DMA function.
The CLOCK Generator Circuit—Serial
cillation
oscillates
Circuit
10.6781522
of
74HC04 (IC43)--
MHz to generate
VDP CLOCK and, at the same time, gener¬
ates CPU CLOCK in the circuit of 74LS74
(IC42) and 74LS107 (IC47) which divides
VDP CLOCK by 3 to get 3.559384 MHz.
Moreover, CLOCK Generator
Circuit
vides CPU CLOCK into halves to get
1.779462 MHz by 74LS74 (IC39) and gen¬
erates PSG CLOCK.
Os¬
di¬
CPU CLOCK -
3.55938MH!
IIC8.PIN6I
PSG CLOCK
1.77946 MHz
I1C 39. PIN 8: -
Fig. 1 CPU Peripheral
Circuit
Fig. 2 CLOCK Waveform
The Reset Circuit utilizes
CR Circuit (C13 and R26), but it takes
too much time to raise RESET signal by
only the CR. So the circuit is compul¬
sively raised by Q10, when each end of C
becomes about 1.5 V. Therefore,
signal changes "L" into "H" in 60 ms
after power source ON.
A
POWER SOURCE
RESET
I
i i i—i—i—i—i—i—i—i-
0
50
Fig. 3 RESET Signal
IROM
~~|
This system uses 32 K x 8 bits MASK ROM
(IC32, MN23257) which builds in the MSX
BASIC. CS is connected to SLTO, and 0E
to A15. Access time is available
the charge of
RESET
100 (ms)
up to
Main Memory Peripheral
Main Memory Peripheral
Circuit
Circuit consists
of Main Memory and Memory Access Cir¬
cuit.
The Main Memory has a 64 KB memory space
by using eight 16 K x 8-bit DRAMs. Re¬
fresh is performed by RAS-ONLY REFRESH.
Because RAS pre-charge
time in refresh¬
ing Ml cycle is ensured to be 100 ns by
Timing Chart, the access time of RAM
must be 150 ns. In the Memory Access
Circ
uit, RAS is generated by MERQ or
RESH and CLOCK. The switchover of the
row address to the column address
is
done by the multiplexer
is generated
time, with the condenser C35, when the
column address is outputted.
that the CAS will be "L", considering
differences
74LS157, after the switchover of the row
address to the column address.
WE is gen
RAS, CAS, WE and OE protect from the
undershoot by being inserted a resist¬
ance for the damping.
by
of
erated by BWR, and OE by BRD.
74LS157 and CAS
being staggered
the output timing of
C35 ensures
the
I/O Select Peripheral
All of Input/Output
Circuit
with external
equipment are done through I/O ports in
this system, and an access signal of
each port is generated in this circuit.
I/O Select Peripheral
of I/O Select Generator
Access Signal Generator
Short Write Generating Circuit.
Circuit consists
Circuit,
Circuit
Chip
and
Fig. 6 I/O Select Peripheral
-8-
Circuit
I/O Select Generator
I/O Select signal according
map. This signal is generated
high-order
five bits in low-order
Circuit
to
generates
the I/O
through
byte
of Address Bus and through BIORQ and
Multiplexer
ensure data stabilizing
74LS138 (IC25). In order to
time when PSG is
engaged in WRITE, and to be considered
that the output delay time is 350 ns
when PPI is in WRITE, WRITE signal is
raised faster by Short Write Generator
Circuit.
Chip Access Generator
CSW/CSR (VDP Access signals),
PPIRD (PPI Access signals)
(PSG Access_signa
signal and BWR/BRD/SWR.
Circuit ge
ls) from I/O Select
nerates
PP
IWR/
and BCl/BDIR
This system uses TI s TMS9929A as CRTC.
This LSI’s features
. 256 x 192 pixels resolution
are as follows.
. Used 4,8 and 16 KB as VRAM (16 KB is
used in MSX.)
A VDP's operation
registers
in
depends on values of 9
VDP and a table on VRAM.
VDP has three control signals which are
CSW, CSR and MODE. MODE signal distinguishes which should be a candidate
for
Automatic refreshing
Composite video output, in PAL system
Interruptible
Automatic
screen.
processing
in
every frame
Table 1 Screen Mode of VDP.
READ and WRITE, VDP resistor
"L", VRAM is the candidate.
nected to MODE terminal.
ated by Inverted
and CSW is by OR of CSVDP and WR.
NAND of CSVDP and RD,
function of VRAM
of
the sprite
or
VRAM. In
AO is
CSR is
gener-
con-
Fig. 7 VDP Peripheral
Circuit Diagram
-
9 -
PSG (Programmable
Peripheral
Circuit
Sound Generator)
PSG Block consists
Port Circuit.
AY-3-8910A as PSG, which makes it enable
to produce 8 octaves,
noise-sound
a tone generator,
envelope
whose each value decides the frequency
effects.
generator
'-'1
10 A1
10 A2
10 A3
10 A4
10 A5
10 A6
10 A7
10 B0
10 Bl
10 B2
10 B3
10 B4
10 B5
10 B6
10 B7
of
This system uses GI's
a
PSG and General
triple
This LSI builds in
noise generator,
and 16 registers
I/O
Input
Output
chords and
Table 2 Bit-Assignment
PORT 1-1
PORT 1-2
PORT 1-3
PORT 1-4
PORT 1-6
PORT 1-7
Read signal input from a cassette
P0RT2
PORT2
Input specifying
P0RT1
PORT1
P0RT2
P0RT1
Selecting
an
and the volume of the sound by software.
This LSI has also two I/O ports which
are available
General Port, Keyboard Control and input
to a cassette
occasion,
assigned as the following
Function
PORT 2-1
PORT 2-2
PORT 2-3
PORT 2-4
PORT 2-6
PORT 2-7
input of PORT A "L"=P0RT 1 "H"=P0RT 2
the layout of Keyboard
in
PSG Port
for Input/Output
tape recorder.
each bit in port A/B is
tape recorder
with
this
In
table.
PSG has three control
and BC2—, whose control
BC1
BDIR
0
0
1
1
0
1
0
1
lines—BDIR,
BC2
Table 3 PSG Control Signal
signals
1
1
1
1
BC1
in
-10-
Input/Output
table.
Not Selected
Readout from PSG
Writing in PSG
Address latch
are shown as the following
State
In General Port Circuit,
general ports (Input 4-bit, Output 1-bit
and I/O 2-bit) using multiplexer
there are two
74LS157
(IC28,
74LS09 (IC37, 40).
33) and open collector
gate
Fig. 8 PSG Peripheral
CF-2700 uses AY-3-8910A
access time is 200ns and minimum width
of write data pulse is 165ns.
PPI (Programmable
Peripheral
PPI Block
yPD8255AC-5),
and Slot
CF-2700 adopts
output,
is utilized
Port
A
B
C Output
Circuit
consists
Keyboard
Signal
and port B for input).
I/O
MODE 0 (ports
for specifying
Bit
0^7
0*7
0^3 Keyboard Scan Signal
4
5
6
o
whose maximum
Peripheral
of
Generator
Specifying
Keyboard Return Signal
Controlling
Signal writing
Controlling
Output of Click Sound
PPI (using
Control
the slot num¬
Table 4 Port function
Interface)
Circuit
Circuit.
A,C for
This LSI
the Slot Number
the motor of a cassette
Keyboard CAPS Lamp 0=LIGHTING
in a
Circuit
ber, controlling
a cassette
and output of click sound. Bits of three
ports
table.
Function
cassette
tape recorder
in
are assigned
PPI
Keyboard,
tape recorder
tape recorder
as
for output to
and its control
the following
0=ON 1=0FF
-11-
Slot signal is generated
which is set up in Port A by data selec¬
tor 74LS153 (IC10) and decoder
(IC23).
from a signal
74LS139
Fig. 9 PPI Peripheral
Port A is used for specifying
number of address
KB. Port A is preset for this operation
as the following
Bit of
Port A
PAl PAO
PA3 PA2
PA5 PA4
PA7 PA6
Table 5 Meaning of each bit in Port A
Keyboard Scan signals
C are decoded by 74LS145 (IC46) and in¬
putted to Port B through Keyboard.
Slot Number of Page 0
Slot Number of Page 1
Slot Number of Page 2
Slot Number of Page 3
IC10
LS153
DATA
SELECTOR
Circuit
bank in units of 16
table.
Contents
(0-3 bits) of Port
DECOCER AND GATES
1C 23
LS139
the slot
1C
22
LS08
[Cartridge
Signals
described
in the table 7.
Data bus is connected
(IC5). When I/O or Slot 0 is selected,
the mainframe
and the bus is controlled
mainframe
operations.
connected
in
the table 6 and explained
in READ and
Fig. 11 Data Bus/Buffer
CS1, CS2 and CS12 are generated
from A15 and A14 by decoder
74LS139.(IC23).
~|
to
Cartridge
via Buffer 74LS245
and the slot are separated
IC23
LS139
DECODER AND GATES
to go to
LS245
DATA BUS
BUFFER
1C 22
LS08
Slot are
INTERRUPT
Circuit
the
Fig 10 Slot Signal Generator
Circuit
Fig. 12 Chip Select Generator
Circuit
Pin
Number
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
Name
I/O
Note 1
CSI
C$T2
RESERVED
WAIT
HI
IORQ
WR
RESET
A9
All
A7
A12
A14
Al
A3
A5
D1
D3
D5
D7
GND
GND
+5 V
+5 V
SUNDIN
0
0
I/O
I/O
I/O
I/O
I
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
I
Pin
Number
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
CS2
SLTSL
RFSH
INT
BUSDIR
MERQ
RD
RESERVED
A15
A10
A6
A8
A13
AO
A2
A4
DO
D2
D4
D6
CLOCK
SW1
SW2
+12 V
-12 V
Name
I/O
Note 1
0
0
0
I
I
0
0
I/O
I/O
I/O
I/O
0
0
0
0
0
0
0
0
0
_
_
_
a) Note 1:The distinction
b) Reserved terminals
Table
of
Input/Output
are forbidden
6
using.
Connected
Cartridge
-13-
is
based on the mainframe.
Signal
Bus
Lines
of
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17^32
33^40
41
42
43
44,46
45,47
48
49
50
Name
CS1
CS2
CS12
SLTSL
RESERVED For Future use
RFSH
WAIT
INT
Ml
BUSDIR
IORQ
MERQ
WR
RD
RESET
RESERVED
A0^A15
D(h»D7
CLOCK
SW1, SW2
+5 V
+12 V
SUNDIN
-12 V
GND
GND
Contents
ROM 4000...7FFF Address Select Signal
ROM 8000...BFFF Address Select Signal
ROM 4000...BFFF Address Select Signal (256 K for ROM)
Slot Select Signal adds Select Signal peculiar to
each slot
Refresh Cycle Signal
WAIT Request Signal to CPU
INTERRUPT Request Signal to CPU
CPU Fetch Cycle Signal
Control Signal for direction
of
external Data Bus
Select a cartridge and outputs L level from each cartridge
except Memory at the same time when the data are outputted.
I/O Request Signal
Memory Request Signal
Write Timing Signal
Read Timing Signal
System Reset Signal
For furture use
Address Bus Signal
Data Bus Signal
Ground
CPU Clock 3.559 MHz
Ground
For protect in Connect/Disconnet
Powr Source +5 V
Power Source +12 V
Sound Input Signal (-5 dbm)
Power Source -12 V
Table 7 Explanation
-14-
of
Signal Lines
MSX uses FSK method for recording,
transfer
rate supports
1200 baud and
whose
2400 baud and the transfer
shown in the table 8.
waveform is
Table 8 Data Waveform
Therefore,
1200 Hz-4800 Hz transfer.
(i) Input Circuit
Interface
Circuit must ensure
IC41
UPC311C
COMPARATOR
Fig. 13 Cassette
Input terminal
0
resistance
adjusting
istic on the cassette.
is
terminated
whose value is set for
to
the amplifier’s
This circuit
by
character¬
the 150
has
the gain by using OP-Amp. and also the
characteristic
form characteristic
follows.
This circuit
parator
to
4800 Hz waveform.
supplied
about 2.5 V by resistance-division.
voltage
is
the © terminal.
circuit
istic and increase
as
the filter,
at
uses a high-speed
ensure the reproducing
to
The standard
the comparator
used in the bias voltage
R54 and R55 let the
have the hysteresis
the noise margin.
the wave¬
this time is as
com¬
of
voltage
is
set to
This
at
character¬
C44 o.oo22p
Input Circuit
Cassette I/O Port
5 CMTIN
Fig. 14 Waveform Characteristic
sette Input Circuit
in
Cas¬
-15-
PSG Output
This circuit
reference
constant-voltage
ances R5, VR1 and R80, that is,
enables to vary an output voltage by
adjusting
dividing
The detection
reference
made in a differential
circuit
This control
following.
produces
a
ratio).
of
voltage
by
output with resist¬
value of VR1 (voltage-
of
and output
errors between the
transistors
method
a
required
dividing
voltages
amplification
Q8
is as
and Q2.
+12 V
is
the
Sound Input Signal
Power Supply Circuit
This circuit
to supply four kinds power of +5 V, -5V,
+12 V and -12 V.
In a primary circuit,
filter
that is to prevent
external
ation outward.
In a voltage-regulator
ondary circuit,
discrete
circuits
constant-voltage
(1) Operation
Circuit
A voltage
wave by diodes (D7, D8) and flat¬
tened by electrolytic
is applied into a emitter
tor Ql). The base current
transistor
sistor
output voltage is achieved
the base current
Ql that is to change Vce of Ql.
using the DROPPER system is
composed of condensers
noises and reduce useless radi¬
elements
are
of +5 V
that is rectified
Ql is
Q7. The stabilization
a
+5 V
circuit
and +12 V, -5 V, -12 V
composed
regulator
governed by a tran¬
of
there is a line
malfunction
circuit
Voltage-Regulator
and coils
of a
consists
of general
ICs.
capacitor
(transis¬
by
the transistor
in
of
of
due to
varing
sec¬
full
(C7)
the
the
of
+5 V output voltage ascends.
4
-
Base current
®
creases.
Current flowing into the resistance
@
decreases.
Base current
©
18
creases.
(3;Base current
creases.
(Dvce of the transistor
(7)Output
When the output voltage
contrary
happens—the
decreases
increases.
(2) Operation
voltage descends.
phenomena
and the
Circuit
A voltage
wave by diodes (D3, D5) and flat¬
tened by an electrolytic
CIO is inputted
minal of a regulator
IC1, which is for the constantvoltage
stabilized
terminal.
control
signal,
details
the output with an external
but we will describe
later.
of
the transistor
•4
*
of
the transistor
*
of
the transistor
*
Ql
Vce of the transistor
of
+12 V Voltage-Regulator
that is rectified
into an input ter¬
power
+12 V into an output
Moreover,
supply,
increase.
descends,
to the
output
IC
(IC1). This
this IC can
Q8
Q7
Ql
voltage
in
capacitor
outputs
it in
above
Ql
full
de¬
R1
de¬
de¬
the
07
2SC1318-Q 2SA1061P 2SA722-S
Main Board
01
02,8
(3) Operation
Circuit
A voltage
wave by diodes
tened by an electrolytic
C6 is inputted
minal of a regulator
of
-12 V Voltage-Regulator
that is rectified
(D4, D6) and flat¬
into an input ter¬
IC
(IC2). This
IC2, which is for the constant-
voltage
power,
outputs
stabilized
-12 V into an output terminal.
(4) Control
External
The PSW terminal
of
Signal
Output
Voltage
can control
output of +5 V and +12 V. When the
PSW terminal
each voltage
is
is
connected
outputted
with GND,
normally,
and when it is open each voltage
becomes about 0 V. (-12 V and -5 V
are left as it is.)
This control
is
made by transistor
Q9 and IC1. Pin No. 4 in IC1 is a
terminal
of
which output
becomes about 0 V when current
than about 500 yA flows.
trolled
enables
voltage.
this pin externally,
to
control
The +5 V output is to be 0
If
+12 V output
V with +12 V being 0 V, because its
reference
ing +12 V, as described
voltage
is
made by divid¬
in
in
capacitor
voltage
(1).
it
full
with
more
con¬
the
The output voltage
No. 4 in IC1 is as the following.
(1) PSW
^
(2) Transistor
terminal
is
ir
Q9 is
control
connected
cut off.
by
with GND.
the Pin
@ Current of Pin No. 4 in IC1 is near
about 0 V.
(4)Output
SW terminal
voltage of IC1 is +12 V.
in
open:
(1) PSW
(2) T
(3) C
(4) Output voltage
R38 and C38 compose of a time constant
circuit
V. R37 is a resistance
discharge
terminal
ransistor
is
Q9 is
opened.
on.
urrent of Pin No. 4 in ICl flows.
of
ICl is about 0 V.
that delays rising +5 V and +12
of
C38.
for an electric
19
Display Screen
Note the following
see screen._
•Depending
and right edges may not be displayed
on the TV screen.
because the display area of the TV and
that of the personal
ferent.
use the shaded part shown in the il¬
lustration.
displayed
command to 28-29 (see the "MSX-BASIC
manual").
when the power is turned on.) In the
graphic
dots on the left and right sides when
writing a program.
on
If
mode, do not use the 10-16
points for an easy to
the type of TV, the left
This may result
this is the case, do not
In
columns
(It is preset to 37 columns
computer are dif¬
the text mode, set the
using
the WIDTH
/
p
m
1
1
p
I
1
■
9
1 l
•
1
ft
♦
»
This part is cut off.
i—,—i
>=>
9
D
p
40-column text mode
8 dots
»ft
r
P#l
ft-
4
- -ft
4
=
s
■f-
•
•
*i!
,
_
| |
32-column text mode
• Do not adjust the screen any brighter
than necessary.
• Exercise
programming.
read due to blurred
on the combination
color (color of characters,
the background
(Color 15, 5) is a relatively
distinguish
A is set when the power is turned on.)
• The color and volume settings
TV for personal
slightly
broadcast
ly when switching
to the personal
Note 1: Character
*
as 8H x 6W dots/character
AO-column
(SCREEN 0). (8H x 8W dots/cha¬
racter
display mode.) For this reason,
the right side of some graphic
symbols may be cut off when dis¬
played. (Letters
always displayed
ters. )
care in combining colors when
The screen may be hard to
of
color.
combination.
in
from a TV broadcast
computer.
patterns
text
the 32-column
different
reception.
colors depending
the foreground
computer
from that for TV
Adjust according¬
as
etc.) and
White on blue
and numbers are
easy to
(Color 25, A,
on
use are
are displayed
in
display
full charac¬
mode
text
the
the
Character
Reference:
Decimal
Hexadecimal
Codes
High-order 4
bits
Correspondence
mal and hexadecimal
0—9 10 11 12 13
0-9 A B
(hexadecimal)_
D ' E
°
1
between
14
15 16 17 18 31 32 33
L
numbers.
10 11 , IF
Graphic characters
4
0
,B5
1 ©
2
ft
3
f
4
♦
IT
*
6 ♦
7 • —
8
9
A
B
O’
C
9
x
D
J*
E
F
ft
deci¬
20
21
Examples:
5
Input and output of Graphic Symbols
- -
1
-
-
Graphic symbols are input and output by
-
adding a graphic header (&H01).
r
-
For example,
the graphic header is used as follows.
Input from the keyboard:
r
and &HAA, are input.
L
Output to the TV or printer:
T
&H01 and &HAA, are output.
Example: To output to a TV:
/
\
+-
64
63
255
3F 40 FF
-20-
The character
&HAl=16xA+l=65
to
PRINT CHR$(1);CHR$ (&HAA);
In other words, X2XJ (hexadecimal)
Examples:
&HlF=lxl6+15=31
&HFF=15x16+15=255
code for A is
input and output
Two bytes, &H01
s^xlb+Xj
(Decimal)
(decimal).
Two bytes,
(decimal)
(decimal)
"EH"
Self Test
|l. Outline of Self Test|
This Self Test Program is prepared
the purpose
tions of Personal
program is to start at the 8000H address
and materials
through the slot.
|2. Self Test Program]
This program is made up of two main
CHECK parts.
1) The first CHECK part — for basic checks.
(1) Check the diagnostic
(2) VDP/VRAM basic check
(3) Printer
(4) RAM check
connected
address.
func¬
flag is
of
testing
in 16 KB
Make sure that this program is
started
Check if the interrupt
correctly
CPU - VPD), and the Read/Write
VRAM (CPU - VDP - VRAM) is done
correctly.
Check if the printer
properly
checked results.
Check if data
written
correctly.
basic check
in a
ROM is supplied
are correctly
specified
hardware
is
program
Computer CF-2700. This
set or reset (between
and can print
for
on.
of
out
(5) PSG check
2) The second CHECK part — for checks
Check if the Read/Write
register
input/output
PSG) are made correctly.
(6) Key input check
Check if the key input works correctly.
including
(7) ROM check
Check if the interpreter
correctly.
(8) Screen display check
Check if the screen displays correctly.
(9) Cassette
Check if signals
outputted
(10) Joystick
Check if the joystick
signals correctly
(11) Print out check
Check if the printer
correct print out data.
(12) Audio output check
Check if the audio sound is
outputted
(CPU - PSG) and the data
of
external
peripheral
I/O check
correctly.
input check
properly.
of
PSG
I/O port (PSG -
by
are inputted/
operating
is
equipment.
operates
sends its
sent the
it.
|3. Self Test Procedure 1
1) Equipment required
(1) Test Personal
Model No. : CF-2700.
(2) Printer
(designed
(3) Joystick
Model No.: CF-2201.
(1) Connection
above.
(2) Feed the paper into the printer.
C3) Use a printer
printers
whichever
specifications.
not designed
the MSX characters
or
Plotter
for MSX).
should be made as shown
and plotters
conform to the Centronics
Computer,
designed
for MSX can not print
However,
and symbols.
for MSX. Any
1
unit
1
unit
1
unit
can be
printers
(4) TV.
-21
(5) Test Cartridge
Part No.: DFWV95C0001.
(6) Cassette
(7) Cassette
(4) Insert the Test ROM cartridge
a label side to you) into the slot.
(5) Keep the cassette
from the TV (at least 30 cm).
Since regular
ders are for audio use, some are not
suitable
different
Tape Recorder.
Tape.
tape recorder
cassette
for the Self Test due to
audio characteristics.
tape recor¬
1
1
1
1
(facing
away
unit
pc.
unit
pc.
VDP
Printer]
CPU
on
line
check
BUS
IBasic
VRAM,
terminals
printer
circuit,
and
Printer
cables,
-22
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