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SN74LS365A SN74LS367A
SN74LS368A
3-State Hex Buffers
These devices are high speed hex buffers with 3-state outputs. They
are organized as single 6-bit or 2-bit/4-bit, with inverting or
non-inverting data (D) paths. The outputs are designed to drive 15
TTL Unit Loads or 60 Low Power Schottky loads when the Enable (E)
is LOW.
When the Output Enable (E) is HIGH, the outputs are forced to a
high impedance “off” state. If the outputs of the 3-state devices are tied
together, all but one device must be in the high impedance state to
avoid high currents that would exceed the maximum ratings.
Designers should ensure that Output Enable signals to 3-state devices
whose outputs are tied together are designed so there is no overlap.
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
T
I
OH
I
OL
Supply Voltage 4.75 5.0 5.25 V
Operating Ambient
A
T emperature Range
Output Current – High –2.6 mA
Output Current – Low 24 mA
0 25 70 °C
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LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device Package Shipping
SN74LS365AN 16 Pin DIP 2000 Units/Box
SN74LS365AD 16 Pin
SN74LS367AN 16 Pin DIP 2000 Units/Box
SN74LS367AD 16 Pin
SN74LS368AN 16 Pin DIP 2000 Units/Box
SN74LS368AD 16 Pin
2500/Tape & Reel
2500/Tape & Reel
2500/Tape & Reel
Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1 Publication Order Number:
SN74LS365A/D
SN74LS365A SN74LS367A SN74LS368A
SN74LS365A
HEX 3-STATE BUFFER WITH
COMMON 2-INPUT NOR ENABLE
E
V
CC
2
16 15
14 13 12 11 10 9
123456
E
1
SN74LS367A
HEX 3-STATE BUFFER
SEPARATE 2-BIT AND 4-BIT SECTIONS
V
E
CC
16 15
14 13 12 11 10 9
TRUTH TABLE
INPUTS
E1E2D
L
L
L
H
X
L
L
H
X
X
H
X
8
7
GND
OUTPUT
L
H
(Z)
(Z)
SN74LS368A
HEX 3-STATE INVERTER BUFFER
SEPARATE 2-BIT AND 4-BIT SECTIONS
V
E
CC
16 15
14 13 12 11 10 9
123456
E
TRUTH TABLE
INPUTS
E D
L
L
H
L
H
X
OUTPUT
L
H
(Z)
8
7
GND
123456
E
8
7
GND
TRUTH TABLE
INPUTS
E D
L
L
H
L
H
X
OUTPUT
H
L
(Z)
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2
SN74LS365A SN74LS367A SN74LS368A
VOLOutput LOW Voltage
V
V
V
IIHInput HIGH Current
CC
CC
L
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter
V
IH
V
IL
V
IK
V
OH
Input HIGH Voltage 2.0 V
Input LOW Voltage
Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
Output HIGH Voltage 2.4 3.1 V VCC = MIN, IOH = MAX, VIN = V
p
I
OZH
I
OZL
Output Off Current HIGH 20 µA VCC = MAX, V
Output Off Current LOW –20 µA VCC = MAX, V
p
Input LOW Current
E
Inputs
I
IL
I
OS
D Inputs –20 µA
Short Circuit Current (Note 1) –40 –225 mA VCC = MAX
Power Supply Current
I
CC
LS365A, 367A
LS368A 21
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Min Typ Max
0.8
0.25 0.4 V IOL = 12 mA
0.35 0.5 V IOL = 24 mA
20 µA VCC = MAX, VIN = 2.7 V
0.1 mA VCC = MAX, VIN = 7.0 V
–0.4 mA VCC = MAX, VIN = 0.4 V
–0.4 mA
24
Unit Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
V
All Inputs
or VIL per Truth Table
OUT
OUT
VCC = MAX, VIN = 0.5 V
Either E
Input at 2.0 V
VCC = MAX, VIN = 0.4 V
Both E
Inputs at 0.4 V
mA VCC = MAX
VCC = VCC MIN,
=
or
IN
IL
per Truth Table
= 2.7 V
= 0.4 V
IH
IH
AC CHARACTERISTICS (T
Symbol Parameter
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
Output Enable Time
Output Disable Time
= 25°C, VCC = 5.0 V)
A
Limits
LS365A/LS367A LS366A/LS368A
Min Typ Max Min Typ Max
10
9.01622
192435
40
30
35
7.01215
18
182835
45
32
35
Unit Test Conditions
ns
CL = 45 pF,
RL = 667 Ω
ns
ns CL = 5.0 pF
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3
SN74LS365A SN74LS367A SN74LS368A
P ACKAGE DIMENSIONS
–A–
916
B
18
F
H
G
D
16 PL
0.25 (0.010) T
C
S
SEATING
–T–
PLANE
K
M
A
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
L
J
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
M
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01
MILLIMETERSINCHES
____
–A–
16 9
18
PLASTIC SOIC PACKAGE
–B–
8 PLP
G
K
C
–T–
SEATING
PLANE
D
16 PL
0.25 (0.010) A
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability ,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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M
S
B
T
S
D SUFFIX
CASE 751B–05
ISSUE J
0.25 (0.010) B
M
R
M
X 45
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
S
_
F
J
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
____
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
INCHESMILLIMETERS
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SN74LS365A/D
4
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