ON Semiconductor NSBC114EDXV6T1, NSBC114EDXV6T5 Service Manual

NSBC114EDXV6T1,

l

l

l

l

s

NSBC114EDXV6T5

Preferred Devices

Dual Bias Resistor
Transistors

NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network

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The BR T (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the NSBC114EDXV6T1
series, two BRT devices are housed in the SOT−563 package which is
ideal for low power surface mount applications where board space is at
a premium.

Features

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• Lead−Free Solder Plating

• These are Pb−Free Devices

MAXIMUM RATINGS

(TA = 25°C unless otherwise noted, common for Q1 and Q2)

Rating Symbol Value Unit

Collector-Base Voltage V
Collector-Emitter Voltage V
Collector Current I

THERMAL CHARACTERISTICS

Characteristic

(One Junction Heated)

Total Device Dissipation; TA = 25°C
Derate above 25°C

Thermal Resistance, Junction-to-Ambient

Characteristic

(Both Junctions Heated)

Total Device Dissipation; TA = 25°C
Derate above 25°C

Thermal Resistance, Junction-to-Ambient
Junction and Storage Temperature

Range

1. FR−4 @ Minimum Pad

CBO
CEO

C

Symbol Max Unit

P

D

R

q

JA

Symbol Max Unit

P

D

R

q

JA

TJ, T

stg

50 Vdc
50 Vdc

100 mAdc

357 (Note 1)

2.9 (Note 1)mWmW/°C

350 (Note 1) °C/W

500 (Note 1)

4.0 (Note 1)mWmW/°C

250 (Note 1) °C/W

−55 to +150 °C

(1)(2)(3)

R

Q

1

R

2

(4) (5) (6)

NSBC114EDXV6T1

R

1

2

Q

2

R

1

MARKING
DIAGRAM

SOT−563

CASE 463A

1

xx = Device Code (Refer to Page 2)
M = Date Code
G = Pb−Free Package

PLASTIC

xx M G

1

ORDERING INFORMATION

Device Package Shipping

NSBC1xxxDXV6T1 SOT−563* 4000/Tape & Ree
NSBC1xxxDXV6T1G SOT−563* 4000/Tape & Ree
NSBC1xxxDXV6T5 SOT−563* 8000/Tape & Ree
NSBC1xxxDXV6T5G SOT−563* 8000/Tape & Ree
†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

*This package is inherently Pb−Free.

†

DEVICE MARKING INFORMATION

See specific marking information in the device marking table
on page 2 of this data sheet.

© Semiconductor Components Industries, LLC, 2006

May, 2006 − Rev. 6

Preferred devices are recommended choices for future use

and best overall value.

1 Publication Order Number:

NSBC114EDXV6/D

NSBC114EDXV6T1, NSBC114EDXV6T5

DEVICE MARKING, ORDERING, AND RESISTOR VALUES

Device† Package* Marking

NSBC114EDXV6T1 SOT−563 7A 10 10
NSBC124EDXV6T1 SOT−563 7B 22 22
NSBC144EDXV6T1 SOT−563 7C 47 47
NSBC114YDXV6T1 SOT−563 7D 10 47
NSBC114TDXV6T1 (Note 2) SOT−563 7E 10 ∞
NSBC143TDXV6T1 (Notes 2) SOT−563 7F 4.7 ∞
NSBC113EDXV6T1 (Note 2) SOT−563 7G 1.0 1.0
NSBC123EDXV6T1 (Notes 2) SOT−563 7H 2.2 2.2
NSBC143EDXV6T1 (Notes 2) SOT−563 7J 4.7 4.7
NSBC143ZDXV6T1 (Notes 2) SOT−563 7K 4.7 47
NSBC124XDXV6T1 (Notes 2) SOT−563 7L 22 47
NSBC123JDXV6T1 (Note 2) SOT−563 7M 2.2 47
NSBC115EDXV6T1 (Notes 2) SOT−563 7N 100 100
NSBC144WDXV6T1 (Notes 2) SOT−563 7P 47 22

†The “G’’ suffix indicates Pb−Free package available.
*This package is inherently Pb−Free.

2. New resistor combinations. Updated curves to follow in subsequent data sheets.

R1 (kW) R2 (kW)

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted, common for Q1 and Q2)

A

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Collector-Base Cutoff Current (VCB = 50 V, IE = 0) I
Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) I
Emitter-Base Cutoff Current NSBC114EDXV6T1

(VEB = 6.0 V, IC = 0) NSBC124EDXV6T1

NSBC144EDXV6T1
NSBC114YDXV6T1

NSBC114TDXV6T1
NSBC143TDXV6T1
NSBC113EDXV6T1
NSBC123EDXV6T1
NSBC143EDXV6T1
NSBC143ZDXV6T1
NSBC124XDXV6T1

NSBC123JDXV6T1
NSBC115EDXV6T1

NSBC144WDXV6T1
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0)
Collector-Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, IB = 0) V

3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%

CBO
CEO

I

EBO

V

(BR)CBO
(BR)CEO

− − 100 nAdc

− − 500 nAdc

−

−

0.5

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

mAdc

0.2

0.1

0.2

0.9

1.9

4.3

2.3

1.5

0.18

0.13

0.2

0.05

0.13
50 − − Vdc
50 − − Vdc

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2

NSBC114EDXV6T1, NSBC114EDXV6T5

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted, common for Q1 and Q2) (Continued)

A

Characteristic

ON CHARACTERISTICS (Note 4)

DC Current Gain NSBC114EDXV6T1
(V

= 10 V, IC = 5.0 mA) NSBC124EDXV6T1

CE

NSBC144EDXV6T1
NSBC114YDXV6T1

NSBC114TDXV6T1
NSBC143TDXV6T1
NSBC113EDXV6T1
NSBC123EDXV6T1
NSBC143EDXV6T1
NSBC143ZDXV6T1
NSBC124XDXV6T1

NSBC123JDXV6T1
NSBC115EDXV6T1

NSBC144WDXV6T1

Collector-Emitter Saturation Voltage
(IC = 10 mA, IB = 0.3 mA)
(IC = 10 mA, IB = 5 mA) NSBC113EDXV6T1/NSBC123EDXV6T1
(IC = 10 mA, IB = 1 mA) NSBC114TDXV6T1/NSBC143TDXV6T1

NSBC143EDXV6T1/NSBC143ZDXV6T1/NSBC124XDXV6T1

Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) NSBC114EDXV6T1

NSBC124EDXV6T1
NSBC114YDXV6T1

NSBC114TDXV6T1
NSBC143TDXV6T1
NSBC113EDXV6T1
NSBC123EDXV6T1
NSBC143EDXV6T1
NSBC143ZDXV6T1
NSBC124XDXV6T1

NSBC123JDXV6T1

(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW) NSBC144EDXV6T1
(VCC = 5.0 V, VB = 5.5 V, RL = 1.0 kW) NSBC115EDXV6T1
(VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kW) NSBC144WDXV6T1

Output Voltage (off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
(VCC = 5.0 V, VB = 0.050 V, RL = 1.0 kW) NSBC113EDXV6T1
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) NSBC114TDXV6T1

NSBC143TDXV6T1
NSBC143ZDXV6T1

Input Resistor NSBC114EDXV6T1

NSBC124EDXV6T1
NSBC144EDXV6T1
NSBC114YDXV6T1

NSBC114TDXV6T1
NSBC143TDXV6T1
NSBC113EDXV6T1
NSBC123EDXV6T1
NSBC143EDXV6T1
NSBC143ZDXV6T1
NSBC124XDXV6T1

NSBC123JDXV6T1
NSBC115EDXV6T1

NSBC144WDXV6T1

Resistor Ratio NSBC114EDXV6T1/NSBC124EDXV6T1/

NSBC144EDXV6T1/NSBC115EDXV6T1

NSBC114YDXV6T1

NSBC114TDXV6T1/NSBC143TDXV6T1

NSBC113EDXV6T1/NSBC123EDXV6T1/NSBC143EDXV6T1

NSBC143ZDXV6T1
NSBC124XDXV6T1

NSBC123JDXV6T1

NSBC144WDXV6T1

4. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%

Symbol Min Typ Max Unit

h

FE

V

CE(sat)

V

OL

V

OH

R1 7.0

35
60
80

80
160
160

3.0

8.0
15
80
80
80
80
80

60
100
140
140
350
350

5.0
15
30

200
150
140
150
140

−

−

−

−

−

−

−

−

−

−

−

−

−

−

− − 0.25 Vdc

Vdc

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

−

0.2

4.9 − − Vdc

10

15.4

32.9

7.0

7.0

3.3

0.7

1.5

3.3

3.3

15.4

1.54
70

32.9

22
47
10
10

4.7

1.0

2.2

4.7

4.7
22

2.2

100

47

13

28.6

61.1
13
13

6.1

1.3

2.9

6.1

6.1

28.6

2.86

130

61.1

k W

R1/R2

0.8

1.0

1.0

0.1

2.1

1.2

0.25

−

−

1.2

0.185

0.56

0.056

2.6

0.17

−

0.8

0.055

0.38

0.038

1.7

0.21

0.47

0.047

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3

NSBC114EDXV6T1, NSBC114EDXV6T5

300

250

200

150

100

, POWER DISSIPATION (mW)

50

D

P

0

−50 0 50 100 150

R

= 833°C/W

q

JA

TA, AMBIENT TEMPERATURE (°C)

Figure 1. Derating Curve

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4

NSBC114EDXV6T1, NSBC114EDXV6T5

)

TYPICAL ELECTRICAL CHARACTERISTICS — NSBC114EDXV6T1

1

IC/IB = 10

0.1

0.01

, MAXIMUM COLLECTOR VOLTAGE (VOLTS

0.001

CE(sat)

020 4050

V

IC, COLLECTOR CURRENT (mA)

Figure 2. V

4

3

2

, CAPACITANCE (pF)

ob

1

C

0

010203040

VR, REVERSE BIAS VOLTAGE (VOLTS)

CE(sat)

TA=−25°C

versus I

25°C

75°C

C

f = 1 MHz
IE = 0 V
TA = 25°C

50

1000

100

, DC CURRENT GAIN (NORMALIZED)

FE

h

10

1 10 100

IC, COLLECTOR CURRENT (mA)

Figure 3. DC Current Gain

100

75°C

10

1

0.1

0.01

, COLLECTOR CURRENT (mA)

C

I

0.001
01 234

25°C

TA=−25°C

56 78 910

Vin, INPUT VOLTAGE (VOLTS)

VCE = 10 V

TA=75°C

25°C

−25°C

VO = 5 V

Figure 4. Output Capacitance

10

VO = 0.2 V

1

, INPUT VOLTAGE (VOLTS)

in

V

0.1
1002030

Figure 6. Input Voltage versus Output Current

Figure 5. Output Current versus Input Voltage

TA=−25°C

25°C

75°C

40 50

IC, COLLECTOR CURRENT (mA)

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5

NSBC114EDXV6T1, NSBC114EDXV6T5

S

TYPICAL ELECTRICAL CHARACTERISTICS — NSBC124EDXV6T1

1

IC/IB = 10

0.1

0.01

, MAXIMUM COLLECTOR VOLTAGE (VOLT

0.001

CE(sat)

V

0

4

3

2

, CAPACITANCE (pF)

ob

1

C

0

0 10 203040

TA=−25°C

20 50

IC, COLLECTOR CURRENT (mA)

Figure 7. V

VR, REVERSE BIAS VOLTAGE (VOLTS)

CE(sat)

25°C

versus I

75°C

40

C

f = 1 MHz
IE = 0 V
TA = 25°C

50

1000

100

, DC CURRENT GAIN (NORMALIZED)

FE

10

1 100

IC, COLLECTOR CURRENT (mA)

10

VCE = 10 V

Figure 8. DC Current Gain

100

, COLLECTOR CURRENT (mA) h

0.01

C

I

0.001

0.1

10

1

0

246810

75°C 25°C

TA=−25°C

VO = 5 V

Vin, INPUT VOLTAGE (VOLTS)

TA=75°C

25°C

−25°C

Figure 9. Output Capacitance Figure 10. Output Current versus Input Voltage

100

VO = 0.2 V

TA=−25°C

, INPUT VOLTAGE (VOLTS)

in

V

0.1

10

75°C

1

0

10 20 30 40 50

IC, COLLECTOR CURRENT (mA)

25°C

Figure 11. Input Voltage versus Output Current

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6

NSBC114EDXV6T1, NSBC114EDXV6T5

S

TYPICAL ELECTRICAL CHARACTERISTICS — NSBC144EDXV6T1

10

IC/IB = 10

1

25°C

75°C

50

f = 1 MHz
IE = 0 V
TA = 25°C

CE(sat)

TA=−25°C

versus I

C

0.1

, MAXIMUM COLLECTOR VOLTAGE (VOLT

0.01

CE(sat)

0

V

20 40

IC, COLLECTOR CURRENT (mA)

Figure 12. V

1

0.8

0.6

1000

100

, DC CURRENT GAIN (NORMALIZED)

FE

10

1 100

IC, COLLECTOR CURRENT (mA)

10

VCE = 10 V

TA=75°C

Figure 13. DC Current Gain

100

75°C

10

1

25°C

TA=−25°C

25°C

−25°C

0.4

, CAPACITANCE (pF)

ob

C

0.2

0

010203040

VR, REVERSE BIAS VOLTAGE (VOLTS)

Figure 14. Output Capacitance

100

VO = 0.2 V

10

1

, INPUT VOLTAGE (VOLTS)

in

V

0.1
010 203040 50

0.1

0.01

, COLLECTOR CURRENT (mA) h

C

I

50

0.001
0246810

Figure 15. Output Current versus Input Voltage

TA=−25°C

IC, COLLECTOR CURRENT (mA)

VO = 5 V

Vin, INPUT VOLTAGE (VOLTS)

25°C

75°C

Figure 16. Input Voltage versus Output Current

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7

NSBC114EDXV6T1, NSBC114EDXV6T5

)

TYPICAL ELECTRICAL CHARACTERISTICS — NSBC114YDXV6T1

1

IC/IB = 10

0.1

0.01

, MAXIMUM COLLECTOR VOLTAGE (VOLTS

CE(sat)

0.001

V

020406080

IC, COLLECTOR CURRENT (mA)

Figure 17. V

4

3.5

3

2.5

CE(sat)

TA=−25°C

versus I

f = 1 MHz
lE = 0 V
TA = 25°C

25°C

75°C

C

300

VCE = 10

250

200

150

100

, DC CURRENT GAIN (NORMALIZED)

50

FE

h

0

1 10 100

2468 1520405060708090

IC, COLLECTOR CURRENT (mA)

TA=75°C

25°C

−25°C

Figure 18. DC Current Gain

100

TA=75°C

−25°C

25°C

2

1.5

, CAPACITANCE (pF)

ob

1

C

0.5

0

0 2 4 6 8 10 1520 2530 35404550

VR, REVERSE BIAS VOLTAGE (VOLTS)

Figure 19. Output Capacitance Figure 20. Output Current versus Input Voltage

10

VO = 0.2 V

1

, INPUT VOLTAGE (VOLTS)

in

V

10

, COLLECTOR CURRENT (mA)

C

I

1

0246810

Vin, INPUT VOLTAGE (VOLTS)

TA=−25°C

25°C

75°C

VO = 5 V

0.1
01020304050

IC, COLLECTOR CURRENT (mA)

Figure 21. Input Voltage versus Output Current

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8

NSBC114EDXV6T1, NSBC114EDXV6T5

PACKAGE DIMENSIONS

SOT−563, 6 LEAD

CASE 463A−01

ISSUE F

D

−X−

45L6

12 3

e

E

−Y−

b 6 5 PL

0.08 (0.003) X

M

A

H

E

C

Y

SOLDERING FOOTPRINT*

0.3

0.0118

1.35

0.0531

0.0394

1.0

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.

MILLIMETERS

DIM MIN NOM MAX

A 0.50 0.55 0.60
b 0.17 0.22 0.27
C

0.08 0.12 0.18 0.003 0.005 0.007

D 1.50 1.60 1.70
E 1.10 1.20 1.30
e 0.5 BSC
L 0.10 0.20 0.30

H

1.50 1.60 1.70

E

INCHES

MIN NOM MAX

0.020 0.021 0.023

0.007 0.009 0.011

0.059 0.062 0.066

0.043 0.047 0.051

0.02 BSC

0.004 0.008 0.012

0.059 0.062 0.066

0.45

0.0177

0.5

0.5

0.0197

0.0197

mm

ǒ

SCALE 20:1

inches

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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For additional information, please contact your local
Sales Representative

NSBC114EDXV6/D

9