ON Semiconductor NCV7329 Installation Manual

NCV7329

f

Stand-alone LIN Transceiver

Description

The NCV7329 is a fully featured local interconnect network (LIN)
transceiver designed to interface between a LIN protocol controller
and the physical bus.

The LIN bus is designed to communicate low rate data from control
devices such as door locks, mirrors, car seats, and sunroofs at the
lowest possible cost. The bus is designed to eliminate as much wiring
as possible and is implemented using a single wire in each node. Each
node has a slave MCU−state machine that recognizes and translates
the instructions specific to that function.

The main attraction of the LIN bus is that all the functions are not
time critical and usually relate to passenger comfort.

Features

• LIN−Bus Transceiver

♦ Compliant to ISO 17987−4 (Backwards Compatible to LIN

Specification rev. 2.x, 1.3) and SAE J2602

♦ Bus Voltage $42 V
♦ Transmission Rate 1 kbps to 20 kbps
♦ TxD Timeout Function
♦ Integrated Slope Control

• Protection

♦ Thermal Shutdown
♦ Undervoltage Protection
♦ Bus Pins Protected Against Transients in an Automotive

Environment

• Modes

♦ Normal Mode: LIN Transceiver Enabled, Communication via the

Bus is Possible

♦ Sleep Mode: LIN Transceiver Disabled, the Consumption from

is Minimized

V

BB

♦ Standby Mode: Transition Mode Reached after Wake−up Event o n

the LIN Bus

• Compatibility

♦ Pin−Compatible Subset with NCV7321
♦ K−line Compatible

Quality

• NCV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Require− ments; AEC−Q100
Qualified and PPAP Capable

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

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MARKING

DIAGRAMS

8

8

1

1

(Note: Microdot may be in either location)

SOIC−8

CASE 751AZ

DFN8

CASE 507AB

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package

1

1

NV7329

ALYW

G

NV73

29

ALYWG

G

PIN CONNECTIONS

EP

81

NC

7

V

BB

6

LIN

5

GND

NC

81

V

7

BB

LIN

6
5

GND

RxD

2

EN

3

NC

4

TxD

SOIC−8 (Top View)

RxD

EN

2
3

NC

4

TxD

DFN8 (Top View)

ORDERING INFORMATION

See detailed ordering and shipping information on page 10 o
this data sheet.

© Semiconductor Components Industries, LLC, 2018

May, 2018 − Rev. 0

1 Publication Order Number:

NCV7329/D

EN

RxD

NCV7329

BLOCK DIAGRAM

POR

State

Control

COMP

Thermal

shutdown

Osc

+

−

Filter

V

BB

I

sleep

D

S

R

SLAVE

LIN

VBAT

LIN

GND

1 kΩ

1 nF

TxD

time−out

Slope Control

NCV7329

Figure 1. Block Diagram

TYPICAL APPLICATION

bat

3.3/5V

10 μF

V

BB

RxD

7

LIN

8

6

3

LIN−BUS

KL30

KL31

NCV7329

5

GND

1

TxD

4

EN

2

Figure 2. Typical Application Diagram for a Master Node

Master Node

10 kΩ

100 nF

LB20140619.0

VCC

Microcontroller

GND

VBAT

LIN

GND

GND

220 pF

LIN

bat

Slave Node

3.3/5V

10 μF

V

BB

7

8

6

3

NCV7329

5

GND

KL30

LIN−BUS

KL31

1

4

2

RxD

TxD

EN

10 kΩ

100 nF

VCC

Microcontroller

GND

LB20140619.0

Table 1. PIN DESCRIPTION

Pin Name Description

1 RxD Receive Data Output; Low in Dominant State; Open−Drain Output
2 EN Enable Input, Transceiver in Normal Operation Mode when High, Pull−down Resistor to GND
3 NC Not Connected
4 TxD Transmit Data Input, Low for Dominant State, Pull−down to GND
5 GND Ground
6 LIN LIN Bus Output/Input
7 V

Battery Supply Input

BB

8 NC Not Connected

− EP Exposed Pad. Recommended to connect to GND or left floating in application (DFN8 package only).

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2

NCV7329

Table 2. ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

V

BB

V

LIN

V_Dig_IO DC Input Voltage on Pins (EN, RxD, TxD) −0.3 +7 V
V

ESD

V

ESDIEC

T

J

T

STG

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

1. Standardized human body model electrostatic discharge (ESD) pulses in accordance to EIA−JESD22. Equivalent to discharging a 100 pF

capacitor through a 1.5 kW resistor.

2. Standardized charged device model ESD pulses when tested according to AEC−Q100−011.

3. In accordance to JEDEC JESD22−A115. Equivalent to discharging a 200 pF capacitor through a 10 W resistor and 0.75 mH coil.

4. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. System HBM levels are verified by an external test−house.

Voltage on Pin V

BB

−0.3 +42 V
LIN Bus Voltage with respect to GND −42 +42 V
LIN Bus Voltage with respect to V

BB

−42 +42 V

Human Body Model (LIN Pin) (Note 1) −8 +8 kV
Human Body Model (All Pins) (Note 1) −4 +4 kV
Charged Device Model (All Pins) (Note 2) −750 +750 V
Machine Model (All Pins) (Note 3) −200 +200 V
Electrostatic Discharge Voltage (LIN Pin) System Human Body

−8 +8 kV

Model (Note 4) Conform to IEC 61000−4−2
Junction Temperature Range −40 +150 °C
Storage Temperature Range −55 +150 °C

Table 3. THERMAL CHARACTERISTICS

Parameter Symbol Value Unit

Thermal characteristics, SOIC−8 (Note 5)

Thermal characteristics, DFN8 (Note 5)

5. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.

6. Values based on test board according to EIA/JEDEC Standard JESD51−3, signal layer with 10% trace coverage.

7. Values based on test board according to EIA/JEDEC Standard JESD51−7, signal layers with 10% trace coverage.

Thermal Resistance Junction−to−Air, Free air, 1S0P PCB (Note 6)
Thermal Resistance Junction−to−Air, Free air, 2S2P PCB (Note 7)

Thermal Resistance Junction−to−Air, Free air, 1S0P PCB (Note 6)
Thermal Resistance Junction−to−Air, Free air, 2S2P PCB (Note 7)

R

q

JA

R

q

JA

R

q

JA

R

q

JA

131

81

125

58

°C/W
°C/W

°C/W
°C/W

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NCV7329

ELECTRICAL CHARACTERISTICS

Definitions

All voltages are referenced to GND (pin 5) unless otherwise specified. Positive currents flow into the IC. Sinking current means
the current is flowing into the pin; sourcing current means the current is flowing out of the pin.

Table 4. DC CHARACTERISTICS (V

Bus Load = 500 W (V

Symbol

to LIN); unless otherwise specified.)

BB

Parameter Conditions Min. Typ. Max. Unit

= 5 V to 18 V; TJ = −40°C to +150°C; Typical values are given at VBB = 12 V and TJ = 25°C

BB

SUPPY PIN (VBB)

V

BB

I

BB

I

BB

I

BB

Battery Supply 5 18 V
Battery Supply Current Normal Mode; LIN recessive 0.2 0.55 1.2 mA
Battery Supply Current Normal Mode; TxD = Low, LIN

Dominant

Battery Supply Current Sleep and Standby Mode;

LIN recessive;

I

BB

Battery Supply Current Sleep and Standby Mode;

LIN recessive;

POR AND VBB MONITOR

PORH_V
PORL_V
MONH_V
MONL_V

BB

BB

BB

Power−on Reset; High Level on V
Power−on Reset; Low Level on V
Battery Monitoring High Level VBB Rising 3.2 4.2 5.0 V

BB

BB

BB

Battery Monitoring Low Level VBB Falling 3.0 4.0 4.8 V

VBB Rising 2.7 3.5 4.4 V
VBB Falling 1.3 2.1 2.7 V

TRANSMITTER DATA INPUT (PIN TxD)

V

IL_TxD

V

IH_TxD

R

PD_TxD

Low Level Input Voltage −0.3 +0.8 V
High Level Input Voltage 2 7 V
Pull−down Resistor on TxD Pin 50 125 325

RECEIVER DATA OUTPUT (PIN RxD)

I

OL_RxD

I

OH_RxD

Low Level Output Current V
High Level Output Current −5 +5

= 0.4 V 2 mA

RXD

ENABLE INPUT (PIN EN)

V

IL_EN

V

IH_EN

R

PD_EN

Low Level Input Voltage −0.3 +0.8 V
High Level Input Voltage 2 7 V
Pull−down Resistor to Ground 100 250 650

LIN BUS LINE (PIN LIN)

V

BUS_DOM

V

BUS_REC

V

REC_DOM

V

REC_REC

V

REC_CNT

V

REC_HYS

V

LIN_DOM

Bus Voltage for Dominant State 0.4 V
Bus Voltage for Recessive State 0.6 V
Receiver Threshold LIN Bus Recessive − Dominant 0.4 0.6 V
Receiver Threshold LIN Bus Dominant – Recessive 0.4 0.6 V
Receiver Centre Voltage (V
Receiver Hysteresis (V
Dominant Output Voltage

REC_DOM
REC_REC

Normal mode; VBB = 7 V 1.2 V
Normal mode; VBB = 18 V 2.0 V

I

BUS_no_GND

I

BUS_no_VBB

Communication not Affected V
LIN Bus Remains Operational V

= GND = 12 V; 0 < V

BB

= GND = 0 V; 0 < V

BB

8. Values based on design and characterization. Not tested in production.

− V

+ V

V

LIN = VBB

V

LIN = VBB

REC_REC

REC_DOM

2 3.9 6.5 mA

6 10

; TJ<85°C

6 15

) / 2 0.475 0.500 0.525 V
) 0.050 0.175 V

< 18 V −1 +1 mA

LIN

< 18 V 5

LIN

mA

mA

kW

mA

kW

BB
BB
BB
BB
BB
BB

mA

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4

NCV7329

Table 4. DC CHARACTERISTICS (V

= 5 V to 18 V; TJ = −40°C to +150°C; Typical values are given at VBB = 12 V and TJ = 25°C

BB

Bus Load = 500 W (VBB to LIN); unless otherwise specified.)

Symbol UnitMax.Typ.Min.ConditionsParameter

LIN BUS LINE (PIN LIN)

I

BUS_LIM

I

BUS_PAS_dom

I

sleep

I

BUS_PAS_rec

V

SERDiode

R

SLAVE

C

LIN

Current limitation for Driver Dominant State; V
Receiver Leakage current; Driver OFF TxD = High; V
Receiver Leakage current;

Sleep mode; V

see Figure 1
Receiver Leakage current; Driver OFF;

(Note 8)

TxD = High; 8 V < V
8 V < V

LIN

Voltage Drop on Serial Diode Voltage drop on D
Internal Pull−up Resistance see Figure 1 20 30 60
Capacitance on Pin LIN, (Note 8) 20 30 pF

8. Values based on design and characterization. Not tested in production.

= V

LIN

BB_MAX

= 0 V; VBB = 12 V −1 mA

LIN

= 0 V; V

LIN

< 18 V; V

BB
LIN

see Figure 1 0.4 0.7 1 V

S,

= 12 V −16 −8 −3

BB

< 18 V;

≥ V

BB

40 200 mA

20

mA

mA

kW

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