ON Semiconductor NCV47821 User Manual

NCV47821

LDO Regulator - Dual,

Adjustable Current Limit,
Diagnostic Features

3.3 V to 20 V

The NCV47821 dual channel LDO regulator with 200 mA per
channel is designed for use in harsh automotive environments. The
device has a high peak input voltage tolerance and reverse input voltage,
reverse bias, overcurrent and overtemperature protections. The
integrated current sense feature (adjustable by resistor connected to
CSO pin for each channel) provides diagnosis and system protection
functionality. The CSO pin output current creates voltage drop across
CSO resistor which is proportional to output current of each channel.
Extended diagnostic features in OFF state are also available and
controlled by dedicated input and output pins.

Features

• Adjustable Outputs: 3.3 V to 20 V ±3% Output Voltage

• Output Current per Channel: up to 200 mA

• Two Independent Enable Inputs (3.3 V Logic Compatible)

• Adjustable Current Limits: up to 300 mA

• Protection Features:

♦ Current Limitation
♦ Thermal Shutdown
♦ Reverse Input Voltage and Reverse Bias Voltage

• Diagnostic Features:

♦ Short To Battery (STB) and Open Load (OL) in OFF State
♦ Internal Components for OFF State Diagnostics
♦ Open Collector Flag Output

• AEC−Q100 Grade 1 Qualified and PPAP Capable

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

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MARKING
DIAGRAM

14

14

TSSOP−14

Exposed Pad

1

CASE 948AW

NCV4

7821

ALYWG

G

1

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.

Typical Applications

• Audio and Infotainment System

• Active Safety System

GND

V

ADJ1

CSO1EN1

V

ADJ2

CSO2

out1

EF

out2

V

DE

CS

EN2

in

NCV47821

(Dual LDO)

C

in

1 μF

Diagnostic Enable Input

Diagnostic Channel Select Input

Cb1* and Cb2* are optional for stability with ceramic output capacitors

Figure 1. Application Schematic

(See Application Section for More Details)

© Semiconductor Components Industries, LLC, 2017

September, 2019 − Rev. 2

C

1 μF

C

1 μF

CSO1

CSO2

R11Cb1*

To A / D

R

CSO1

R

12

Error Flag Output (Open Collector)

R21Cb2*

To A / D

R

R

CSO2

22

C

out1

10 μF

C

out2

10 μF

1 Publication Order Number:

NCV47821/D

NCV47821

I

10 mA

PU1

EN1

DE
CS

V

in

VOLTAGE

REFERENCE

R

PD_EN1

780 kΩ

ENABLE

SATURATION

PROTECTION

THERMAL

SHUTDOWN

PD_CS

EN1
EN2

R

780 kΩ

OC1_ON
OC2_ON

PD_DE

R

780 kΩ

STB1_OL1_OFF
STB2_OL2_OFF

IPU1_ON

V

REF 1

V

REF 2

V

REF _OFF

EN1

DIAGNOSTIC

CONTROL

LOGIC

CURRENT MIRROR

PD1_ON

IPU1_ON
IPU2_ON

PD1_ON
PD2_ON

PASS DEVICE 1

AND

STB1_OL1_OFF

I

PU2

10 mA

OC1_ON

I

CSO1

= I

EA1

V

/ 100

out1

V

REF 2

+

2.55 V

−

out1

CSO1

+

0.95x

−

V

REF 2

R

PD11

500 kΩ

+

R

PD12

100 kΩ

V

−

REF_OFF

V

REF 1

+

1.265 V

−

ADJ1

EF

EN2

GND

V

in

R

PD_EN2

780 kΩ

SATURATION

PROTECTION

THERMAL

SHUTDOWN

IPU2_ON

EN2ENABLE

CURRENT MIRROR

PD2_ON

PASS DEVICE 2

AND

STB2_OL2_OFF

OC2_ON

I

CSO2

= I

EA2

V

/ 100

out2

V

REF 2

+

2.55 V

−

out2

CSO2

+

0.95x

−

V

REF 2

R

PD21

500 kΩ

+

R

PD22

100 kΩ

V

−

REF_OFF

V

REF 1

+

1.265 V

−

ADJ2

Figure 2. Simplified Block Diagram

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2

NCV47821

411

V

in

CSO1

EN1

GND

EN2

CSO2

V

in

EPAD

TSSOP−14 EPAD

(Top View)

Figure 3. Pin Connections

Table 1. PIN FUNCTION DESCRIPTION

Pin No.

TSSOP−14

EPAD

1 V

2 CSO1 Current Sense Output 1, Current Limit setting and Output Current value information. See Application

3 EN1 Enable Input 1; low level disables the Channel 1. (Used also for OFF state diagnostics control for

4 GND Power Supply Ground.

5 EN2 Enable Input 2; low level disables the Channel 2. (Used also for OFF state diagnostics control for

6 CSO2 Current Sense Output 2, Current Limit setting and Output Current value information. See Application

7 V

8 V

9 ADJ2 Adjustable Voltage Setting Input 2. See Application Section for more details.

10 DE Diagnostic Enable Input.

11 EF Error Flag (Open Collector) Output. Active Low.

12 CS Channel Select Input for OFF state diagnostics. Set CS = Low for OFF state diagnostics of Chan-

13 ADJ1 Adjustable Voltage Setting Input 1. See Application Section for more details.

14 V

EPAD EPAD Exposed Pad is connected to Ground. Connect to GND plane on PCB.

Pin Name Description

in

in

out2

out1

Power Supply Input for Channel 1 and supply of control circuits of whole chip. At least 4.4 V power
supply must be used for proper IC functionality.

Section for more details.

Channel 1)

Channel 2)

Section for more details.

Power Supply Input for Channel 2. Connect to pin 1 or different power supply rail.

Regulated Output Voltage 2.

nel 1. Set CS = High for OFF state diagnostics of Channel 2. Corresponding EN pin has to be used
for diagnostics control (see Application Information section for more details).

Regulated Output Voltage 1.

V

out1

ADJ1

CS

EF

DE

ADJ2

V

out2

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NCV47821

Table 2. MAXIMUM RATINGS

Rating Symbol Min Max Unit

Input Voltage DC V

Input Voltage (Note 1)

Load Dump − Suppressed

Enable Input Voltage V

ADJ Input Voltage V

CSO Voltage V

DE, CS and EF Voltages VDE, VCS V

Output Voltage V

Junction Temperature T

Storage Temperature T

in

U

s*

EN1,2

ADJ1,2

CSO1,2

out1,2

J

STG

EF

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

1. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in

production. Passed Class C according to ISO16750−1.

Table 3. ESD CAPABILITY (Note 2)

Rating

ESD Capability, Human Body Model ESD

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)

Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes < 50 mm2 due
to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2014.

Symbol Min Max Unit

HBM

Table 4. LEAD SOLDERING TEMPERATURE AND MSL (Note 3)

Rating

Moisture Sensitivity Level MSL 1 −

3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D

Symbol Min Max Unit

THERMAL CHARACTERISTICS (Note 4)

Rating

Thermal Characteristics (single layer PCB)

Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Lead (Note 5)

Thermal Characteristics (4 layers PCB)

Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Lead (Note 5)

4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

5. Values based on copper area of 645 mm

2

(or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according to JEDEC51.3,

4 layers − according to JEDEC51.7

Symbol Value Unit

R

θJA

R

ψJL

R

θJA

R

ψJL

Table 5. RECOMMENDED OPERATING RANGES

Rating Symbol Min Max Unit

Input Voltage (Note 6) V

Nominal Output Voltages V

Output Current Limit (Note 7) I

Junction Temperature T

Current Sense Output (CSO) Capacitor C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.

6. Minimum V

7. Corresponding R

= 4.4 V or (V

in

CSO1,2

+ 0.5 V), whichever is higher.

out1,2

is in range from 25.5 kW down to 850 W.

in

out_nom1,2

LIM1,2

J

CSO1,2

−42 45 V

− 60

−42 45 V

−0.3 10 V

−0.3 7 V

−0.3 7 V

−1 40 V

−40 150 °C

−55 150 °C

−2 2 kV

°C/W

52

9.0

°C/W

31
10

4.4 40 V

3.3 20 V

10 300 mA

−40 150 °C

1 4.7

V

mF

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NCV47821

Table 6. ELECTRICAL CHARACTERISTICS V

= 10 mF, Min and Max values are valid for temperature range −40°C v TJ v +150°C unless noted otherwise and are guaranteed

C

out1,2

by test, design or statistical correlation. Typical values are referenced to T

Parameter

= 13.5 V, V

in

= 3.3 V, VDE = 0 V, R

EN1,2

= 25°C (Note 8)

J

CSO1,2

= 0 W, C

= 1 mF, Cin = 1 mF,

CSO1,2

Test Conditions Symbol Min Typ Max Unit

REGULATOR OUTPUTS

Output Voltage (Accuracy %) (Note 9)

Vin = V
I

out1,2

Line Regulation (Note 9) Vin = V

I

out1,2

Load Regulation Vin = (V

I

out1,2

Dropout Voltage (Note 10) V

out_nom1,2

V

DO1,2

to 40 V

in_min

= 5 mA to 200 mA

to (V

in_min

= 5 mA

out_nom1,2

= 5 mA to 200 mA

= Vin − V

= 5 V, I

out1,2

out_nom1,2

+ 8.5 V)

out1,2

+ 20 V)

= 200 mA

V

Reg

Reg

V

out1,2

line1,2

load1,2

DO1,2

−3 − +3

%

%

− 0.1 1.0

%

− 0.4 1.4

− 250 500 mV

DISABLE AND QUIESCENT CURRENTS

Disable Current

Quiescent Current, Iq = Iin − (I

Quiescent Current, Iq = Iin – (I

out1

out1

+I

+I

out2

out2

EN1,2

−40°C v T

) I

out1

) I

out1

= 0 V, V

v +125°C

J

= I

= 500 mA, Vin = (V

out2

= I

= 200 mA, Vin = (V

out2

out_nom1,2

= 5 V,

out_nom

out_nom

+ 8.5 V) I

+ 8.5 V) I

I

DIS

− 0.1 10

q

q

− 0.6 1.0 mA

− 15.5 25 mA

mA

V

CURRENT LIMIT PROTECTION

Current Limit

out1,2

Vin = (V

0.9 x V

out_nom1,2

out_nom1,2

+ 8.5 V)

I

LIM1,2

300 − − mA

=

V

PSRR & NOISE

Power Supply Ripple Rejection (Note 11)

f = 100 Hz, 0.5 V

p−p1,2

Output Noise Voltage (Note 11) f = 10 Hz to 100 kHz, C

= 10 nF V

b1,2

PSRR

n1,2

1,2

− 75 − dB

− 137 −

mV

rms

ENABLE

Enable Input Threshold Voltage

Logic Low (OFF)
Logic High (ON)

Enable Input Current V

Turn On Time

from Enable ON to 90 % of V

out

v

V
V

I
R

0.1 V

out1,2

w

0.9 x V

out1,2

= 3.3 V, V

EN1,2

= 100 mA, C

out1,2

= 82 kW, Rn2 = 27 kW

n1

out_nom1,2(Vout_nom1,2

out_nom1,2

= 10 nF,

b1,2

V

= 5 V)

= 5 V I

th(EN1,2)

EN1,2

t

on

0.99

−

1.8

1.9

2 8 20

− 1.7 −

−

2.31

V

mA

ms

OUTPUT CURRENT SENSE

CSO Voltage Level at Current Limit

CSO Transient Voltage Level

Output Current to CSO Current Ratio
(Note 11, 12)

Output Current to CSO Current Ratio
(Note 12)

CSO Current at no Load Current

= 0.9 x V

out1,2

(V

out_nom1,2

C

CSO1,2

pulse from 10 mA to 300 mA, tr = 1 ms

I

out1,2

V

CSO1,2

(V

out_nom1,2

V

CSO1,2

(V

out_nom1,2

V

CSO1,2

(V

out_nom1,2

out_nom1,2

= 5 V) R

= 4.7 mF, R

= 2 V, I

out1,2

= 5 V)

= 2 V, I

out1,2

= 5 V)

= 0 V, I

out1,2

= 5 V)

,

= 1 kW

CSO1,2

= 1 kW

CSO1,2

= 1 mA to 10 mA

= 10 mA to 300 mA

= 0 mA,

V

CSO_I

V

CSO1,2

I

out1,2

I

CSO1,2

I

out1,2

I

CSO1,2

I

CSO_off1,2

lim1,2

/

/

2.448

2.55 2.652

(−4%)

− − 3.3

−

98 −

(−5%)

−

100 −

(−5%)

− − 10

(+4%)

V

V

−

(+5%)

−

(+5%)

mA

V

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

9. Minimum input voltage V

and Rn2 accuracy.

R

n1

10.Measured when the output voltage V

11.Values based on design and/or characterization.

is 4.4 V or (V

in_min

out_nom1,2

has dropped by 2% of V

out1,2

+ 1 V) whichever is higher. V

out_nom1,2

from the nominal valued obtained at Vin = V

out_nom1,2

measured at ADJ1,2 pin due to excluding

[ TJ. Low duty

A

+ 8.5 V.

out1,2

12.Not guaranteed in dropout.

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