The NCV4263−2C is a 200 mA LDO regulator with integrated reset
watchdog functions dedicated for microprocessor applications. Its
robustness allows NCV4263−2C to be used in severe automotive
environments. The Enable function can be used for decrease of
quiescent current down to max 10 mA. The NCV4263−2C contains
protection functions as current limit, thermal shutdown and reverse
output current protection. The regulator provides also Watchdog,
Reset function with adjustable Threshold and adjustable Power−on
Reset Delay Time.
Features
• Output Voltage Option: 5 V
• Output Voltage Accuracy: ±2%
• Output Current up to 200 mA
• Very Low Dropout Voltage
• Enable Function (10 mA Max Quiescent Current when Disabled)
• Microprocessor Compatible Control Functions:
− Reset with Adjustable Threshold and Adjustable Power−on Delay
− Watchdog Function
• Wide Input Voltage Operation Range: up to 40 V
• Protection Features:
− Current Limitation
− Thermal Shutdown
− Reverse Output Current
• AEC−Q100 Grade 1 Qualified and PPAP Capable
• These are Pb−Free Devices
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MARKING
DIAGRAMS
8
8
1
14
1
(Note: Microdot may be in either location)
See detailed ordering and shipping information on page 12 of
this data sheet.
SOIC−8 EP
PD SUFFIX
CASE 751AC
14
SOIC−14
D SUFFIX
CASE 751A
A= Assembly Location
L, WL= Wafer Lot
Y= Year
W, WW = Work Week
G= Pb−Free Package
214ENEnable Input. Low level disables the chip. Connect to Vin if this function is not needed.
31RO
4
56D
67RADJ
78WDI
89V
EPAD−
−2NCNot connected. No internally bonded.
Pin No.
SO−14
3, 4, 5,
10, 11, 12
Pin NameDescription
in
Positive Power Supply. Connect ceramic capacitor to ground.
Reset Output; Open Collector connected to the V
leave open if the function is not needed
via an internal 30 kW pull−up resistor;
out
GNDPower Supply Ground. Connect pins to heat sink area with GND potential.
DelayTiming. Connect to GND via ceramic capacitor for adjusting reset delay timing and
watchdog trigger time or leave open if this function is not needed.
Reset Adjust Threshold. Connect to GND (VRT = 93% of V
adjust the reset threshold.
) or to output voltage divider to
out
Watchdog Input. Rising edge triggered Input for watchdog pulses. Connect to GND if this
function is not needed.
out
Exposed
Pad
Regulated Output Voltage. Connect a C
Connect to ground potential or leave unconnected.
≥ 22 mF capacitor to ground.
out
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2
NCV4263−2C
ABSOLUTE MAXIMUM RATINGS
RatingSymbolMinMaxUnit
Input Voltage (Note 1)V
Enable InputV
Output VoltageV
Reset Output VoltageV
Watchdog Input VoltageV
Reset Adjust ThresholdV
Delay Timing Output VoltageV
Maximum Junction TemperatureT
Storage TemperatureT
in
EN
out
RO
WDI
RADJ
D
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
ESD CAPABILITY (Note 2)
RatingSymbolMinMaxUnit
ESD Capability, Human Body ModelESD
ESD Capability, Charged Device ModelESD
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101)
HBM
CDM
−4245V
−4245V
−17V
−0.37V
−0.37V
−0.37V
−0.37V
−40150°C
−55150°C
−2kV
−1kV
LEAD SOLDERING TEMPERATURE AND MSL (Note 3)
Rating
Moisture Sensitivity Level
SOIC−14
SOIC−8 EP
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions
3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
SymbolMinMaxUnit
MSL
1
2
T
SLD
−265 peak
THERMAL CHARACTERISTICS
RatingSymbolValueUnit
Thermal Characteristics, SOIC−8 Exposed Pad (Note 4)
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm
2
(or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
Y
R
θJA
ψJP4
94.8
18.3
OPERATING RANGES (Note 6)
Rating
Input VoltageV
Junction TemperatureT
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
SymbolMinMaxUnit
in
J
5.540V
−40150°C
−
°C
°C/W
°C/W
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3
NCV4263−2C
ELECTRICAL CHARACTERISTICS V
f
= 1 kHz. Min and Max values are valid for temperature range *40°C v TJ v 150°C unless otherwise noted and are guaranteed by
WDI
test design or statistical correlation. Typical values are referenced to T
Parameter
= 13.5 V, VEN = 5 V, Cin = 100 nF, C
in
= 25°C. (Notes 7 and 8)
J
Test ConditionsSymbolMinTypMaxUnit
= 22 mF, ESR = 1.5 W, WDI = 5 V pulses,
out
REGULATOR OUTPUT
Output Voltage Accuracy
Line RegulationI
Load RegulationI
Dropout Voltage (Note 9)I
Vin = 6 V to 40 V, I
= 150 mA, Vin = 6 V to 28 VReg
out
= 5 mA to 150 mAReg
out
= 150 mAV
out
= 5 to 150 mAV
out
out
DO
line
load
4.905.05.10V
−25325mV
−25−25mV
−300500mV
DISABLE AND QUIESCENT CURRENTS
Disable Current
Quiescent Current, Iq = Iin − I
out
VEN = 0 V,TJ < 125°CI
I
= 0 mA
out
I
= 150 mA
out
I
= 150 mA, Vin = 4.5 V
out
DIS
I
q
−0.06610
−
0.275
−
−
3
11.3
1.3
18
23
mA
mA
CURRENT LIMIT PROTECTION
Current Limit
= 0.96 x V
out
out_nom
I
LIM
200418500mA
V
PSRR
Power Supply Ripple Rejection
(Note 10)
f = 100 Hz, 0.5 V
p−p
PSRR−80−dB
ENABLE
Enable Input Threshold Voltage
Logic High
Logic Low
V
w 0.9 x V
out
V
v 0.1 V
out
out_nom
V
Enable Input CurrentVEN = 5 VI
th(EN)
EN
−
0.8
2.0
1.74
51025
3.5
−
V
mA
WATCHDOG INPUT
Watchdog Input Low Time
CD = 100 nF, V
Watchdog Trigger TimeCD = 100 nF, V
> VRT, no WDI signalt
out
> VRT, no WDI signalt
out
WL
WTT
123.5ms
1620.827ms
DELAY TIMING
Charge Current
VD = 1 V, no WDI signalI
Discharge CurrentVD = 1 V, no WDI signalI
Saturation VoltageV
< VRT, no WDI signalV
out
Switching Threshold
Upper
Lower
D_charge
D_disch
D_sat
V
thH(D)
V
thL(D)
4066.895
4.406.549.40
−6100mV
1.45
0.2
1.70
0.34
2.05
0.55
mA
mA
V
RESET OUTPUT
V
Output Voltage Reset Threshold
(Note 11)
Reset Adjust Threshold(70% of V
decreasing, V
out
out_nom
Reset Adjustment Range (Note 12)V
Reset Output Low VoltageIRO = 1 mAV
Reset Delay TimeCD = 100 nFt
= 0 VV
RADJ
) v V
< (VRT)V
out
RT
th(RADJ)
RT_range
ROL
RD
909396% V
1.261.361.44V
70−93% V
−0.010.4V
1.32.64.1ms
out
out
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Measured when output voltage falls 100 mV below the regulated voltage at V
10.Values based on design and/or characterization.
= 13.5 V.
in
[TJ. Low duty
A
11.See APPLICATION INFORMATION section for Reset Threshold Adjustment
12.V
limits are guaranteed by VRT and V
RT_range
th(RADJ)
parameters.
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4
NCV4263−2C
ELECTRICAL CHARACTERISTICS V
f
= 1 kHz. Min and Max values are valid for temperature range *40°C v TJ v 150°C unless otherwise noted and are guaranteed by
WDI
test design or statistical correlation. Typical values are referenced to T
= 13.5 V, VEN = 5 V, Cin = 100 nF, C
in
= 25°C. (Notes 7 and 8)
J
= 22 mF, ESR = 1.5 W, WDI = 5 V pulses,
out
ParameterUnitMaxTypMinSymbolTest Conditions
RESET OUTPUT
Reset Reaction Time
CD = 100 nFt
RR
0.51.24
ms
THERMAL SHUTDOWN
Thermal Shutdown Temperature
(Note 10)
I
= 1 mAT
out
SD
150177195°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Measured when output voltage falls 100 mV below the regulated voltage at V
10.Values based on design and/or characterization.
= 13.5 V.
in
[TJ. Low duty
A
11.See APPLICATION INFORMATION section for Reset Threshold Adjustment
12.V
limits are guaranteed by VRT and V
RT_range
th(RADJ)
parameters.
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5
NCV4263−2C
TYPICAL CHARACTERISTICS
0.32
Vin = 13.5 V
= 0 mA
0.30
I
out
0.28
0.26
0.24
0.22
, QUIESCENT CURRENT (mA)
q
I
0.20
40120160
TJ, TEMPERATURE (°C)Vin, INPUT VOLTAGE (V)
Figure 4. Quiescent Current vs. TemperatureFigure 5. Quiescent Current vs. Input Voltage
10
9
Vin = 13.5 V
= 25°C
T
8
J
7
6
5
4
3
2
, QUIESCENT CURRENT (mA)
q
I
1
0
I
, OUTPUT CURRENT (mA)TJ, TEMPERATURE (°C)
out
Figure 6. Quiescent Current vs. Output
Current
16
14
TJ = 25°C
R
= 25 W
out
12
10
8
6
4
, QUIESCENT CURRENT (mA)
q
2
I
0
1401008060200−20−40
35302520151050
40
5.10
5.08
5.06
Vin = 13.5 V
= 5 mA
I
out
5.04
5.02
5.00
4.98
4.96
, OUTPUT VOLTAGE (V)
4.94
out
V
4.92
4.90
250200150100500
40120160
1401008060200−20−40
Figure 7. Output Voltage Accuracy
6
5
4
3
2
, OUTPUT VOLTAGE (V)
out
1
V
0
600
TJ = 150°C
TJ = 25°C
R
= 25 W
out
500
400
300
200
, DROPOUT VOLTAGE (mV)
100
DO
V
TJ = 125°C
TJ = 25°C
TJ = −40°C
0
6543210
Vin, INPUT VOLTAGE (V)I
, OUTPUT CURRENT (mA)
out
Figure 8. Output Voltage vs. Input VoltageFigure 9. Dropout Voltage vs. Output Current
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6
250200150100500
NCV4263−2C
TYPICAL CHARACTERISTICS
600
I
= 150 mA
out
500
400
300
200
, DROPOUT VOLTAGE (mV)
100
DO
V
0
40120160
TJ, TEMPERATURE (°C)Vin, INPUT VOLTAGE (V)
Figure 10. Dropout Voltage vs. TemperatureFigure 11. Output Current Limit vs. Input
550
500
450
400
350
300
250
, OUTPUT CURRENT LIMIT (mA)
200
LIM
I
150
Vin = 13.5 V
= 0.96 x V
V
out
out_nom
20120160
TJ, TEMPERATURE (°C)I
Figure 12. Output Current Limit vs.
Temperature
600
V
= 0.96 x V
out
out_nom
550
TJ = 25°C
500
450
TJ = 125°C
TJ = −40°C
400
350
, OUTPUT CURRENT LIMIT (mA)
LIM
I
300
1401008060200−20−40
TJ = 150°C
35302520151050
40
Voltage
100
Unstable Region
10
1
Vin = 13.5 V
C
= 22 mF
out
T
= 25°C
J
ESR, OUTPUT CAPACITOR ESR (W)
0.1
0.01
1401008060400−20−40
Stable Region
, OUTPUT CURRENT (mA)
out
250200150100500
Figure 13. Output Capacitor ESR Stability
Region vs. Output Current
120
110
100
90
80
70
PSRR (dB)
60
50
40
30
Vin = 13.5 V DC + 0.5 Vpp AC
C
= 22 mF, TA = 25°C
out
45
40
VEN = 13.5 V
35
30
25
Vin = 13.5 V
= 0 mA
I
out
20
50
I
= 1 mA
out
I
out
= 100 mA
100,00010,000100010010
, ENABLE INPUT CURRENT (mA)
EN
I
15
10
5
0
VEN = 5 V
VEN = 3.3 V
1204060
FREQUENCY (Hz)TJ, TEMPERATURE (°C)
Figure 14. PSRR vs. FrequencyFigure 15. Enable Input Current vs.
Temperature
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7
16014010080200−20−40
NCV4263−2C
TYPICAL CHARACTERISTICS
1.44
1.42
1.40
1.38
1.36
1.34
1.32
1.30
, RESET ADJUST THRESHOLD (V)V
1.28
1.26
th(RADJ)
V
Vin = 13.5 V
= 0.7 x V
V
out
40120160
TJ, TEMPERATURE (°C)V
Figure 16. Reset Adjust Threshold vs.
Temperature
1.8
1.6
Upper Threshold
1.4
1.2
1.0
Vin = 13.5 V
0.8
0.6
0.4
, RESET DELAY THRESHOLDS (V)
0.2
th(D)
0
Lower Threshold
20100160
TJ, TEMPERATURE (°C)TJ, TEMPERATURE (°C)
Figure 18. Delay Timing Switching Thresholds
vs. Temperature
out_nom
1.44
1.42
1.40
1.38
1.36
1.34
1.32
1.30
, RESET ADJUST THRESHOLD (V)
Vin = 13.5 V
= 25°C
T
J
1.28
1.26
1401008060200−20−40
th(RADJ)
V
, OUTPUT VOLTAGE (V)
out
5.04.54.03.53.02.52.0
Figure 17. Reset Adjust Threshold vs. Output
Voltage
80
70
Charge Current
60
50
, RESET DELAY
(disch)
40
30
Vin = 13.5 V
= 1 V
V
D
20
D(charge),
I
10
0
1401208060400−20−40
CHARGE / DISCHARGE CURRENT (mA)
Discharge Current
20120160
1401008060400−20−40
Figure 19. Reset Delay Charge / Discharge
Current vs. Temperature
27
26
25
24
23
22
21
20
19
18
, WATCHDOG TRIGGER TIME (ms)
17
WTT
t
16
40120160
TJ, TEMPERATURE (°C)
Figure 20. Watchdog Trigger Time vs.
Temperature
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Vin = 13.5 V
> V
V
out
RT
CD = 100 nF
no WDI signal
1401008060200−20−40
8
V
NCV4263−2C
in
V
V
V
V
1 V
V
thH(D)
thL(D)
V
V
out
RT
D
RO
1 V
ROL
t
RD
Thermal
Shutdown
t
RD
Voltage Dip
Input
t
Under
Voltage
RR
Figure 21. Reset Operation Timing Diagram
Output
Voltage Spike
t < t
Overload
RR
t
t
t
t
V
WDI
V
D
V
thH(D)
V
thL(D)
V
RO
V
ROL
t
WTT
t
WL
t
WP
t
t
t
Figure 22. Watchdog Operation Timing Diagram
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9
NCV4263−2C
DEFINITIONS
General
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
Output Voltage
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
Line Regulation
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Load Regulation
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
Dropout Voltage
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Quiescent and Disable Currents
Quiescent Current (Iq) is the difference between the input
current (measured through the LDO input pin) and the
output load current. If Enable pin is set to LOW the regulator
reduces its internal bias and shuts off the output, this term is
called the disable current (I
DIS
).
Current Limit and Short Circuit Current Limit
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. It means that
the device is capable to supply minimum 200 mA without
sending Reset signal to microprocessor.
Short Circuit Current Limit is output current value
measured with output of the regulator shorted to ground.
PSRR
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Line Transient Response
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Load Transient Response
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between low−load and high−load conditions.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 177°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Package Power Dissipation
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
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10
NCV4263−2C
APPLICATIONS INFORMATION
The NCV4263−2C regulator is self−protected with
internal thermal shutdown and internal current limit. Typical
characteristics are shown in Figures 4 to 22.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV4263−2C
package. Higher capacitance and lower ESR will improve
the overall line and load transient response. If extremely fast
input voltage transients are expected then appropriate input
filter is recommended to use in order to decrease rising
and/or falling edges below 50 V/ms for proper operation.
The filter can be composed of several capacitors in parallel.
Output Decoupling (C
out
)
The NCV4263−2C is a stable component and requires a
minimum Equivalent Series Resistance (ESR) for the output
capacitor. Stability region of ESR versus Output Current is
shown in Figure 13. The minimum output decoupling value
is 22 mF and can be augmented to fulfill stringent load
transient requirements. Larger values improve noise
rejection and load transient response.
Enable Operation
The Enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet.
Delay Timing
The Delay Timing pin is current source. Current from
Delay Timing pin charges connected capacitor. The value of
this capacitor determines the Reset Delay Time by
Equation 1 and Watchdog Trigger Time by Equation 4.
t
CD+
ǒ
RD_des
t
RD
Ǔ
100 nF
(eq. 1)
where:
C
D
t
RD_des
t
RD
is capacitance of Delay capacitor
is desired Reset Delay Time
is Reset Delay Time specified in
datasheet
Reset Operation
A reset signal is provided on the Reset Output pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 21. This is in the form of a logic signal on
Reset Output. Output voltage conditions below the Reset
Threshold causes Reset Output to go low. The Reset Output
integrity is maintained down to V
= 1.0 V. The Reset
out
Output circuitry is open collector output with internal 30 kW
pull−up resistor. Leave open this output if the Reset function
is not needed else an external pull−up resistor (5.6 kW)
connect to the output (V
out
).
Reset Threshold is default set to 93% of nominal Output
Voltage (V
= 0 V). Reset Threshold can be varied in
RADJ
range of Output Voltage 70% ≤ V
< VRT by external
out
resistor output voltage divider, see schematic on Figure 23
and specification of Reset Output.
V
V
in
C
in
100 nF
NCV4263−2C
OFF
ON
Figure 23. Application Schematic with Adjustable
EN
out
C
22 mF
RADJ
RO
WDI
D
GND
Reset Threshold
out
C
D
100 nF
R
RADJ1
R
RADJ2
R
RO
5.6 kW
V
DD
Microprocessor
RESET
I/O
Desired Reset Threshold is given by Equation 2.
V
RT_des
+
R
ǒ
RADJ1
R
) R
RADJ2
RADJ2
Ǔ
V
th(RADJ)
(eq. 2)
where:
V
RT_ des
R
RADJ1
V
th(RADJ)
, R
is desired Reset Threshold
are resistance of resistor divider
RADJ2
is Reset Adjust Threshold specified in
datasheet
Use R
≤ 50 kW to avoid significant Reset Threshold
RADJ2
error due to RADJ bias current.
Watchdog Operation
Watchdog Input monitors a signal from microprocessor.
This input is positive edge sensitive. The timing diagram of
watchdog function is shown in Figure 22. When watchdog
signal is not received during Watchdog Trigger Time, Reset
Output goes low for a Watchdog Input Low Time and is
periodically generated with period given by Equation 3.
Capacitance of Delay capacitor for setting the desired
Watchdog Trigger Time is given by Equation 4.
tWP+ tWL) t
ǒ
CD+
t
WTT_des
t
WTT
WTT
Ǔ
100 nF
(eq. 3)
(eq. 4)
where:
C
D
t
WTT_des
t
WTT
is capacitance of Delay capacitor
is desired Watchdog Trigger Time
is Watchdog Trigger Time specified in
datasheet
t
WL
t
WP
Thermal Considerations
is Watchdog Input Low Time
is Watchdog Input Period
As power in the NCV4263−2C increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
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11
NCV4263−2C
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV4263−2C has good thermal conductivity through
the PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV4263−2C can handle is given by:
P
D(MAX)
+
ƪ
T
J(MAX)
R
qJA
* T
ƫ
A
(eq. 5)
Since TJ is not recommended to exceed 150°C, then the
NCV4263−2C soldered on 645 mm
2
, 1 oz copper area, FR4
can dissipate up to 1.3 W in SOIC−14 package and 1.9 W in
SOIC−8 EP package, when the ambient temperature (T
25°C. See Figures 24 and 25 for R
versus PCB area. The
JA
q
) is
A
power dissipated by the NCV4263−2C can be calculated
from the following equations:
PD[ V
in
ǒ
Iq@I
out
ǒ
Ǔ
) I
Vin* V
out
out
Ǔ
(eq. 6)
or
I
out
Ǔ
(eq. 7)
Hints
V
in(MAX)
[
P
D(MAX)
)ǒV
I
out
) I
out
q
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV4263−2C
and make traces as short as possible.
160
150
140
130
120
110
100
90
80
70
, THERMAL RESISTANCE (°C/W)
JA
60
q
R
50
SOIC−14 − 1 OZ Cu
SOIC−14 − 2 OZ Cu
300600
COPPER HEAT SPREADER AREA (mm2)
7005004002001000
Figure 24. Thermal Resistance vs. PCB Copper Area
for SOIC−14
160
150
140
130
120
110
100
90
80
70
, THERMAL RESISTANCE (°C/W)
JA
60
q
R
50
SOIC−8 EP − 1 OZ Cu
SOIC−8 EP − 2 OZ Cu
300600
COPPER HEAT SPREADER AREA (mm2)
7005004002001000
Figure 25. Thermal Resistance vs. PCB Copper Area
for SOIC−8 EP
ORDERING INFORMATION
DeviceOutput VoltageMarkingPackageShipping
NCV4263−2CD250R2G5.0 VNCV4263−2C50GSOIC−14
(Pb−Free)
NCV4263−2CPD50R2G5.0 VV632C5SOIC−8 EP
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
2500 / Tape & Reel
2500 / Tape & Reel
†
www.onsemi.com
12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
14
1
SCALE 1:1
SOIC−14 NB
CASE 751A−03
ISSUE L
DATE 03 FEB 2016
14
H
M
0.25B
0.10
14X
0.58
D
M
13X
e
SOLDERING FOOTPRINT*
6.50
1
A
B
8
E
71
b
M
0.25B
S
A
C
A
A1
SEATING
C
PLANE
14X
1.18
S
1.27
PITCH
DETAIL A
h
X 45
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
A3
L
DETAIL A
M
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
XXXXX = Specific Device Code
A= Assembly Location
WL= Wafer Lot
Y= Year
WW= Work Week
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
www.onsemi.com
SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016
STYLE 1:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. NO CONNECTION
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. NO CONNECTION
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 5:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. NO CONNECTION
7. COMMON ANODE
8. COMMON CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 2:
CANCELLED
STYLE 6:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. ANODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
STYLE 3:
PIN 1. NO CONNECTION
2. ANODE
3. ANODE
4. NO CONNECTION
5. ANODE
6. NO CONNECTION
7. ANODE
8. ANODE
9. ANODE
10. NO CONNECTION
11. ANODE
12. ANODE
13. NO CONNECTION
14. COMMON CATHODE
STYLE 7:
PIN 1. ANODE/CATHODE
2. COMMON ANODE
3. COMMON CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. ANODE/CATHODE
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. COMMON CATHODE
12. COMMON ANODE
13. ANODE/CATHODE
14. ANODE/CATHODE
STYLE 4:
PIN 1. NO CONNECTION
2. CATHODE
3. CATHODE
4. NO CONNECTION
5. CATHODE
6. NO CONNECTION
7. CATHODE
8. CATHODE
9. CATHODE
10. NO CONNECTION
11. CATHODE
12. CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 8:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. ANODE/CATHODE
7. COMMON ANODE
8. COMMON ANODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. NO CONNECTION
12. ANODE/CATHODE
13. ANODE/CATHODE
14. COMMON CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
8
1
SCALE 1:1
SOIC−8 EP
CASE 751AC
ISSUE D
DATE 02 APR 2019
GENERIC
MARKING DIAGRAM*
8
XXXXX
AYWWG
G
1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
XXXXXX = Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
98AON14029D
SOIC−8 EP
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”, may
or may not be present and may be in either
location. Some products may not follow the
Generic Marking.
PAGE 1 OF 1
www.onsemi.com
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