ON Semiconductor NCV33163 Technical data

查询NCV33163供应商

NCV33163

Product Preview

2.5 A, Step−Up/Down/
Inverting Switching
Regulators

The NCV33163 series are monolithic power switching regulators
that contain the primary functions required for dc-to-dc converters.
This series is specifically designed to be incorporated in step-up,
step-down, and voltage-inverting applications with a minimum
number of external components.

These devices consist of two high gain voltage feedback
comparators, temperature compensated reference, controlled duty
cycle oscillator, driver with bootstrap capability for increased
efficiency, and a high current output switch. Protective features consist
of cycle-by-cycle current limiting, and internal thermal shutdown.
Also included is a low voltage indicator output designed to interface
with microprocessor based systems.

These devices are contained in a 16 pin dual-in-line heat tab plastic
package for improved thermal conduction.

• Output Switch Current in Excess of 2.0 A

• Operation from 2.5 V to 60 V

• Low Standby Current

• Precision 2% Reference

• Controlled Duty Cycle Oscillator

• Driver with Bootstrap Capability for Increased Efficiency

• Cycle-by-Cycle Current Limiting

• Internal Thermal Shutdown Protection

• Low Voltage Indicator Output for Direct Microprocessor Interface

• Heat Tab Power Package

• Moisture Sensitivity Level (MSL) Equals 1

• NCV Prefix, for Automotive and Other Applications Requiring Site

and Change Control

OC

Input

16

1

16

1

LVI Output

Voltage Feedback 2

Voltage Feedback 1

Timing Capacitor

Ipk Sense

http://onsemi.com

16

PDIP-16

P SUFFIX

CASE 648C

1

SO-16W
DW SUFFIX
CASE 751G

A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week

PIN CONNECTIONS

116

15

14

13

12

11

10

9

Gnd

2

3

4

5

6

V

7

CC

8

MARKING

DIAGRAMS

NCV33163P
AWLYYWW

16

NCV33163DW

AWLYYWW

1

Bootstrap Input

Switch
Emitter

Gnd

Switch Collector

Driver Collector

This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.

 Semiconductor Components Industries, LLC, 2002

November, 2002 - Rev. 0

1 Publication Order Number:

(Top View)

ORDERING INFORMATION

Device Package Shipping

NCV33163DW SO-16W 47 Units/Rail
NCV33163DWR2 SO-16W 1000 Tape &

NCV33163P PDIP-16

Reel

25 Units/Rail

NCV33163/D

NCV33163

Ipk Sense

V

Timing

Capacitor

Gnd

Voltage

Feedback 1

Voltage

Feedback 2

LVI Output

8

7

CC

6

OSC

5

I

Limit

−

+

+

Control Logic

and Thermal

4

Shutdown

+

3

VFB

2

LVI

+

1

+

−

+
+

−

+

(Bottom View)

This device contains 114 active transistors.

Figure 1. Representative Block Diagram

9

10

11

12

13

14

15

16

Driver
Collector

Switch
Collector

Gnd

Switch
Emitter

Bootstrap
Input

MAXIMUM RATINGS (Note 1)

Rating

Power Supply Voltage V
Switch Collector Voltage Range V
Switch Emitter Voltage Range V
Switch Collector to Emitter Voltage V
Switch Current (Note 2) I
Driver Collector Voltage V
Driver Collector Current I
Bootstrap Input Current Range (Note 2) I
Current Sense Input Voltage Range V
Feedback and Timing Capacitor Input Voltage Range V
Low Voltage Indicator Output Voltage Range V
Low Voltage Indicator Output Sink Current I
Thermal Characteristics

P Suffix, Dual-In-Line Case 648C

Thermal Resistance, Junction-to-Air
Thermal Resistance, Junction- to- Case (Pins 4, 5, 12, 13)

DW Suffix, Surface Mount Case 751G

Thermal Resistance, Junction-to-Air

Thermal Resistance, Junction- to- Case (Pins 4, 5, 12, 13)
Operating Junction Temperature T
Operating Ambient Temperature T
Storage Temperature Range T

Symbol Value Unit

C(switch)
E(switch)

CE(switch)

C(driver)

C(driver)

Ipk (Sense)

CC

SW

BS

in

C(LVI)

C(LVI)

R



JA

R



JC

R



JA

R



JC

J

A

stg

60 V

-1.0 to + 60 V

- 2.0 to V

C(switch)

60 V

2.5 A

-1.0 to +60 V
150 mA

-100 to +100 mA

(VCC-7.0) to (VCC+1.0) V

-1.0 to + 7.0 V

-1.0 to + 60 V
10 mA

°C/W

80
15

94
18

+150 °C

- 40 to + 115 °C

- 65 to +150 °C

V

http://onsemi.com

2

NCV33163

ELECTRICAL CHARACTERISTICS (V

T

= -40°C to +115°C.)

A

Characteristic

= 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max values

CC

Symbol Min Typ Max Unit

OSCILLATOR

Frequency

TA = 25°C
Total Variation over V

= 2.5 V to 60 V, and Temperature

CC

Charge Current I
Discharge Current I
Charge to Discharge Current Ratio I
Sawtooth Peak Voltage V
Sawtooth Valley Voltage V

f

OSC

chg

dischg

chg/Idischg

OSC(P)
OSC(V)

46
45

50

-

- 225 - A

- 25 - A

8.0 9.0 10 -

- 1.25 - V

- 0.55 - V

FEEDBACK COMPARATOR 1

Threshold Voltage

TA = 25°C
Line Regulation (V
Total Variation over Line, and Temperature

Input Bias Current (V

= 2.5 V to 60 V, TA = 25°C)

CC

= 5.05 V) I

FB1

V

th(FB1)

IB(FB1)

4.9

-

4.85

5.05

0.008

-

- 100 200 A

FEEDBACK COMPARATOR 2

Threshold Voltage

TA = 25°C
Line Regulation (V
Total Variation over Line, and Temperature

Input Bias Current (V

= 2.5 V to 60 V, TA = 25°C)

CC

= 1.25 V) I

FB2

V

th(FB2)

IB(FB2)

1.225

-

1.213

1.25

0.008

-

1.275

1.287

- 0.4 0 0.4 A

CURRENT LIMIT COMPARATOR

Threshold Voltage

= 25°C

T

A

Total Variation over V

Input Bias Current (V

= 2.5 V to 60 V, and Temperature

CC

Ipk (Sense)

= 15 V) I

V

th(Ipk Sense)

IB(sense)

-

230

250

-

- 1.0 20 A

DRIVER AND OUTPUT SWITCH (Note 3)

Sink Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded)

Non-Darlington Connection (R
Darlington Connection (Pins 9, 10, 11 connected)

= 110  to VCC, ISW/I

Pin 9

DRV

≈ 20)

Collector Off-State Leakage Current (VCE = 60 V) I
Bootstrap Input Current Source (VBS = VCC + 5.0 V) I
Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) V

V

CE(sat)

C(off)

source(DRV)

Z

-

-

0.6

1.0

- 0.02 100 A

0.5 2.0 4.0 mA

VCC + 6.0 VCC + 7.0 VCC + 9.0 V

LOW VOLTAGE INDICATOR

Input Threshold (V
Input Hysteresis (V
Output Sink Saturation Voltage (I
Output Off-State Leakage Current (VOH = 15 V) I

Increasing) V

FB2

Decreasing) V

FB2

= 2.0 mA) V

sink

th
H

OL(LVI)

OH

1.07 1.125 1.18 V

- 15 - mV

- 0.15 0.4 V

- 0.01 5.0 A

TOTAL DEVICE

Standby Supply Current (V

Pins 6, 14, 15 = Gnd, remaining pins open)

= 2.5 V to 60 V, Pin 8 = VCC,

CC

I

CC

- 6.0 10 mA

1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 1500 V per MIL-STD-883, Method 3015.
Machine Model Method 150 V.

2. Maximum package power dissipation limits must be observed.

3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

54
55

5.2

0.03

5.25

0.03

-

270

1.0

1.4

kHz

V

%/V

V

V

%/V

V

mV

V

http://onsemi.com

3

NCV33163

100

= 15 V

V

CC

T

= 25°C

A

1)t

, R

= ∞

on

DT

2)ton, RDT = 20 k

3)ton, t

4)t

off

5)t

off

10

, RDT = 10 k

off

, RDT = 20 k
, R

= ∞

DT

1

2

3
4

, OUTPUT SWITCH ON−OFF TIME ( s)t

off

−t µ

1.0

on

0.1
C

, OSCILLATOR TIMING CAPACITOR (nF)

T

5

1.0 10

Figure 2. Output Switch On-Off Time

versus Oscillator Timing Capacitor

140

120

100

80

, INPUT BIAS CURRENT (A)µ

IB

I

60

−55

−25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 4. Feedback Comparator 1 Input Bias

Current versus Temperature

VCC = 15 V
V

= 5.05 V

FB1

2.0

0

−2.0

−4.0

, OSCILLATOR FREQUENCY CHANGE (%)∆

−6.0

−55

OSC

f

1300

1280

1260

1240

1220

1200

, COMPARATOR 2 THRESHOLD VOLTAGE (mV)

−55

th(FB2)

V

VCC = 15 V
CT = 620 pF

−25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 3. Oscillator Frequency Change

versus Temperature

VCC = 15 V

−25 0 25 50 75 100
T

, AMBIENT TEMPERATURE (°C)

A

Vth Max = 1275 mV

Vth Typ = 1250 mV

Vth Min = 1225 mV

Figure 5. Feedback Comparator 2 Threshold

Voltage versus Temperature

125

2.8

VCC = 15 V
Pin 16 = VCC + 5.0 V

2.4

2.0

1.6

, BOOTSTRAP INPUT CURRENT SOURCE (mA)

1.2

−55 −25 0 25 50 75 100 125
T

, AMBIENT TEMPERATURE (°C)

source (DRV)

I

A

Figure 6. Bootstrap Input Current

Source versus T emperature

http://onsemi.com

4

7.6

IZ = 25 mA

7.4

7.2

7.0

6.8

−55 −25 0 25 50 75 100

, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (V)

Z

V

T

, AMBIENT TEMPERATURE (°C)

A

Figure 7. Bootstrap Input Zener Clamp

Voltage versus Temperature

125

NCV33163

V

THRESHOLD

VOLTAGE

(

V)

V

EMITTER

VOLTAGE

(V)

0

Darlington Configuration
Emitter Sourcing Current to Gnd
Pins 7, 8, 10, 11 = V
Pins 4, 5, 12, 13 = Gnd
T

= 25°C, (Note 2)

A

CC

−0.4

−0.8

Bootstrapped, Pin 16 = VCC + 5.0 V

−1.2

V

CC

, SOURCE SATURATION (V)

−1.6

CE (sat)

V

Non−Bootstrapped, Pin 16 = V

−2.0
0 0.8 2.4 3.2

, EMITTER CURRENT (A)

I

E

CC

1.6

Figure 8. Output Switch Source Saturation

versus Emitter Current

0

Gnd

−0.4

IC = 10 A

−0.8

−1.2

,

E

−1.6

IC = 10 mA

VCC = 15 V
Pins 7, 8, 9, 10, 16 = V
Pins 4, 6 = Gnd
Pin 14 Driven Negative

−2.0

−55 −25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 10. Output Switch Negative Emitter

Voltage versus Temperature

1.2

Darlington, Pins 9, 10, 11 Connected

1.0

0.8

Grounded Emitter Configuration
Collector Sinking Current From V

0.6
Pins 7, 8 = VCC = 15 V

, SINK SATURATION (V)

CE (sat)

V

Pins 4, 5, 12, 13, 14, 15 = Gnd

0.4
T

= 25°C, (Note 2)

A

0.2

0

0 0.8 2.4 3.21.6

, COLLECTOR CURRENT (A)

I

C

CC

Saturated Switch, R

Gnd

= 110  to V

Pin9

CC

Figure 9. Output Switch Sink Saturation

versus Collector Current

0.5

VCC=5 V
T

=25°C

A

0.4

0.3

0.2

CC

0.1

, OUTPUT SATURATION VOLTAGE (V)

0

OL (LVI)

0 2.0 4.0 6.0 8.0

V

I

, OUTPUT SINK CURRENT (mA)

sink

Figure 11. Low Voltage Indicator Output Sink

Saturation Voltage versus Sink Current

254

m

VCC = 15 V

252

250

,

248

th (Ipk Sense)

246

−55 −25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 12. Current Limit Comparator Threshold

Voltage versus Temperature

1.6

µ

1.4

1.2

1.0

INPUT BIAS CURRENT ( A)
,

0.8

IB (Sense)

I

0.6

http://onsemi.com

5

VCC = 15 V
V

Ipk (Sense)

= 15 V

−55 −25 0 25 50 75 100 125
T

, AMBIENT TEMPERATURE (°C)

A

Figure 13. Current Limit Comparator Input Bias

Current versus Temperature

NCV33163

ÎÎ

ÎÎ

ÎÎÎ

ÎÎÎ

ÎÎ

ÎÎ

8.0

6.0

4.0

, SUPPLY CURRENT (mA)

2.0

CC

I

0

0 10203040

V

, SUPPLY VOLTAGE (V)

CC

Pins 7, 8, 16 = V
Pins 4, 6, 14 = Gnd
Remaining Pins Open
T

= 25°C

A

Figure 14. Standby Supply Current

versus Supply V oltage

3.0

2.6

2.2

1.8

Pin 16 Open

Pin 16 = V

CC

1.4

, MINIMUM OPERATING SUPPLY VOLTAGE (V)

1.0

−55 −25 0 25 50 75 100 125

T

, AMBIENT TEMPERATURE (°C)

CC(min)

V

Figure 16. Minimum Operating Supply

A

CT = 620 pF
Pins 7,8 = V
Pins 4, 14 = Gnd

CC

Pin 9 = 1.0 k to 15 V
Pin 10 = 100  to 15 V

Voltage versus Temperature

7.2
VCC = 15 V

6.4

Pins 7, 8, 16 = V
Pins 4, 6, 14 = Gnd
Remaining Pins Open

CC

5.6

CC

, SUPPLY CURRENT (mA)

4.8

CC

I

4.0

−55 −25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 15. Standby Supply Current

versus Temperature

JAθ

R , THERMAL RESISTANCE

100

80

R



60

JA

Printed circuit board heatsink example

2.0 oz

L

Copper

L

Graphs represent symmetrical layout

40

P

for T

20

JUNCTION−TO−AIR ( C/W)°

0

0

D(max)

10 20 30 40 50

= 70°C

A

L, LENGTH OF COPPER (mm)

3.0 mm

5.0

4.0

3.0

2.0

1.0

0

, MAXIMUM POWER DISSIPATION (W)

D

P

Figure 17. P Suffix (DIP-16) Thermal Resistance

and Maximum Power Dissipation

versus P.C.B. Copper Length

100

P

for T

2.0 oz.

Copper

= 50°C

A

3.0 mmL

JAθ

R , THERMAL RESISTANCE

90

80

70

60

50

JUNCTION−TO−AIR ( C/W)°

40

30

02030504010

D(max)

Graph represents symmetrical layout

L

R



JA

L, LENGTH OF COPPER (mm)

Figure 18. DW Suffix (SOP-16L) Thermal Resistance and

Maximum Power Dissipation versus P.C.B. Copper Length

http://onsemi.com

6

2.8

2.4

2.0

1.6

1.2

0.8

0.4

0

, MAXIMUM POWER DISSIPATION (W)

D

P

NCV33163

V

CC

Timing Capacitor

Shutdown

Voltage Feedback 1

Voltage Feedback 2

Comparator Output

1.25 V

Timing Capacitor C

0.55 V

Oscillator Output

Output Switch

Nominal Output

Voltage Level

I

pk Sense

R

LVI Output

1

0

T

1

0

On

Off

−

+

+

Thermal

Current

Limit

+

R

S

Latch

Q

Q

60

0.25 V

8

SC

7

+

6

C

T

R

DT

Gnd

Oscillator

5

4

3

45 k

Feedback

2

1

LVI

+
+

Comparator

−

+

+

2.0 mA

7.0 V

+
+

−

15 k1.25 V

+

1.125 V

(Bottom View)

Figure 19. Representative Block Diagram

t

9t

9

Driver Collector

10

Switch Collector

11

1

Q

2

12

Gnd

13

14

Switch Emitter

15

16

Bootstrap Input

+

−

Sink Only

=

Positive True Logic

Output Voltage

Startup Quiescent Operation

Figure 20. Typical Operating Waveforms

http://onsemi.com

7

NCV33163

INTRODUCTION

The NCV33163 series are monolithic power switching
regulators optimized for dc-to-dc converter applications.
The combination of features in this series enables the system
designer to directly implement step-up, step-down, and
voltage-inverting converters with a minimum number of
external components. Potential applications include cost
sensitive consumer products as well as equipment for the
automotive, computer, and industrial markets. A
Representative Block Diagram is shown in Figure 19.

OPERATING DESCRIPTION

The NCV33163 operates as a fixed on-time, variable
off-time voltage mode ripple regulator. In general, this
mode of operation is somewhat analogous to a capacitor
charge pump and does not require dominant pole loop
compensation for converter stability. The Typical Operating
Waveforms are shown in Figure 20. The output voltage
waveform shown is for a step-down converter with the
ripple and phasing exaggerated for clarity. During initial
converter startup, the feedback comparator senses that the
output voltage level is below nominal. This causes the
output switch to turn on and off at a frequency and duty cycle
controlled by the oscillator , thus pumping up the output filter
capacitor. When the output voltage level reaches nominal,
the feedback comparator sets the latch, immediately
terminating switch conduction. The feedback comparator
will inhibit the switch until the load current causes the output
voltage to fall below nominal. Under these conditions,
output switch conduction can be inhibited for a partial
oscillator cycle, a partial cycle plus a complete cycle,
multiple cycles, or a partial cycle plus multiple cycles.

Oscillator

The oscillator frequency and on-time of the output switch
are programmed by the value selected for timing capacitor
CT. Capacitor CT is charged and discharged by a 9 to 1 ratio
internal current source and sink, generating a negative going
sawtooth waveform at Pin 6. As CT charges, an internal
pulse is generated at the oscillator output. This pulse is
connected to the NOR gate center input, preventing output
switch conduction, and to the AND gate upper input,
allowing the l a t c h to be re s e t i f the comparator output is low.
Thus, the output switch is always disabled during ramp-up
and can be enabled by the comparator output only at the start
of ramp-down. The oscillator peak and valley thresholds are

1.25 V and 0.55 V, respectively, with a charge current of
225A and a discharge current of 25 A, yielding a
maximum on-time duty cycle of 90%. A reduction of the
maximum duty cycle may be required for specific converter
configurations. This can be accomplished with the addition

of an external deadtime resistor (R

) placed across CT. The

DT

resistor increases the discharge current which reduces the
on-time of the output switch. A graph of the Output Switch
On-Off Time versus Oscillator Timing Capacitance for
various values of RDT is shown in Figure 2. Note that the
maximum output duty cycle, t

on/ton

+ t

, remains constant

off

for values of CT greater than 0.2 nF. The converter output
can be inhibited by clamping CT to ground with an external
NPN small-signal transistor.

Feedback and Low Voltage Indicator Comparators

Output voltage control is established by the Feedback
comparator. T he i nverting i nput i s i nternally b iased a t 1 .25 V
and is not pinned out. The converter output voltage is
typically divided down with two external resistors and
monitored by t he h igh im pedance n oninverting i nput a t Pin 2.
The maximum i nput b ias c urrent i s ±0.4 A, w hich c an c ause
an output v oltage e rror t hat i s e qual t o t he p roduct o f t he i nput
bias current and the upper divider resistance value. For
applications that require 5.0 V, the converter output can be
directly connected t o t he n oninverting i nput a t P in 3 . T he h igh
impedance input, Pin 2, must be grounded to prevent noise
pickup. The internal resistor divider is set for a nominal
voltage of 5.05 V. The additional 50 mV compensates for a

1.0% voltage drop in the cable and connector from the
converter output to the load. The Feedback comparator’s
output state is controlled by the highest voltage applied to
either of the two noninverting inputs.

The Low Voltage Indicator (LVI) comparator is designed
for use as a reset controller in microprocessor-based
systems. The inverting input is internally biased at 1.125 V,
which sets the noninverting input thresholds to 90% of
nominal. The LVI comparator has 15 mV of hysteresis to
prevent erratic reset operation. The Open Collector output is
capable of sinking in excess of 6.0 mA (see Figure 11). An
external resistor (R
program a reset delay time (t
below, where V

) and capacitor (C

LVI

DLY

is the microprocessor reset input

th(MPU)

DLY

) by the formula shown

) can be used to

threshold. Refer to Figure 21.

1

V

t

= R

DLY

Current Limit Comparator, Latch and Thermal
Shutdown

LVI CDLY

In

1 -

th(MPU)



V

out

With a voltage mode ripple converter operating under
normal conditions, output switch conduction is initiated by
the oscillator and terminated by the Voltage Feedback
comparator. Abnormal operating conditions occur when the
converter output is overloaded or when feedback voltage
sensing is lost. Under these conditions, the Current Limit
comparator will protect the Output Switch.

http://onsemi.com

8

NCV33163

The switch current is converted to a voltage by inserting
a fractional ohm resistor, RSC, in series with VCC and output
switch transistor Q2. The voltage drop across RSC is
monitored by the Current Sense comparator. If the voltage
drop exceeds 250 mV with respect to VCC, the comparator
will set the latch and terminate output switch conduction on
a cycle-by-cycle basis. This Comparator/Latch
configuration ensures that the Output Switch has only a
single on-time during a given oscillator cycle. The
calculation for a value of R

R

SC

is:

SC

0.25 V



Ipk(Switch)

Figures 12 and 13 show that the Current Sense comparator
threshold is tightly controlled over temperature and has a
typical input bias current of 1.0 A. The propagation delay
from the comparator input to the Output Switch is typically
200 ns. The parasitic inductance associated with R

and the

SC

circuit layout should be minimized. This will prevent
unwanted voltage spikes that may falsely trip the Current
Limit comparator.

Internal thermal shutdown circuitry is provided to protect
the IC in the event that the maximum junction temperature
is exceeded. When activated, typically at 170°C, the Latch
is forced into the “Set” state, disabling the Output Switch.
This feature is provided to prevent catastrophic failures from
accidental device overheating. It is not intended to be used
as a replacement for proper heatsinking.

Driver and Output Switch

To aid in system design flexibility and conversion
efficiency, the driver current source and collector, and
output switch collector and emitter are pinned out
separately. This allows the designer the option of driving the
output switch into saturation with a selected force gain or
driving it near saturation when connected as a Darlington.
The output switch is designed to switch a maximum of 60 V
collector to emitter, with up to 2.5 A peak collector current.
The minimum value for R

R

SC(min)



is:

SC

0.25 V

2.5 A

 0.100 

When configured for step-down or voltage-inverting
applications, as in Figures 21 and 25, the inductor will
forward bias the output rectifier when the switch turns off.
Rectifiers with a high forward voltage drop or long turn-on
delay time should not be used. If the emitter is allowed to go
sufficiently negative, collector current will flow, causing

additional device heating and reduced conversion
efficiency.

Figure 10 shows that by clamping the emitter to 0.5 V, the
collector current will be in the range 10 A over
temperature. A 1N5822 or equivalent Schottky barrier
rectifier is recommended to fulfill these requirements.

A bootstrap input is provided to reduce the output switch
saturation voltage in step-down and voltage-inverting
converter applications. This input is connected through a
series resistor and capacitor to the switch emitter and is used
to raise the internal 2.0 mA bias current source above V
An internal zener limits the bootstrap input voltage to V

CC

CC

+7.0 V. The capacitor’s equivalent series resistance must
limit the zener current to less than 100 mA. An additional
series resistor may be required when using tantalum or other
low ESR capacitors. The equation below is used to calculate
a minimum value bootstrap capacitor based on a minimum
zener voltage and an upper limit current source.

C

B(min)

 I

t

 4.0 mA

V

t

on

4.0 V

 0.001 t

on

Parametric operation of the NCV33163 is guaranteed
over a supply voltage range of 2.5 V to 40 V. When operating
below 3.0 V, the Bootstrap Input should be connected to
V

. Figure 16 shows that functional operation down to

CC

1.7 V at room temperature is possible.

Package

The NCV33163 is contained in a heat-sinkable 16-lead
plastic dual-in-line package in which the die is mounted on
a special heat tab copper alloy lead frame. This tab consists
of the four center ground pins that are specifically designed
to improve thermal conduction from the die to the circuit
board. Figures 17 and 18 show a simple and effective
method of utilizing the printed circuit board medium as a
heat dissipater by soldering these pins to an adequate area of
copper foil. This permits the use of standard layout and
mounting practices while having the ability to halve the
junction-to-air thermal resistance. These examples are for
a symmetrical layout on a single-sided board with two
ounce per square foot of copper.

APPLICATIONS

The following converter applications show the simplicity
and flexibility of this circuit architecture. Three main
converter topologies are demonstrated with actual test data
shown below each of the circuit diagrams.

.

http://onsemi.com

9

NCV33163

p

(

)

−

+

+

Thermal

Current

Limit

9

10

11

Q

1

Q

R

Q

S

Latch

+

2

12

60

13

14

V

12 V

0.25 V

R

0.075

in

330

680 pF

8

SC

7

+

6

+

Oscillator

C

in

C

T

5

4

3

45 k

+

Low Voltage

Indicator Output

R
10 k

C

2

LVI

1

DLY

LVI

+

+
+

−

+

−

+

1.125 V

Feedback
Comparator

15 k1.25 V

+

2.0 mA

7.0 V

1N5822

15

0.02

16

R

C

B

B

(Bottom View)

Test Condition Results

Line Regulation Vin = 8.0 V to 24 V, IO = 3.0 A 6.0 mV = ±0.06%
Load Regulation Vin = 12 V, IO = 0.6 A to 3.0 A 2.0 mV = ±0.02%
Output Ripple V
Short Circuit Current V
Efficiency, Without Bootstrap V
Efficiency, With Bootstrap V

= 12 V, IO = 3.0 A 36 mVpp

in

= 12 V, RL = 0.1  3.3 A

in

= 12 V, IO = 3.0 A 76.7%

in

= 12 V, IO = 3.0 A 81.2%

in

2200

180 H

L

Coilcraft LO451−A

+

C

O

V

out

5.05 V/3.0 A

Figure 21. Step-Down Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q

3

15

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

16

(Bottom View)

Figure 22A. External NPN Switch Figure 22B. External PNP Saturated Switch

Figure 22. External Current Boost Connections for I

k

Greater Than 2.5 A

Switch

Q

3

http://onsemi.com

10

NCV33163

p

(

)

180 H

V

12 V

in

R

SC

0.075

C

330

680 pF

−

+

+

Thermal

Current

Limit

9

10

11

Q

1

Q

R

Q

S

Latch

+

2

12

60

13

0.25 V

8

7

+

6

+

Oscillator

in

C

T

5

4

Coilcraft

L

LO451−A

1N5822

3

14

45 k

+
+

−

+

1.125 V

(Bottom View)

Feedback
Comparator

15 k1.25 V

+

2.0 mA

7.0 V

15

16

V

+

C

O

330

out

28 V/600 mA

Low Voltage

Indicator

Output

2.2 k

2

1

R

LVI

1.0 k

R

1

R

47 k

2

LVI

+

+
+

−

Test Condition Results

Line Regulation Vin = 9.0 V to 16 V, IO = 0.6 A 30 mV = ±0.05%
Load Regulation Vin = 12 V, IO = 0.1 A to 0.6 A 50 mV = ±0.09%
Output Ripple V
Efficiency V

= 12 V, IO = 0.6 A 140 mVpp

in

= 12 V, IO = 0.6 A 88.1%

in

Figure 23. Step-Up Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q

3

15

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q3

15

16

(Bottom View)

Figure 24A. External NPN Switch Figure 24B. External PNP Saturated Switch

Figure 24. External Current Boost Connections for I

k

Greater Than 2.5 A

Switch

http://onsemi.com

11

NCV33163

p

(

)

+

Thermal

+

+
+

−

−
+

45 k

+

1.125 V

+
+

−

Current

Limit

+

Feedback
Comparator

15 k1.25 V

(Bottom View)

R

S

Latch

9

10

11

Q

1

Q

2

Q

12

60

13

Coilcraft LO451−A

14

L

180 H

+

2.0 mA

7.0 V

15

0.02

16

1N5822

2200

R

B

C

B

V

out

C

O

+

−12 V/1.0 A

V

in

12 V

470 pF

0.25 V

R

0.075

330

C

T

8

SC

7

+

6

+

Oscillator

C

in

5

4

3

2

1

LVI

R

2

R

953

1

8.2 k

Test Condition Results

Line Regulation Vin = 9.0 V to 16 V, IO = 1.0 A 5.0 mV = ±0.02%
Load Regulation Vin = 12 V, IO = 0.6 A to 1.0 A 2.0 mV = ±0.01%
Output Ripple V
Short Circuit Current V
Efficiency, Without Bootstrap V
Efficiency, With Bootstrap V

= 12 V, IO = 1.0 A 130 mVpp

in

= 12 V, RL = 0.1  3.2 A

in

= 12 V, IO = 1.0 A 73.1%

in

= 12 V, I

in

= 1.0 A 77.5%

O

Figure 25. Voltage-Inverting Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

Q

3

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

16

(Bottom View)

Figure 26A. External NPN Switch Figure 26B. External PNP Saturated Switch

Figure 26. External Current Boost Connections for I

k

Greater Than 2.5 A

Switch

Q

3

http://onsemi.com

12

NCV33163

Calculation Step-Down Step-Up Voltage-Inverting

|V

t

on

t

(Notes 1, 2, 3)

off

V

out

Vin V

 V

sat

F

 V

out

V

out

 VF–V

Vin–V

in

sat

|  V

out

Vin V

sat

F

t

on

t

t

on

C

T

I

L(avg)

I

pk (Switch)

R

SC

Vin V

L

V

ripple(pp)

V

out

The following Converter Characteristics must be chosen:



I

L

t

on



ƒ

t

off

32.143 · 10

I

L(avg)

I

pk (Switch)

sat

I

1





ƒ

8C

O



V

ref

off

 1

ƒ

I

out



0.25

 V

L

2

 (ESR)

R

2

R

1

–6

I

 1



L

2

out

t

on

2



t



ƒ

t

32.143 · 10



I

out

I

L(avg)

I

pk (Switch)

Vin V



I





V

ref

t
t

on
off

ƒ

t

on

t

off

0.25

L

tonI

C

R

2

R

1

on
off



 1

 1

sat

out

O

 1

–6

I

2

t

t

on

t

off

t

on





L

on





ƒ

32.143 · 10



I

out

I

L(avg)

I

pk (Switch)

Vin V



I





V

ref

t

off

ƒ

t

on

t

off

0.25

L

tonI

R

2

R

1



C

 1

 1

sat

out

O

 1

–6

I

t





L

2

on



Nominal operating input voltage.

Vin -

Desired output voltage.

V

-

out

Desired output current.

-

I

out

Desired peak-to-peak inductor ripple current. For maximum output current it is suggested that

I

-

L

than 10% of the average inductor current I
threshold set by R
proportionally reduce converter output current capability.
Maximum output switch frequency.

 -

V

ripple(pp)

NOTES: 1. V

NOTES: 2. V
NOTES: 3. The calculated t
NOTES: 3. operating input voltage.

Desired peak-to-peak output ripple voltage. For best performance the ripple voltage should be kept to a low value

­since it will directly affect line and load regulation. Capacitor C
electrolytic designed for switching regulator applications.

- Saturation voltage of the output switch, refer to Figures 8 and 9.

sat

- Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V.

F

must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum

on/toff

. This will help prevent I

. If the design goal is to use a minimum inductance value, let IL = 2(I

SC

L(avg)

O

Figure 27. Design Equations

pk (Switch)

should be a low equivalent series resistance (ESR)

from reaching the current limit

I

be chosen to be less

L

). This will

L(avg)

http://onsemi.com

13

NCV33163

PACKAGE DIMENSIONS

PDIP-16

P SUFFIX

CASE 648C-04

ISSUE D

A

16 9

18

A

F

E

B

B

M

M

J

B

L

16X

0.005 (0.13) T

N

C

K

SEATING

T

PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

DIM MIN MAX MIN MAX

A 0.744 0.783 18.90 19.90
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
E 0.050 BSC 1.27 BSC
F 0.040 0.70 1.02 1.78

G 0.100 BSC 2.54 BSC

J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.300 BSC 7.62 BSC

M 0 10 0 10

N 0.015 0.040 0.39 1.01

MILLIMETERSINCHES



G

D

16X

M

0.005 (0.13) T

A

http://onsemi.com

14

NCV33163

PACKAGE DIMENSIONS

SO-16W

DW SUFFIX

CASE 751G-03

ISSUE B

16 9

M

B

H8X

M

0.25

0.25 B

14X

D

B16X

M

S

A

T

e

A



NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.

E



h X 45

81

B

S

A

L

A1

T

SEATING
PLANE

C

3. DIMENSIONS D AND E DO NOT INLCUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.

MILLIMETERS

DIM MIN MAX

A 2.35 2.65

A1 0.10 0.25

B 0.35 0.49
C 0.23 0.32
D 10.15 10.45

E 7.40 7.60
e 1.27 BSC

H 10.05 10.55

h 0.25 0.75
L 0.50 0.90

 0 7



http://onsemi.com

15

NCV33163

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make

changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

Literature Fulfillment:

Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA

Phone: [phone] or 800-344-3860 Toll Free USA/Canada
Fax: [phone] or 800-344-3867 Toll Free USA/Canada
Email: [e-mail]

N. American Technical Support: 800-282-9855 Toll Free USA/Canada

http://onsemi.com

JAPAN: ON Semiconductor, Japan Customer Focus Center

2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051

Phone: [phone]
Email: [e-mail]

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local
Sales Representative.

NCV33163/D

16