ON Semiconductor NCP51810 User Manual

NCP51810 HB GaN Driver Evaluation Board User'sManual

NCP51810 High−Speed, Half−Bridge, GaN Driver Evaluation Board for Existing or New PCB Designs

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INTRODUCTION

Purpose

The NCP51810 HB GaN Driver Evaluation Board (EVB) is intended to replace the driver and power MOSFETs used in existing half−bridge or full−bridge power supplies. This EVB highlights the performance, simplicity and minimal number of components required to efficiently and reliably drive two gallium nitride power switches used in a mid−voltage, totem pole configuration. Intended applications include off−line power converter topologies such as: phase−shifted full−bridge, active clamp flyback and forward, dual active−bridge, and voltage synchronous buck. This document describes mating techniques for the NCP51810 HB GaN Driver EVB.

NCP51810 GaN Driver Description

The NCP51810 high−speed, gate driver is designed to meet the stringent requirements of driving enhancement mode (E−mode), high electron mobility transistor (HEMT) and gate injection transistor (GIT) HEMT, gallium nitride (GaN) power switches in half−bridge power topologies. The NCP51810 offers short and matched propagation delays with advanced level shift technology providing

−3.5 V to +100 V (typical) common mode voltage range for the high−side drive and −3.5 V to +3.5 V common mode voltage range for the low−side drive. In addition, the device provides stable and reliable operation when used in high dV/dt environments up to 200 V/ns. In order to fully protect the gates of the GaN power switches against excessive voltage, both NCP51810 drive stages employ separate, dedicated voltage regulators to accurately maintain the gate−source drive signal amplitude. The circuit offers active clamping of the driver’s bias rails thus protecting against potential gate−source over−voltage under various operating conditions.

The NCP51810 offers important protection functions such as independent under−voltage lockout (UVLO), monitoring V voltage, VDDH and VDDL driver bias and thermal shutdown based on die junction temperature of the device. As shown in Figure 2, the Schmitt trigger, EN, HIN and LIN inputs are internally pulled LOW to assure the driver is always in a default ‘OFF’ state during initial application of V by the DT pin and can be configured to prevent or allow cross−conduction.

bias. Programmable dead−time control is available

bias

EVAL BOARD USER’S MANUAL

Figure 1. Evaluation Board Photo

October, 2020 − Rev. 0

1 Publication Order Number:

EVBUM2762/D

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The NCP51810 can be considered as having two independent high−side and low−side “floating” drive stages. The high−side can float up to 100 V referenced to SW and the low−side can float up to 3.5 V referenced to PGND, making it well suited for applications where the driver has to float above a low−side current sense resistor as described in “Connection Method #2

VBST

VDD

HIN

LIN

SGND

” section. Each drive stage

VDD

UVLO

8.5V/8V

(ON/OFF)

SCHMITT

TRIGGER INPUT

SHOOT THOUGH

PREVENTION

CYCLE−By−

CYCLE EDGE

TRIGGERED SHUTDOWN

DEAD−TIME

MODE CONTROL

LEVEL SHIFTER

includes dedicated input level shifting to ensure accurately matched propagation delays to within 5 ns. Each output includes separate source and sink allowing rise and fall times to be set independently with a single resistor, eliminating additional, discrete circuitry often required for high−speed turn−off.

VDDH

VBST UVLO

VDDL

REGULATOR

VDDL UVLO

DELAY

REGULATOR

VDDH UVLO

DRIVER

VDDH

HOSRC

HOSNK

VDDL

LOSRC

LOSNK

PGND

Figure 2. NCP51810, Functional Block Diagram

NCP51810 HB GaN Driver EVB Description

The NCP51810 HB GaN Driver EVB is designed using an 1880 mil x 1310 mil, four−layer printed circuit board (PCB) and includes the NCP51810 GaN driver, two E−mode GaN power switches connected in a high−side, low−side configuration and all necessary drive circuitry. The EVB does not include a PWM controller, and is generic from the point of view that it is not dedicated to any one topology, and can be used in any topology that requires the use of a high−side/low−side FET combination. The EVB can be connected into an existing power supply, and will replace the HS/LS driver and MOSFETs. The EVB has preset, but configurable dead−time control and driver enable/disable. The GaN power switches are rated up to 100 V, 90 A, making them well suited for half−bridge topologies operating from an output in the range of 100 V. However, due to R

DS(ON)

temperature dependence, the maximum, practical case

temperature should not exceed ~90°C (90°C = 1.6 x R

, normalized at 25°C). The EVB has only 27

DS(ON)

components and its small size allows it to be installed in tight areas. Even with the small size, several pins are available to probe the circuit. HS and LS gate drives, as well as SWN are accessible. Note: In half−bridge operation, the HS gate drive can only be probed with a high−voltage differential probe on the Hi−Side Gate Drive (HSGD) pin and the Hi−Side Gate Return (HSGR) pin. The LS gate drive has two plated holes for a tip−and−barrel probe measurement (LSGD). The plated hole closest to the NCP51810 is probe GND, as shown in Figure 3. A tip−and−barrel measurement is performed by removing the “hat” from a passive probe and using the probe “pin” for the measurement and a spring pin fit on the GND barrel of the probe for ground. Figure 4 shows the typical tip−and−barrel measurement method for LSGD using a LeCroy passive probe and GND spring.

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Figure 3. NCP51810 HB GaN Driver EVB

Figure 4. Tip−and−Barrel Measurement Method

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NCP51810 EVB Schematic

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Figure 5. NCP51810 EVB Schematic

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