The NCP302155 integrates a MOSFET driver, high−side MOSFET
and low−side MOSFET into a single package.
The driver and MOSFETs have been optimized for high−current
DC−DC buck power conversion applications. The NCP302155
integrated solution greatly reduces package parasitics and board space
compared to a discrete component solution.
Features
• Capable of Average Currents up to 55 A
• Capable of Switching at Frequencies up to 2 MHz
• Compatible with 3.3 V or 5 V PWM Input
• Responds Properly to 3−level PWM Inputs
• Option for Zero Cross Detection with 3−level PWM
• Internal Bootstrap Diode
• Undervoltage Lockout
• Supports Intel® Power State 4
• Thermal Warning output
• Thermal Shutdown
Applications
• Notebook, Tablet PC and Ultrabook
• Servers and Workstations, V−Core and Non−V−Core DC−DC
Converters
• Desktop and All−in−One Computers, V−Core and Non−V−Core
DC−DC Converters
• High−Current DC−DC Point−of−Load Converters
• Small Form−Factor Voltage Regulator Modules
5V
VCCD
VCCVIN
Zero Current
Detect Enable
DRVON from controller
PWM from controller
SMOD from controller
ZCD_EN
DISB#
PWM
SMOD#
CGNDPGND
THWN
BOOT
VSW
VOUT
PGND
PGND
PGND
PGND
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PQFN31 5X5, 0.5P
CASE 483BR
MARKING DIAGRAM
NCP
302155
AWLYYWW
Pin1
A= Assembly Location
WL= Wafer Lot
YY= Year
WW = Work Week
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1Publication Order Number:
NCP302155/D
†
Reel
VCCD
VCC
SMOD#
PWM
DISB#
THWN
AGND
CGND
NCP302155
29
3
UVLO
VCC
2
1
31
30
32
4
ZCD
CONTROL
DEAD
TIME
CONTROL
LEVEL
SHIFT
LEVEL
SHIF
SHUTDOWN
WARNING
TEMP
SENSE
Figure 2. Block Diagram
8−11
16−26
12−15
27
33
5
7
28
BOOT
VIN
VSW
PHASE
PGND
PGND
GL
GL
Table 1. PIN LIST AND DESCRIPTION
Pin No.SymbolDescription
1PWMPWM Control Input and Zero Current Detection Enable
2SMOD#Skip Mode pin. 3−state input (see Table 6):
SMOD# = High ³ State of PWM determine whether the NCP302155 performs ZCD or not.
SMOD# = Mid ³ Connects PWM to internal resistor divider placing a bias voltage on PWM pin.
Otherwise, logic is equivalent to SMOD# in the high state.
SMOD# = Low ³ Placing PWM into mid−state pulls GH and GL low without delay.
There is an internal pull−up resistor to VCC on this pin.
3VCCControl Power Supply Input
4, 32CGND, AGNDSignal Ground (pin 4 and pad 32 are internally connected)
5BOOTBootstrap Voltage
6ncOpen pin (not used)
7PHASEBootstrap Capacitor Return
8−11VINConversion Supply Power Input
12−15, 28PGNDPower Ground
16−26VSWSwitch Node Output
27, 33GLLow Side FET Gate Access (pin 27 and pad 33 are internally connected)
29VCCDDriver Power Supply Input
30THWNThermal warning indicator. This is an open−drain output. When the temperature at the driver die
31DISB#Output disable pin. When this pin is pulled to a logic high level, the driver is enabled. There is an
reaches T
, this pin is pulled low.
THWN
internal pull−down resistor on this pin.
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NCP302155
Table 2. ABSOLUTE MAXIMUM RATINGS (Electrical Information − all signals referenced to PGND unless noted otherwise)
Pin Name / Parameter
VCC, VCCD−0.36.5V
VIN−0.330V
BOOT (DC)−0.335V
BOOT (< 20 ns)−0.340V
BOOT to PHASE (DC)−0.36.5V
VSW, PHASE (DC)−0.330V
VSW, PHASE (< 20 ns)−535V
PHASE (< 5 ns)−1535V
All Other Pins−0.3V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. THERMAL INFORMATION
RatingSymbolValueUnit
Thermal Resistance (under On Semi SPS Thermal Board)
Operating Junction Temperature Range (Note 1)T
Operating Ambient Temperature RangeT
Maximum Storage Temperature RangeT
Maximum Power Dissipation10.5W
Moisture Sensitivity LevelMSL1
1. The maximum package power dissipation must be observed.
2. JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM
3. JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM
MinMaxUnit
+ 0.3V
VCC
q
q
J−PCB
JA
J
A
STG
12.4
1.8
−40 to +150
−40 to +125
−55 to +150
_C/W
_C/W
_C
_C
_C
Table 4. RECOMMENDED OPERATING CONDITIONS
ParameterPin NameConditionsMinTypMaxUnit
Supply Voltage RangeVCC, VCCD4.55.05.5V
Conversion VoltageVIN4.51924V
Continuous Output Current
Peak Output Current
FSW = 1 MHz, VIN = 12 V, V
FSW = 300 kHz, VIN = 12 V, V
Duration = 5 ms, Period = 10 ms
= 1.0 V, TA = 25_C
OUT
= 1.0 V, TA = 25_C
OUT
Junction Temperature−40125
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
55A
60A
85A
_C
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3
NCP302155
Table 5. ELECTRICAL CHARACTERISTICS
(V
= V
VCC
temperature range −40°C ≤ T
VCC SUPPLY CURRENT
Operating
No switchingDISB# = 5 V, PWM = 0 V−−2mA
Disabled
UVLO Start ThresholdV
UVLO Hysteresis150−−mV
VCCD SUPPLY CURRENT
Enabled, No switching
DisabledDISB# = 0 V−0.41
OperatingDISB# = 5 V, PWM = 400 kHz−−26mA
DISB# INPUT
Input Resistance
Upper ThresholdV
Lower ThresholdV
HysteresisV
Enable Delay TimeTime from DISB# transitioning HI
Disable Delay TimeTime from DISB# transitioning
SMOD# INPUT
SMOD# Input Voltage High
SMOD# Input Voltage Mid−stateV
SMOD# Input Voltage LowV
SMOD# Input ResistanceR
SMOD# Propagation Delay, FallingT
SMOD# Propagation Delay, RisingT
PWM INPUT
Input Voltage High
Input Mid−state VoltageV
Input Low VoltageV
Input ResistanceR
Input ResistanceR
PWM Input Bias VoltageV
Non−overlap Delay, Leading EdgeT
Non−overlap Delay, Trailing EdgeT
PWM Propagation Delay, RisingT
VCCD
= 5.0 V, V
Parameter
= 12 V, V
VIN
≤ 125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
J
DISB#
= 2.0 V, C
VCCD
= C
= 0.1 mF unless specified otherwise) Min/Max values are valid for the
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
VCCD
= 5.0 V, V
= 12 V, V
VIN
J
DISB#
≤ 125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
ParameterUnitMax.Typ.Min.ConditionsSymbol
= 2.0 V, C
PWM,PD_F
T
PWM_EXIT_L
T
PWM_EXIT_H
V
ZCD
BLNK
T
THWN
THWN_HYS
THDN
THDN_HYS
THWN
R
SOURCE_GH
SOURCE_GH
SINK_GH
SINK_GH
R
SOURCE_GL
SOURCE_GL
SINK_GH
SINK_GL
R_GL
F_GL
= C
VCCD
= 0.1 mF unless specified otherwise) Min/Max values are valid for the
VCC
PWM = Low to SW = 90%−4752ns
PWM = Mid−to−Low to GL = 10%−1425ns
PWM = Mid−to−High to SW = 10%−1325ns
−−6−mV
−330−ns
Temperature at Driver Die−150−
−15−
Temperature at Driver Die−180−
−25−
−−5mA
Forward Bias Current = 2.0 mA−380−mV
Source Current = 100 mA−0.9−
−2−A
Source Current = 100 mA−0.7−
−2.5−A
Source Current = 100 mA−0.9−
GL = 2.5 V−2−A
Sink Current = 100 mA−0.4−
GL = 2.5 V−4.5−A
GL = 10% to 90%, C
GL = 90% to 10%, C
= 3.0 nF−12−ns
LOAD
= 3.0 nF−6−ns
LOAD
_C
_C
_C
_C
W
W
W
W
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5
NCP302155
Table 6. LOGIC TABLE
INPUT TRUTH TABLE
DISB#PWMSMOD# (Note 4)GH (not a pin)GL
LXXLL
HHXHL
HLXLH
HMIDH or MIDLZCD (Note 5)
HMIDLLL (Note 6)
4. PWM input is driven to mid−state with internal divider resistors when SMOD# is driven to mid−state and PWM input is undriven externally.
5. GL goes low following 80 ns de−bounce time, 250 ns blanking time and then SW exceeding ZCD threshold.
6. There is no delay before GL goes low.
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