ON Semiconductor NCP302150 User Manual

Integrated Driver and
MOSFET

NCP302150

The NCP302150 integrates a MOSFET driver, high−side MOSFET

and low−side MOSFET into a single package.

The driver and MOSFETs have been optimized for high−current
DC−DC buck power conversion applications. The NCP302150
integrated solution greatly reduces package parasitics and board space
compared to a discrete component solution.

Features

• Capable of Average Currents up to 50 A

• Capable of Switching at Frequencies up to 2 MHz

• Compatible with 3.3 V or 5 V PWM Input

• Responds Properly to 3−level PWM Inputs

• Option for Zero Cross Detection with 3−level PWM

• Internal Bootstrap Diode

• Undervoltage Lockout

• Supports Intel® Power State 4

• Thermal Warning Output

• Thermal Shutdown

Applications

• Notebook, Tablet PC and Ultrabook

• Servers and Workstations, V−Core and Non−V−Core DC−DC

Converters

• Desktop and All−in−One Computers, V−Core and Non−V−Core

DC−DC Converters

• High−Current DC−DC Point−of−Load Converters

• Small Form−Factor Voltage Regulator Modules

5V

VCCD

VCC VIN

THWN

DRVON from controller

PWM from controller

SMOD from controller

DISB#

PWM

SMOD#

CGND PGND

BOOT

VSW

VOUT

PGND

PGND

PGND

PGND

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PQFN31 5X5, 0.5P

CASE 483BR

MARKING DIAGRAM

NCP

302150

AWLYYWW

A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week

PINOUT DIAGRAM

BOOT

nc

PHASE

VIN

8 7 6 5 4 3 2 1

9 10 11 12 13 14 15

VIN

VIN

VIN

16 17 18 19 20 21 22 23

VSW

VSW

VSW

VSW

PWM

SMOD#

VC C

CGND

DISB#

32

AGND

33
GL

VSW

VSW

VSW

THWN

VCCD

PGND

GL

VSW

VSW

VSW

24 25 26 27 28 29 30 31

VSW

Figure 1. Application Schematic

© Semiconductor Components Industries, LLC, 2018

March, 2021 − Rev. 4

ORDERING INFORMATION

Device Package Shipping

NCP302150MNTWG PQFN31

3000 / Tape & Reel

5x5

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.

1 Publication Order Number:

NCP302150/D

†

VCCD

VCC

SMOD#

PWM

DISB#

THWN

AGND

CGND

NCP302150

29

3

UVLO

VCC

2

1

31

30

32

4

ZCD

CONTROL

DEAD

TIME

CONTROL

LEVEL

SHIFT

LEVEL

SHIF

SHUTDOWN

WARNING

TEMP
SENSE

Figure 2. Block Diagram

8−11

16−26

12−15

27

33

5

7

28

BOOT

VIN

VSW

PHASE

PGND
PGND

GL

GL

Table 1. PIN LIST AND DESCRIPTION

Pin No. Symbol Description

1 PWM PWM Control Input and Zero Current Detection Enable

2 SMOD# Skip Mode pin. 3−state input (see Table 6):

SMOD# = High ³ State of PWM determine whether the NCP302150 performs ZCD or not.
SMOD# = Mid ³ Connects PWM to internal resistor divider placing a bias voltage on PWM pin.

Otherwise, logic is equivalent to SMOD# in the high state.
SMOD# = Low ³ Placing PWM into mid−state pulls GH and GL low without delay.

There is an internal pull−up resistor to VCC on this pin.

3 VCC Control Power Supply Input

4, 32 CGND, AGND Signal Ground (pin 4 and pad 32 are internally connected)

5 BOOT Bootstrap Voltage

6 nc Open pin (not used)

7 PHASE Bootstrap Capacitor Return

8−11 VIN Conversion Supply Power Input

12−15, 28 PGND Power Ground

16−26 VSW Switch Node Output

27, 33 GL Low Side FET Gate Access (pin 27 and pad 33 are internally connected)

29 VCCD Driver Power Supply Input

30 THWN

31 DISB#

Thermal warning indicator. This is an open−drain output. When the temperature at the driver die
reaches T

, this pin is pulled low.

THWN

Output disable pin. When this pin is pulled to a logic high level, the driver is enabled. There is an
internal pull−down resistor on this pin.

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NCP302150

Table 2. ABSOLUTE MAXIMUM RATINGS (Electrical Information − all signals referenced to PGND unless noted otherwise)

Pin Name / Parameter

VCC, VCCD −0.3 6.5 V

VIN −0.3 30 V

BOOT (DC) −0.3 35 V

BOOT (< 20 ns) −0.3 40 V

BOOT to PHASE (DC) −0.3 6.5 V

VSW, PHASE (DC) −0.3 30 V

VSW, PHASE (< 20 ns) −5 35 V

PHASE (< 5 ns) −15 35 V

All Other Pins −0.3 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

Table 3. THERMAL INFORMATION

Rating Symbol Value Unit

Thermal Resistance (under On Semi SPS Thermal Board)

Operating Junction Temperature Range (Note 1) T

Operating Ambient Temperature Range T

Maximum Storage Temperature Range T

Maximum Power Dissipation 10.5 W

Moisture Sensitivity Level MSL 1

1. The maximum package power dissipation must be observed.

2. JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM

3. JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM

Min Max Unit

+ 0.3 V

VCC

q

q

J−PCB

JA

J

A

STG

12.4

1.8

−40 to +150

−40 to +125

−55 to +150

_C/W

_C/W

_C

_C

_C

Table 4. RECOMMENDED OPERATING CONDITIONS

Parameter Pin Name Conditions Min Typ Max Unit

Supply Voltage Range VCC, VCCD 4.5 5.0 5.5 V

Conversion Voltage VIN 4.5 12 20 V

45 A

50 A

85 A

_C

Continuous Output Current

Peak Output Current

FSW = 1 MHz, VIN = 12 V, V

FSW = 300 kHz, VIN = 12 V, V

Duration = 5 ms, Period = 10 ms

= 1.0 V, TA = 25_C

OUT

= 1.0 V, TA = 25_C

OUT

Junction Temperature −40 125

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.

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NCP302150

Table 5. ELECTRICAL CHARACTERISTICS

(V

= V

VCC

temperature range −40°C ≤ T

VCC SUPPLY CURRENT

Operating

No switching DISB# = 5 V, PWM = 0 V − − 2 mA

Disabled

UVLO Start Threshold V

UVLO Hysteresis 150 − − mV

VCCD SUPPLY CURRENT

Enabled, No switching

Disabled DISB# = 0 V − 0.4 1

Operating DISB# = 5 V, PWM = 400 kHz − − 20 mA

DISB# INPUT

Input Resistance

Upper Threshold V

Lower Threshold V

Hysteresis DISB# = 5 V, PWM = 400 kHz 200 − − mV

Enable Delay Time DISB# = 5 V, PWM = 0 V − − 40

Disable Delay Time DISB# = 5 V, PWM = 0 V − 21 50 ns

SMOD# INPUT

SMOD# Input Voltage High

SMOD# Input Voltage Mid−state V

SMOD# Input Voltage Low V

SMOD# Input Resistance R

SMOD# Propagation Delay, Falling T

SMOD# Propagation Delay, Rising T

PWM INPUT

Input Voltage High

Input Mid−state Voltage V

Input Low Voltage V

Input Resistance R

Input Resistance R

PWM Input Bias Voltage V

Non−overlap Delay, Leading Edge T

Non−overlap Delay, Trailing Edge T

PWM Propagation Delay, Rising T

PWM Propagation Delay, Falling T

VCCD

= 5.0 V, V

Parameter

= 12 V, V

VIN

≤ 125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)

J

DISB#

= 2.0 V, C

VCCD

= C

= 0.1 mF unless specified otherwise) Min/Max values are valid for the

VCC

Symbol Conditions Min. Typ. Max. Unit

DISB# = 5 V, PWM = 400 kHz − 1 2 mA

DISB# = 0 V, SMOD# = VCC − 0.4 1

DISB# = 0 V, SMOD# = GND 6 13

UVLO

VCC rising 2.89 − 3.37 V

DISB# = 5 V, PWM = 0 V,
V

PHASED

= 0 V

− 175 300

DISB# = 5 V, PWM = 400 kHz − 467 −

UPPER

LOWER

V

SMOD_HI

SMOD#_MID

SMOD_LO

SMOD#_UP

SMOD#_PD_F

SMOD#_PD_R

V

PWM_HI

PWM_MID

PWM_LO

PWM_HIZ

PWM_BIAS

PWM_BIAS

NOL_L

NOL_T

PWM,PD_R

PWM,PD_F

DISB# = 5 V, PWM = 0 V − − 2.0 V

DISB# = 5 V, PWM = 0 V 0.8 − − V

2.65 − − V

1.4 − 2.0 V

− − 0.7 V

Pull−up resistance to VCC − 455 −

SMOD# = Low to GL = 90%,

− 34 42 ns

PWM = MID

SMOD# = High to GL = 10%,

− 22 30 ns

PWM = MID

2.65 − − V

1.4 − 2.0 V

− − 0.7 V

SMOD# = V
V

SMOD#_LO

SMOD# = V

SMOD# = V

SMOD#_HI

SMOD#_MID

SMOD#_MID

GL Falling = 1 V to GH−VSW Ris-

or

10 − −

− 68 −

− 1.7 − V

− 13 − ns

ing = 1 V

GH−VSW Falling = 1 V to

− 12 − ns

GL Rising = 1 V

PWM = High to GL = 90% − 13 35 ns

PWM = Low to SW = 90% − 47 52 ns

mA

mA

mA

mA

kW

ms

kW

MW

kW

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NCP302150

Table 5. ELECTRICAL CHARACTERISTICS

(V

= V

VCC

temperature range −40°C ≤ T

Exiting PWM Mid−state Propagation De­lay, Mid−to−Low

Exiting PWM Mid−state Propagation De­lay, Mid−to−High

ZD FUNCTION

Zero Cross Detect Threshold

ZCD Blanking + Debounce Time t

THERMAL WARNING & SHUTDOWN

Thermal Warning Temperature

Thermal Warning Hysteresis T

Thermal Shutdown Temperature T

Thermal Shutdown Hysteresis T

THWM Open Drain Current I

BOOSTSTRAP DIODE

Forward Voltage

HIGH−SIDE DRIVER

Output Impedance, Sourcing

Output Sourcing Peak Current I

Output Impedance, Sinking R

Output Sinking Peak Current I

LOW−SIDE DRIVER

Output Impedance, Sourcing

Output Sourcing Peak Current I

Output Impedance, Sinking R

Output Sinking Peak Current I

GL Rise Time T

GL Fall Time T

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

VCCD

= 5.0 V, V

= 12 V, V

VIN

J

DISB#

≤ 125°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)

Parameter UnitMax.Typ.Min.ConditionsSymbol

= 2.0 V, C

T

PWM_EXIT_L

T

PWM_EXIT_H

V

ZCD

BLNK

T

THWN

THWN_HYS

THDN

THDN_HYS

THWN

R

SOURCE_GH

SOURCE_GH

SINK_GH

SINK_GH

R

SOURCE_GL

SOURCE_GL

SINK_GH

SINK_GL

R_GL

F_GL

= C

VCCD

= 0.1 mF unless specified otherwise) Min/Max values are valid for the

VCC

PWM = Mid−to−Low to GL = 10% − 14 25 ns

PWM = Mid−to−High to SW = 10% − 13 25 ns

− −6 − mV

− 330 − ns

Temperature at Driver Die − 150 −

− 15 −

Temperature at Driver Die − 180 −

− 25 −

− − 5 mA

Forward Bias Current = 2.0 mA − 380 − mV

Source Current = 100 mA − 0.9 −

− 2 − A

Source Current = 100 mA − 0.7 −

− 2.5 − A

Source Current = 100 mA − 0.9 −

GL = 2.5 V − 2 − A

Sink Current = 100 mA − 0.4 −

GL = 2.5 V − 4.5 − A

GL = 10% to 90%, C

GL = 90% to 10%, C

= 3.0 nF − 12 − ns

LOAD

= 3.0 nF − 6 − ns

LOAD

_C

_C

_C

_C

W

W

W

W

Table 6. LOGIC TABLE

INPUT TRUTH TABLE

DISB# PWM SMOD# (Note 4) GH (not a pin) GL

L X X L L

H H X H L

H L X L H

H MID H or MID L ZCD (Note 5)

H MID L L L (Note 6)

4. PWM input is driven to mid−state with internal divider resistors when SMOD# is driven to mid−state and PWM input is undriven externally.

5. GL goes low following 80 ns de−bounce time, 250 ns blanking time and then SW exceeding ZCD threshold.

6. There is no delay before GL goes low.

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NCP302150

TYPICAL PERFORMANCE CHARACTERISTICS

Test Conditions: VIN = 12 V, VCC = V

Figure 3. Efficiency − 19 V Input, 1.0 V Output Figure 4. Efficiency − 19 V Input, 1.8 V Output

CCD

= 5 V, V

= 1 V, L

OUT

otherwise noted.

= 250 nH, TA = 25 °C and natural convection cooling, unless

OUT

Figure 5. Efficiency − 12 V Input, 1.0 V Output Figure 6. Efficiency − 12 V Input, 1.8 V Output

Figure 7. Power losses vs. Output Current, 12Vin Figure 8. Power losses vs. Output Current, 19Vin

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