ON Semiconductor NCP1201 User Manual

© Semiconductor Components Industries, LLC, 2006

February, 2006 − Rev. 4

1 Publication Order Number:

NCP1201/D

NCP1201

PWM Current−Mode
Controller for Universal
Off−Line Supplies Featuring
Low Standby Power with
Fault Protection Modes

Housed in SOIC−8 or PDIP−8 package, the NCP1201 enhances the
previous NCP1200 series by offering a reduced optocoupler current with
additional Brownout Detection Protection (BOK). Similarly, the circuit
allows the implementation of complete off−line AC−DC a dapters, battery
chargers or Switchmode P ower Supplies ( SMPS) w here s tandby p ower i s
a key parameter.

The NCP1201 features efficient protection circuitry. When in the
presence of a fault (e.g. failed optocoupler, overcurrent condition, etc.)
the control permanently disables the output pulses to avoid subsequent
damage to the system. The IC only restarts when the user cycles the
mains power supply.

With the low power internal structure, operating at a fixed
60 or 100 kHz, the controller supplies itself from the high−voltage rail,
avoiding the need of an auxiliary winding. This feature naturally eases
the designer’s task in battery charger applications. Finally, current−mode
control provides an excellent audio−susceptibility and inherent
pulse−by−pulse control.

When the load current falls down to a pre−defined setpoint (V

SKIP

)
value, e.g. the output power demand diminishes, the IC automatically
enters the skip cycle mode and can provide excellent efficiency under
light load conditions. The skip mode is designed to operate at relatively
lower peak current so that acoustic noise that commonly takes place will
not happen with NCP1201.

Features

• AC Line Brownout Detect Protection, BOK Function

• Latchoff Mode Fault Protection

• No Auxiliary Winding Operation

• Internal Output Short−Circuit Protection

• Extremely Low No−Load Standby Power

• Current−Mode with Skip−Cycle Capability

• Internal Overtemperature Shutdown

• Internal Leading Edge Blanking

• 250 mA Gate Peak Current Driving Capability

• Internally Fixed Switching Frequency at 60 or 100 kHz

• Built−in Frequency Jittering for EMI Reduction

• Direct Optocoupler Connection

• Pb−Free Packages are Available

Typical Applications

• AC−DC Adapters

• Offline Battery Chargers

• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)

18

5

3

4

(Top View)

BOK

CS

HV

PIN CONNECTIONS

7

6

2

NC

FB

GND

DRV

VCC

x = Device Code: 6 for 60 kHz

y 1 for 100 kHz

y = Device Code: 6 for 60 kHz

xx 10 for 100 kHz

A = Assembly Location
L = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package

See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.

ORDERING INFORMATION

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SOIC−8

D SUFFIX

CASE 751

1

8

MARKING

DIAGRAMS

PDIP−8

P SUFFIX

CASE 626

1

8

1

8

1201Py0

AWL

YYWWG

201Dx
ALYW

G

1

8

NCP1201

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2

Figure 1. Typical Application Example

NCP1201

U1

11
2
3

4

8

6

5

DF06S

BR1

9

0X264

Vac

12

+

−

4 3

C1

4.7 m

400 V

+

470 mH

0.2 A

L1

C2

4.7 m

400 V

+

R1

195.7 k

R2

4.3 k

C3

470 p
250 V

R3

100 k

1.0 W

1N4937

D1

Q1

MTD1N60E

+

C4
10 mF

T1

D2

1N5819

47 mH

1.0 A

L3

6.5 V, 600 mA

+

C6
10 m

+

+

C5
10 m

C7

1.0 n
250 VAC Y1

1

2

4

3

U2

R4

2.7

0.5 W

SFH6156−2

D3

470 mH

0.2 A

L2

5V1

*

* Please refer to the application information section.

NCP1201

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3

4

3

2

1

CS

FB

BOK

GND

DR

V

V

CC

NC

HV

8

7

6

5

Figure 2. Simplified Functional Block Diagram

50 mA

I

ref

−

+

Output

80 K

−

+

−+−

+

Output

1.07 V

Reset

Reset

Q

Set

Enable

Skip Cycle
Comparator

60 or 100 kHz Clock

Oscillator

−+−

+

+

−

10.5 V/12.5 V

Output

Internal

Regulator

V

ref

Overload

Startup

Blanking

+

−

Output

250 ns

L.E.B.

0.9 V

57 k
25 k

+

−

V

ref

24 K

Maximum 83%

Duty Cycle

250 mA

−

+

−

+

1.92 V

+

−

20 k

HV Current
Source

Reset

TSD

NCP1201

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Á

PIN FUNCTION DESCRIPTION

Pin No.

Pin Name

Function

Description

1 BOK Bulk OK This pin detects the input line voltage by sensing the bulk capacitor, and

disables the PWM when line voltage is lower than normal.

2 FB Sets the Peak Current Setpoint By connecting an optocoupler to this pin, the peak current setpoint is ad-

justed according to the output power demand. Internal monitoring of this
pin level triggers the fault management circuitry.

3 CS Current Sense Input This pin senses the primary inductor current and routes it to the internal

comparator via an LEB circuit.
4 GND The IC Ground −
5 DRV Driving Pulses The driver’s output to an external MOSFET.
6 VCC Supplies the IC

This pin is connected to an external bulk capacitor of typically 10 mF.
7 NC No Connection This unconnected pin ensures adequate creepage distance between High

Voltage pin to other pins.
8 HV Generates the VCC from the Line Connected to the high−voltage rail, this pin injects a constant current into

the V

CC

capacitor.

MAXIMUM RATINGS (T

J

= 25°C unless otherwise noted)

Rating

Symbol

Value

Unit

Power Supply Voltage, Pin 6 V

CC

−0.3, 16 V

Input/Output Pins
Pins 1, 2, 3, 5

V

IO

−0.3, 6.5 V

Maximum Voltage on Pin 8 (HV) V

HV

500 V

Thermal Resistance, Junction−to−Air, PDIP−8 Version
Thermal Resistance, Junction−to−Air, SOIC Version

R

q

JA

R

q

JA

100
178

°C/W
°C/W

Operating Junction Temperature Range T

J

−40 to +150 °C

Operating Ambient Temperature Range T

A

−25 to +125 °C

Storage Temperature Range T

stg

−55 to +150 °C
ESD Capability, HBM (All pins except VCC and HV pins) (Note 1) − 2.0 kV
ESD Capability, Machine Model (All pins except VCC and HV pins) (Note 1) − 200 V

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.

1. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) > 2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM) > 200 V per JEDEC standard: JESD22−A115.

2. Latchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.

NCP1201

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ELECTRICAL CHARACTERISTICS (For typical values T

J

= 25°C, for min/max values TJ = −25°C to +125°C,

V

CC

= 11 V unless otherwise noted)

Characteristic

Symbol Min Typ Max Unit

DYNAMIC SELF−SUPPLY

V

CC

Increasing Level at which the Current Source Turns−Off VCC

OFF

11.5 12.5 13.5 V

VCC Decreasing Level at which the Current Source Turns−On VCC

ON

9.6 10.5 11.3 V

Internal IC Current Consumption, No Output Load on Pin 5 I

CC1

440 905 1300

mA

Internal IC Current Consumption, 1.0 nF Output Load on Pin 5

NCP1201P60, NCP1201D60

NCP1201P100, NCP1201D100

I

CC2

0.75

1.6

1.6

2.1

2.2

2.8

mA

Internal IC Current Consumption, Latchoff Phase I

CC3

405 575 772

mA

INTERNAL STARTUP CURRENT SOURCE

High−Voltage Current Source at V

CCON

– 0.2 V I

C1

3.6 5.3 7.1 mA

High−Voltage Current Source at VCC = 0 V I

C2

7.5 11.1 15 mA

HV Pin Leakage Current @ 450 V, VCC Pin Connected to Ground I

LEAK

− 30 70

mA

OUTPUT SECTION

Output Voltage Rise−Time (CL = 1.0 nF, 10 V Output)

Tr − 116 − ns
Output Voltage Fall−Time (CL = 1.0 nF, 10 V Output) Tf − 41 − ns
Source Resistance (V

DRV

= ) R

OH

26 38 60

W

Sink Resistance (V

DRV

= ) R

OL

4.0 10 22

W

CURRENT SENSE SECTION (Pin 5 Unloaded)

Input Bias Current @ 1.0 V Input Level on Pin 3

I

IB−CS

− 10 100 nA

Maximum Current Sense Input Threshold V

ILIMIT

0.8 0.9 1.0 V

Default Current Sense Threshold for Skip Cycle Operation V

ILSKIP

250 325 390 mV

Propagation Delay from Current Detection to Gate OFF State T

DEL

35 65 160 ns

Leading Edge Blanking Duration T

LEB

150 260 400 ns

OSCILLATOR SECTION (VCC = 11 V, Pin 5 Loaded by 1.0 KW)

Oscillation Frequency

NCP1201P60, NCP1201D60

NCP1201P100, NCP1201D100

F

OSC

52
92

60

100

72

117

kHz

Built−in Frequency Jittering (as a function of Vcc voltage)

NCP1201P60, NCP1201D60

NCP1201P100, NCP1201D100

F

jitter

−

−

493
822

−

−

Hz/V

Maximum Duty Cycle D

max

74 83 87 %

FEEDBACK SECTION (VCC = 11 V, Pin 5 Unloaded)

Internal Pullup Resistor

R

UP

10 17 24

kW

Feedback Pin to Pin 3 Current Setpoint Division Ratio I

ratio

2.9 3.3 4.0 −

BROWNOUT DETECT SECTION

BOK Input Threshold Voltage

V

th

1.75 1.92 2.05 V

BOK Input Bias Current (V

BOK

< Vth) I

IB−BOK

− 11 100 nA

Source Bias Current (Turn on After V

BOK

> Vth) I

SC

40 50 58

mA

FREQUENCY SKIP CYCLE SECTION

Built−in Frequency Skip Cycle Comparator Voltage Threshold

V

SKIP

0.96 1.07 1.18 V

THERMAL SHUTDOWN

Thermal Shutdown Trip Point, Temperature Rising (Note 3)

T

SD

− 145 − °C

Thermal Shutdown Hysteresis T

HYST

− 25 − °C

3. Verified by design.

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TYPICAL CHARACTERISTICS

TJ, JUNCTION TEMPERATURE (°C)

1251007550250−25

12.9

VCC

OFF

, V

CC

OFF THRESHOLD VOLTAGE (V)

12.5

12.3

11.9

11.7

12.1

12.7

TJ, JUNCTION TEMPERATURE (°C)

1251007550250−25

1100

I

CC1

, CURRENT CONSUMPTION

WITH NO LOAD (mA)

1000

800

700

600

T

J

, JUNCTION TEMPERATURE (°C)

12

5

1007550250−25

2.6

I

CC2

, CURRENT CONSUMPTION (mA)

2.2

2.0

1.6

1.4

1.8

2.4

900

TJ, JUNCTION TEMPERATURE (°C)

12

5

1007550250−25

8.0

I

C1

, HV PIN STARTUP CURRENT

SOURCE (mA)

5.0

3.5

2.0

0.5

6.5

VCC = 11 V

1 nF Load

Figure 3. VCC OFF Threshold Voltage

vs. Junction Temperature

TJ, JUNCTION TEMPERATURE (°C)

12

5

1007550250−25

10.8

VCC

ON

, V

CC

ON THRESHOLD VOLTAGE (V)

10.2

10

9.8

10.4

10.6

Figure 4. VCC ON Threshold Voltage

vs. Junction Temperature

Figure 5. IC Current Consumption, I

CC1

vs. Junction Temperature

Figure 6. IC Current Consumption, I

CC2

vs. Junction Temperature

Figure 7. IC Current Consumption at Latchoff Phase

vs. Junction Temperature

Figure 8. HV Pin Startup Current Source

vs. Junction Temperature

100 KHz

60 KHz

TJ, JUNCTION TEMPERATURE (°C)

1251007550250−25

700

I

CC3

, IC CURRENT CONSUMPTION

AT LATCHOFF PHASE (mA)

600

500

400

300