ON Semiconductor NCD57085, NCV57085 User Manual
Isolated Compact IGBT
Gate Driver with Current Sense
NCD57085, NCV57085
NCx57085 is a high current single channel IGBT gate driver
with 2.5 kVrms internal galvanic isolation designed for high system
efficiency and reliability in high power applications. The driver
includes Current Sense function with soft turn off and fault reporting
in a narrow body SOIC*8 package. NCx57085 accommodates wide
range of input bias voltage and signal levels from 3.3 V to 20 V,
and wide range of output bias voltage up to 30 V.
Features
• High Peak Output Current (+7A/−7 A)
• Low Output Impedance for Enhanced IGBT Driving
• Short Propagation Delays with Accurate Matching
• IGBT Over Current Protection
• Negative Voltage (Down to −9 V) Capability for CS Pin
• IGBT Gate Clamping during Short Circuit
• IGBT Gate Active Pull Down
• Soft Turn Off During IGBT Over Current
• Tight UVLO Thresholds for Bias Flexibility
• Output Partial Pulse Avoidance During UVLO/CS (Restart)
• 3.3. V, 5 V, and 15 V Logic Input
• 2.5 kVrms Galvanic Isolation
• High Transient Immunity
• High Electromagnetic Immunity
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements;
AEC−Q100 Qualified and PPAP Capable
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
Typical Applications
• Motor Control
• Automotive Applications
• Uninterruptible Power Supplies (UPS)
• Industrial Power Supplies
• HVAC
• Industrial Pumps and Fans
• PTC Heater
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1
SOIC−8 NB
CASE 751−07
MARKING DIAGRAM
8
57085
ALYW
G
1
57085 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTIONS
1
VDD
2
IN
3
FLT
4
GND
NCx57085
x = D or V
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of
this data sheet.
8
V
B
7
HO
6
CS
5
V
S
© Semiconductor Components Industries, LLC, 2021
March, 2021 − Rev. 0
1 Publication Order Number:
NCD57085/D
NCD57085, NCV57085
IN
FLT
GND
VCC1
VDD
UVLO1
VB
UVLO2
LogicLogic
STO
VS
VB
+
−
V
CS−THR
HO
CS
VS
Figure 1. Simplified Block Diagram
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NCD57085, NCV57085
V
DD
V
DD
IN
FLT
HO
CS
GND
V
B
V
B
V
S
Figure 2. Simplified Application Schematics, Current Sense Using Shunt Resistor
V
DD
V
DD
IN
FLT
HO
CS
GND
V
B
V
B
V
S
Figure 3. Simplified Application Schematics, Current Sense Using IGBT Vce
V
DD
V
DD
IN
FLT
GND
V
HO
CS
V
V
B
B
S
Figure 4. Simplified Application Schematics, Current Sense Using Shunt Resistor and Negative Gate Drive
V
DD
V
DD
V
HOIN
FLT
CS
V
B
B
GND
V
S
Figure 5. Simplified Application Schematics, Current Sense Using IGBT Vce and Negative Gate Drive
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NCD57085, NCV57085
FUNCTION DESCRIPTION
Pin Name No. I/O Description
V
DD
1 Power
IN 2 I
Input side power supply. A good quality bypassing capacitor is required from this pin to
GND and should be placed close to the pins for best results.
The under voltage lockout (UVLO) circuit enables the device to operate at power on when
a typical supply voltage higher than V
more details.
UVLO1−OUT−ON
Non−inverted gate driver input. The equivalent input pull down resistance is about 100 kW
when the input voltage is below 5.5 V. The input adapter circuitry will work once the input
voltage is higher than 5.5 V, and will keep the input current at the level when the input voltage is 5.5 V even though it is higher than that. A minimum pulse width is required at IN
before HO responds.
is present. Please see Figure 7 for
FLT 3 O
Fault output (active low) that allows communication to the main controller that the driver
has encountered a Over Current, or UVLO1, or UVLO2 condition and has deactivated the
output. There is an internal 50 kW pull−up resistor connected to this pin. Multiple of them
from different drivers can be “OR”ed together.
/FLT and HO will go high automatically after t
avoid partial output pulse on HO. This is a feature called “Re−start”.
expires along with a rising edge of IN to
MUTE
GND 4 Power Input side ground reference.
V
S
CS 6 I/O
5 Power Output side ground reference.
Input for detecting over current of IGBT. The current sense threshold has to be met uninterruptedly for a fixed period of t
9 and Figure 10.
FLT
and HO will be kept low (including soft turn off time) at least for a period defined by
t
.
MUTE
before HO and /FLT are set low. Please refer to Figure
FILTER
HO 7 O Driver output that provides the appropriate drive voltage and source/sink current to the
IGBT/FET gate. HO is actively pulled low during start−up.
V
B
8 Power
Output side positive power supply. The operating range for this pin is from UVLO2 to its
maximum allowed value. A good quality bypassing capacitor is required from this pin to V
and should be placed close to the pins for best results.
The under voltage lockout (UVLO) circuit enables the device to operate at power on when
a typical supply voltage higher than V
more details.
UVLO2−OUT−ON
is present. Please see Figure 8 for
S
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NCD57085, NCV57085
SAFETY AND INSULATION RATINGS
Symbol
Installation Classifications per DIN VDE 0110/1.89
Table 1 Rated Mains Voltage
Climatic Classification 40/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
CTI Comparative Tracking Index (DIN IEC 112/VDE 0303 Part 1) 600
V
V
IORM
V
IOWM
V
E
E
PR
IOTM
CR
CL
Input−to−Output Test Voltage, Method B, V
100% Production Test with t
= 1 s, Partial Discharge < 5 pC
m
Maximum Repetitive Peak Voltage 1200 V
Maximum Working Insulation Voltage 870 V
Highest Allowable Over Voltage 4200 V
External Creepage 4.0 mm
External Clearance 4.0 mm
DTI Insulation Thickness 8.65
T
Case
P
S,INPUT
P
S,OUTPUT
R
IO
Safety Limit Values – Maximum Values in Failure; Case Temperature 150 °C
Safety Limit Values – Maximum Values in Failure; Input Power 132 mW
Safety Limit Values – Maximum Values in Failure; Output Power 1128 mW
Insulation Resistance at TS, V
IO
Parameter Value Unit
< 150 V
RMS
< 300 V
RMS
< 450 V
RMS
< 600 V
RMS
× 1.875 = VPR,
IORM
< 1000 V
RMS
= 500 V 10
I−IV
I−IV
I−IV
I−IV
I−III
2250 V
9
PK
PK
RMS
PK
mm
W
ISOLATION CHARACTERISTICS
Symbol Parameter Conditions Value Unit
V
ISO,
INPUT− OUTPUT
R
ISO
1. Device is considered a two−terminal device: pins 1 to 4 are shorted together and pins 5 to 8 are shorted together.
2. 2,500 VRMS for 1−minute duration is equivalent to 3,000 VRMS for 1−second duration.
3. The input−output isolation voltage is a dielectric voltage rating per UL1577. It should not be regarded as an input−output continuous voltage
rating. For the continuous working voltage rating, refer to equipment−level safety specification or DIN VDE V 0884−11 Safety and Insulation
Ratings Table.
Input−Output Isolation Voltage TA = 25°C, Relative Humidity < 50%, t = 1.0 minute,
< 30 mA, 50 Hz
I
I−O
(Notes 1, 2, 3)
Isolation Resistance V
= 500 V (Note 1) 10
I−O
2500 V
11
RMS
W
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NCD57085, NCV57085
ABSOLUTE MAXIMUM RATINGS (Note 4) Over operating free−air temperature range unless otherwise noted.
Symbol
V
− GND Supply Voltage, Input Side −0.3 22 V
DD
V
− V
B
VHO − V
I
PK−SRC
S
S
Supply Voltage, Output Side −0.3 32 V
Gate−driver Output Voltage −0.3 VBS + 0.3 V
Gate−driver Output Sourcing Current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%,
V
− VS = 15 V)
D
I
PK−SNK
Gate−driver Output Sinking Current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%,
V
− VS = 15 V)
D
V
− GND Voltage at IN, FLT −0.3 VDD + 0.3 V
IN
IFLT Output current of FLT − 10 mA
VCS − V
S
Voltage at CS (Note 5) −9 VBS + 0.3 V
PD Power Dissipation (Note 6) − 1123 mW
ESD
ESD
HBM
CDM
ESD Capability, Human Body Model (Note 7) − ± 2 kV
ESD Capability, Charged Device Model (Note 7) − ± 2 kV
MSL Moisture Sensitivity Level − 1 −
TJ(max) Maximum Junction Temperature −40 150 °C
TSTG Storage Temperature Range −65 150 °C
TSLD Lead Temperature Soldering Reflow, Pb−Free (Note 8) − 260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. The minimum value is verified by characterization with a single pulse of 1.5 mA for 300 ms.
6. The value is estimated for ambient temperature 25°C and junction temperature 150°C, 650 mm
power plane layers. Power dissipation is affected by the PCB design and ambient temperature.
7. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114).
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101).
Latchup Current Maximum Rating: ≤100 mA per JEDEC standard: JESD78, 125°C.
8. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Parameter Minimum Maximum Unit
− 7 A
− 7.5 A
2
, 1 oz copper, 2 surface layers and 2 internal
THERMAL CHARACTERISTICS
Symbol Parameter Conditions Value Unit
R
θ
Thermal Resistance, Junction−to−Air
JA
100 mm2, 1 oz Copper, 1 Surface Layer
100 mm2, 1 oz Copper, 2 Surface Layers and 2
179
110
°C/W
Internal Power Plane Layers
9. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
10.Values based on copper area of 100 mm
2
(or 0.16 in2) of 1 oz copper thickness and FR4 PCB substrate.
OPERATING RANGES (Note 11)
Symbol Parameter Min Max Unit
VDD−GND Supply Voltage, Input Side UVLO1 20 V
VB−V
S
V
IN
|dV
/dt| Common Mode Transient Immunity 100 −
ISO
T
A
Supply Voltage, Output Side UVLO2 30 V
Logic Input Voltage at IN GND V
DD
kV/ms
Ambient Temperature −40 125 °C
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
11.Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
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NCD57085, NCV57085
ELECTRICAL CHARACTERISTICS V
For typical values T
Symbol
VOLTAGE SUPPLY
V
UVLO1−OUT−ON
V
UVLO1−OUT−OFF
V
UVLO1−HYST
V
UVLO2−OUT−ON
V
UVLO2−OUT−OFF
V
UVLO2−HYST
I
DD−0−3.3
I
DD−0−5
I
DD−0−15
I
DD−100−5
I
BS−0
I
BS−100
LOGIC INPUT AND OUTPUT
V
IL
V
IH
V
IN−HYST
I
IN
I
FLT−L
V
FLT−L
t
MIN1
t
MIN2
DRIVER OUTPUT
V
HOL1
V
HOL2
V
HOH1
V
HOH2
I
PK−SNK1
I
PK−SNK2
I
PK−SRC1
I
PK−SRC2
OVER CURRENT PROTECTION
V
CS−THR
V
CS−NEG
= 25°C, for min/max values, TA is the operating ambient temperature range that applies, unless otherwise noted.
A
Parameter Test Conditions Min Typ Max Unit
UVLO1 Output Enabled − − 3.1 V
UVLO1 Output Disabled 2.4 − − V
UVLO1 Hysteresis 0.1 − − V
UVLO2 Output Enabled 12.4 12.9 13.4 V
UVLO2 Output Disabled 11.5 12 12.5 V
UVLO2 Hysteresis 0.7 1 − V
Input Supply Quiescent Current
Output Supply Quiescent Current
Low Input Voltage (Note 12) 1.65 V
High Input Voltage (Note 12) 0.7 x V
Input Hysteresis Voltage
(Note 12)
Input Current VIN = V
FLT Pull−up Current
(50 kW pull−up resistor)
FLT Low Level Output Voltage I
Input Pulse Width of IN for No Response at Output
Input Pulse Width of IN for
Guaranteed Response at Output
Output Low State
(V
– VS)
HO
Output High State
– VHO)
(V
B
Peak Driver Current, Sink
(Note 13)
Peak Driver Current, Sink
(Note 13)
Peak Driver Current, Source
(Note 13)
Peak Driver Current, Source
(Note 13)
CS Threshold Voltage 0.2 0.25 0.3 V
CS Negative Voltage ICS = 1.5 mA − −8 − V
= 5 V, VBS = 15 V.
DD
IN = Low, VDD = 3.3 V, FLT = High − − 2 mA
IN = Low, VDD = 5 V, FLT = High − − 2 mA
IN = Low, VDD = 15 V, FLT = High − − 2 mA
IN = High, VDD = 5 V, FLT = High − − 6 mA
IN = Low, no load − − 4 mA
IN = High, no load − − 6 mA
V
I
I
I
I
VHO = 9 V
(near IGBT Miller Plateau)
VHO = 9 V
(near IGBT Miller Plateau)
DD
0.15 x V
DD
= Low − 100 −
FLT
= 5 mA − − 0.3 V
FLT
50
2.1 V
DD
− − 10 ns
40 − − ns
= 200 mA − 0.1 0.22
SNK
= 1.0 A, TA = 25°C − 0.4 1
SNK
= 200 mA − 0.2 0.35
SRC
= 1.0 A, TA = 25°C − 0.6 1.7
SRC
− 7.5 − A
− 7 − A
− 7 − A
− 5 − A
V
mA
mA
V
V
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