ON Semiconductor MC74AC139, MC74ACT139 Technical data

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MC74AC139, MC74ACT139
Dual 1-of-4 Decoder/Demultiplexer
The MC74AC139/74ACT139 is a high–speed, dual 1–of–4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually–exclusive active–LOW outputs. Each decoder has an active–LOW Enable input which can be used as a data input for a 4–output demultiplexer. Each half of the MC74AC139/74ACT139 can be used as a function generator providing four minterms of two variables.
Multifunctional Capability
Two Completely Independent 1–of–4 Decoders
Active LOW Mutually Exclusive Outputs
Outputs Source/Sink 24 mA
ACT139 Has TTL Compatible Inputs
V
E
CC
bA0bA1b
1516 14 13 12 11 10
O
0bO1bO2bO3b
9
16
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1
16
1
16
1
DIP–16 N SUFFIX CASE 648
SO–16
D SUFFIX
CASE 751B
TSSOP–16 DT SUFFIX
CASE 948F
21 34567
E
A0aA1aO0aO1aO2aO
a
8
GND
3a
Figure 1. Pinout: 16–Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN FUNCTION
A0, A
1
E Enable Inputs O0–O
3
Address Inputs
Outputs
TRUTH TABLE
Inputs Outputs
E A0A1O0O1O
H X X H H H H
L L L L H H H L H L H L H H L L H H H L H L H H H H H L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
O
2
3
EIAJ–16
16
1
M SUFFIX CASE 966
ORDERING INFORMATION
Device Package Shipping
MC74AC139N MC74ACT139N MC74AC139D MC74ACT139D MC74AC139DR2 2500 Tape & Reel MC74ACT139DR2 2500 Tape & Reel
MC74AC139DT MC74ACT139DT
MC74AC139DTR2 MC74AC139M
MC74ACT139M MC74AC139MEL MC74ACT139MEL
PDIP–16
PDIP–16 SOIC–16 SOIC–16
SOIC–16 SOIC–16
TSSOP–16 TSSOP–16
TSSOP–16
EIAJ–16 EIAJ–16 EIAJ–16 EIAJ–16
25 Units/Rail 25 Units/Rail 48 Units/Rail 48 Units/Rail
96 Units/Rail 96 Units/Rail
2500 Tape & Reel
50 Units/Rail
50 Units/Rail 2000 Tape & Reel 2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 6 of this data sheet.
Semiconductor Components Industries, LLC, 2002
July, 2002 – Rev. 6
1 Publication Order Number:
MC74AC139/D
MC74AC139, MC74ACT139
EA0A
1
DECODER a
O0O1O2O
E A
3
0A1
DECODER b
O0O1O2O
3
Figure 2. Logic Symbol
E
a
A0aA
1a
E
b
A0bA
1b
0
0a
0
0
1a
2a
0
3a
NOTE: This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
FUNCTIONAL DESCRIPTION
The MC74AC139/74ACT139 is a high–speed dual 1–of–4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A
) and provides four mutually
0–A1
exclusive active–LOW outputs (O0–O3). Each decoder has an active–LOW enable (E). When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4–output demultiplexer application. Each half of the MC74AC139/74ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 4, and thereby reducing the number of packages required in a logic network.
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0
0b
0
E
A
0
A
1
E
A
0
A
1
E
A
0
A
1
E
A
0
A
1
0
1b
2b
0
3b
E
A
O
0
0
A
1
E
A
0
O
1
A
1
E
A
O
0
2
A
1
E
O
A
3
0
A
1
O
0
O
1
O
2
O
3
Figure 4. Gate Functions (Each Half)
2
MC74AC139, MC74ACT139
r,f
AC Devices except Schmitt Inputs
In ut Rise and Fall Time (Note 2)
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
T
stg
*Maximum Ratings are those values beyond which damage to the device may occur . Functional operation should be restricted to the Recom-
mended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
V
CC
VIN, V
OUT
tr, t
f
tr, t
f
T
J
T
A
I
OH
I
OL
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
DC Supply Voltage (Referenced to GND) –0.5 to +7.0 V DC Input Voltage (Referenced to GND) –0.5 to VCC +0.5 V
DC Output Voltage (Referenced to GND) –0.5 to VCC +0.5 V DC Input Current, per Pin ±20 mA DC Output Sink/Source Current, per Pin ±50 mA DC VCC or GND Current per Output Pin ±50 mA Storage Temperature –65 to +150 °C
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND) 0 V
AC 2.0 5.0 6.0
ACT 4.5 5.0 5.5
CC
V
V
VCC @ 3.0 V 150
Input Rise and Fall Time (Note 1)
p
p
VCC @ 4.5 V 40 ns/V VCC @ 5.5 V 25
Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs
VCC @ 4.5 V 10 – VCC @ 5.5 V 8.0
ns/V
Junction Temperature (PDIP) 140 °C Operating Ambient Temperature Range –40 25 85 °C Output Current – High –24 mA Output Current – Low 24 mA
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MC74AC139, MC74ACT139
V
IH
ugee
g
o
CC
0
IL
auoee
g
o
CC
0
OH
ugee
OUT
50
g
V
OL
auoee
OUT
50
g
V
IINMaximum In ut
A
V
V
GND
ICCMaximum Quiescent
A
V
V
GND
VCC*
Fi
o aga o eay
o aga o eay
o aga o eay
o aga o eay
DC CHARACTERISTICS
74AC 74AC
TA =
–40°C to
TA = +25°C
CC
Symbol Parameter
V
IH
Minimum High Level Input Voltage
(V)
3.0 1.5 2.1 2.1 V
4.5 2.25 3.15 3.15 V or VCC – 0.1 V
Typ Guaranteed Limits
5.5 2.75 3.85 3.85
V
IL
Maximum Low Level Input Voltage
3.0 1.5 0.9 0.9 V
4.5 2.25 1.35 1.35 V or VCC – 0.1 V
5.5 2.75 1.65 1.65
V
OH
Minimum High Level Output Voltage
3.0 2.99 2.9 2.9
4.5 4.49 4.4 4.4 V
5.5 5.49 5.4 5.4
3.0 2.56 2.46
4.5 3.86 3.76
5.5 4.86 4.76 –24 mA
V
OL
Maximum Low Level Output Voltage
3.0 0.002 0.1 0.1
4.5 0.001 0.1 0.1 V
5.5 0.001 0.1 0.1
3.0 0.36 0.44
4.5 0.36 0.44
5.5 0.36 0.44 24 mA
I
IN
I
OLD
I
OHD
I
CC
Maximum Input Leakage Current
†Minimum Dynamic
Output Current
Maximum Quiescent Supply Current
5.5 ±0.1 ±1.0
5.5 75 mA V
5.5 –75 mA V
5.5 8.0 80
*All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
+85°C
Unit Conditions
= 0.1 V
OUT
= 0.1 V
OUT
I
= –50 A
OUT
*VIN = VIL or V
–12 mA
I
OH
I
OUT
–24 mA
= 50 A
*VIN = VIL or V
12 mA
I
OL
I
OLD
OHD
IN
=
24 mA
,
CC
= 1.65 V Max
= 3.85 V Min
=
or
CC
IH
IH
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
t
PLH
t
PHL
t
PLH
t
PHL
*Voltage Range 3.3 V is 3.3 V ±0.3 V. *Voltage Range 5.0 V is 5.0 V ±0.5 V.
Symbol Parameter
Propagation Delay An to O
n
Propagation Delay An to O
n
Propagation Delay En to O
n
Propagation Delay En to O
n
*
(V)
3.3 4.0 8.0 11.5 3.5 13
5.0 3.0 6.5 8.5 2.5 9.5
3.3 3.0 7.0 10 2.5 11
5.0 2.5 5.5 7.5 2.0 8.5
3.3 4.5 9.5 12 3.5 13
5.0 3.5 7.0 8.5 3.0 10
3.3 4.0 8.0 10 3.0 11
5.0 2.5 6.0 7.5 2.5 8.5
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74AC 74AC
TA = –40°C
TA = +25°C
C
= 50 pF
L
to +85°C
= 50 pF
C
L
Min Typ Max Min Max
Unit
ns 3–6
ns 3–6
ns 3–6
ns 3–6
g.
No.
MC74AC139, MC74ACT139
V
IH
ugee
V
IL
auoee
V
OH
ugee
V
OUT
50
g
I
OL
auoee
V
OUT
50
g
I
IINMaximum In ut
A
V
V
GND
ICCMaximum Quiescent
A
V
V
GND
VCC*
Fi
Pro agation Delay
Pro agation Delay
Pro agation Delay
Pro agation Delay
DC CHARACTERISTICS
TA = +25°C
CC
Symbol Parameter
V
IH
Minimum High Level Input Voltage
V
IL
Maximum Low Level Input Voltage
V
OH
Minimum High Level Output Voltage
(V)
4.5 1.5 2.0 2.0
5.5 1.5 2.0 2.0
4.5 1.5 0.8 0.8
5.5 1.5 0.8 0.8
4.5 4.49 4.4 4.4
5.5 5.49 5.4 5.4
4.5 3.86 3.76 V
5.5 4.86 4.76
V
OL
Maximum Low Level Output Voltage
4.5 0.001 0.1 0.1
5.5 0.001 0.1 0.1
4.5 0.36 0.44 V
5.5 0.36 0.44
I
IN
I I
OLD
I
OHD
I
CC
CCT
Maximum Input Leakage Current
5.5 ±0.1 ±1.0
Additional Max. ICC/Input 5.5 0.6 1.5 mA VI = VCC – 2.1 V †Minimum Dynamic
Output Current
Maximum Quiescent Supply Current
5.5 75 mA V
5.5 –75 mA V
5.5 8.0 80
*All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time.
Typ Guaranteed Limits
74ACT 74ACT
TA =
–40°C to
+85°C
Unit Conditions
V
= 0.1 V
OUT
or VCC – 0.1 V V
= 0.1 V
OUT
or VCC – 0.1 V I
= –50 A
OUT
*VIN = VIL or V
OH
I
OUT
–24 mA –24 mA
= 50 A
*VIN = VIL or V
OL
I
OLD
OHD
IN
=
24 mA 24 mA
,
CC
= 1.65 V Max
= 3.85 V Min
=
or
CC
IH
IH
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT 74ACT
TA = –40°C
Symbol Parameter
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay An to O
n
Propagation Delay An to O
n
Propagation Delay En to O
n
Propagation Delay En to O
n
TA = +25°C
C
= 50 pF
*
(V)
L
Min Typ Max Min Max
5.0 1.5 6.0 8.5 1.5 9.5 ns 3–6
5.0 1.5 6.0 9.5 1.5 10.5 ns 3–6
5.0 2.5 7.0 10.0 2.0 11.0 ns 3–6
5.0 2.0 7.0 9.5 1.5 10.5 ns 3–6
to +85°C
= 50 pF
C
L
Unit
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Value
Symbol Parameter
C
IN
C
PD
Input Capacitance 4.5 pF VCC = 5.0 V Power Dissipation Capacitance 40 pF VCC = 5.0 V
Typ
Unit Test Conditions
g.
No.
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5
MC74AC139, MC74ACT139
MARKING DIAGRAMS
DIP–16 SO–16 TSSOP–16 EIAJ–16
MC74AC139N
AWLYYWW
MC74ACT139N
AWLYYWW
AC139
AWLYWW
ACT139
AWLYWW
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week
AC
139
ALYW
ACT
139
ALYW
74AC139
ALYW
74ACT139
ALYW
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6
–A–
916
B
18
F
S
H
G
D
16 PL
0.25 (0.010) T
–A–
16 9
18
G
–T–
SEATING
PLANE
D
16 PL
0.25 (0.010) A
M
T
MC74AC139, MC74ACT139
PACKAGE DIMENSIONS
PDIP–16
N SUFFIX
16 PIN PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
C
SEATING
–T–
PLANE
K
M
A
J
M
16 PIN PLASTIC SOIC PACKAGE
CASE 751B–05
–B–
K
S
B
8 PLP
0.25 (0.010) B
C
S
L
SO–16
D SUFFIX
ISSUE J
M
R
M
S
X 45
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC
M
J
H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
DIM MIN MAX MIN MAX
F
A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019
MILLIMETERSINCHES
INCHESMILLIMETERS

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0.10 (0.004)
–T–
SEATING PLANE
L
U0.15 (0.006) T
PIN 1 IDENT.
U0.15 (0.006) T
D
S
2X L/2
S
MC74AC139, MC74ACT139
PACKAGE DIMENSIONS
TSSOP–16
DT SUFFIX
16 PIN PLASTIC TSSOP PACKAGE
CASE948F–01
ISSUE O
16X REFK
0.10 (0.004) V
16
1
M
9
8
A
–V–
C
G
S
N
H
S
J1
J
N
DETAIL E
DETAIL E
0.25 (0.010)
F
K
K1
SECTION N–N
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-.
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C --- 1.20 --- 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008
–W–
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8

INCHESMILLIMETERS
U
T
B
–U–
16 9
1
Z
D
e
b
0.13 (0.005)
M
8
H
E
E
A
A
1
0.10 (0.004)
EIAJ–16
M SUFFIX
16 PIN PLASTIC EIAJ PACKAGE
CASE966–01
ISSUE O
L
E
Q
M
L
DETAIL P
VIEW P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED
1
c
AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).
MILLIMETERS
DIM MIN MAX MIN MAX
--- 2.05 --- 0.081
A
A
0.05 0.20 0.002 0.008
1
0.35 0.50 0.014 0.020
b
0.18 0.27 0.007 0.011
c
9.90 10.50 0.390 0.413
D
5.10 5.45 0.201 0.215
E
1.27 BSC 0.050 BSC
e
H
7.40 8.20 0.291 0.323
E
0.50 0.85 0.020 0.033
L
L
1.10 1.50 0.043 0.059
E
0
M
Q
0.70 0.90 0.028 0.035
1
--- 0.78 --- 0.031
Z
INCHES
10
10
0
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Notes
MC74AC139, MC74ACT139
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9
Notes
MC74AC139, MC74ACT139
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10
Notes
MC74AC139, MC74ACT139
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MC74AC139, MC74ACT139
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changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MC74AC139/D
12
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