ON Semiconductor CS8129 Technical data

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CS8129

5.0 V, 750 mA Low Dropout
Linear Regulator with
Lower RESET Threshold

The CS8129 is a precision 5.0 V linear regulator capable of sourcing
750 mA. The RESET threshold voltage has been lowered to 4.2 V so
that the regulator can be used with 4.0 V microprocessors. The lower
RESET threshold also permits operation under low battery conditions
(5.5 V plus a diode). The RESET’s delay time is externally
programmed using a discrete RC network. During powerup, or when
the output goes out of regulation, RESET remains in the low state for
the duration of the delay. This function is independent of the input
voltage and will function correctly as long as the output voltage
remains at or above 1.0 V. Hysteresis is included in the Delay and the
RESET comparators to improve noise immunity. A latching discharge
circuit is used to discharge the delay capacitor when it is triggered by a
brief fault condition.

The regulator is protected against a variety of fault conditions: i.e.
reverse battery, overvoltage, short circuit and thermal runaway
conditions. The regulator is p rotected a gainst v olt age t ransient s r a nging
from −5 0 V to +40 V. Short c ircuit current is limite d to 1.2 A ( typ).

The CS8129 is packaged in a 5 lead TO−220 and a 16 lead surface
mount package.

Features

• 5.0 V ±3.0% Regulated Output

• Low Dropout Voltage (0.6 V @ 0.5 A)

• 750 mA Output Current Capability

• Reduced RESET Threshold for Use with 4.0 V Microprocessors

• Externally Programmed RESET Delay

• Fault Protection

− Reverse Battery

− 60 V, −50 V Peak Transient Voltage

− Short Circuit

− Thermal Shutdown

• Pb−Free Packages are Available*

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TO−220

FIVE LEAD

T SUFFIX

CASE 314D

1

5

TO−220

FIVE LEAD

1

1

5

16

1

See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.

See general marking information in the device marking
section on page 8 of this data sheet.

ORDERING INFORMATION

DEVICE MARKING INFORMATION

TVA SUFFIX

CASE 314K

TO−220

FIVE LEAD

THA SUFFIX

CASE 314A

SO−16WB
DW SUFFIX
CASE 751G

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2006

June, 2006 − Rev. 8

1 Publication Order Number:

CS8129/D

CS8129

PIN CONNECTIONS

TO−220 5−LEAD

1

Pre−Regulator

Charge
Current
Generator

Pin 1. V

IN

2. RESET

3. GND

4. Delay

5. V

OUT

Regulated Supply

for Circuit Bias

Bandgap

Reference

Thermal

Shutdown

Over Voltage

Shutdown

Error

Amplifier

−

+

1

V

IN

NC
NC

GND
GND

RESET

Delay

Anti−Saturation

and

Current Limit

SO−16 WB

16

V

OUT

NC
V

OUT(SENSE)

GND
GND
GND

NCNC
NC

V

IN

V

OUT

V

OUT

(SENSE)

Delay

Latching Discharge

−

S

Q

+

R

−

+

V

DISCHARGE

+

Delay

Comparator

RESET

−

GND

Figure 1. Block Diagram

ABSOLUTE MAXIMUM RATINGS

Rating Value Unit

Input Operating Range −0.5 to 26 V
Power Dissipation Internally Limited −
Peak Transient Voltage (46 V Load Dump @ 14 V VIN) −50, 60 V
Output Current Internally Limited −
Electrostatic Discharge (Human Body Model) 4.0 kV
Junction Temperature −55 to +150 °C
Storage Temperature Range −55 to +150 °C
Lead Temperature Soldering: Wave Solder (through hole styles only) (Note 1)

Reflow (SMD styles only) (Note 2)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

1. 10 second maximum.

2. 60 seconds max above 183°C.

260 peak
230 peak

°C

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2

CS8129

ELECTRICAL CHARACTERISTICS (−40°C ≤ T

R

RESET

= 4.7 kW to V

unless otherwise noted.) (Note 3)

OUT

≤ 125°C, −40 ≤ TJ ≤ 150°C, 6.0 ≤ VIN ≤ 26 V, 5.0 mA ≤ I

A

≤ 500 mA,

OUT

Characteristic Test Conditions Min Typ Max Unit

OUTPUT STAGE (V

OUT)

Output Voltage − 4.85 5.0 5.15 V
Dropout Voltage I
Supply Current I

Line Regulation 6.0 V ≤ VIN ≤ 26 V, I
Load Regulation 50 mA ≤ I
Ripple Rejection f = 120 Hz, VIN = 7.0 to 17 V, I

= 500 mA − 0.35 0.60 V

OUT

OUT

I

OUT

I

OUT

= 10 mA
= 100 mA
= 500 mA

OUT

= 50 mA − 5.0 50 mV

OUT

≤ 500 mA, VIN = 14 V − 10 50 mV

= 250 mA 54 75 − dB

OUT

−

−

−

2.0

6.0
55

7.0
12

100

Current Limit − 0.75 1.20 − A
Overvoltage Shutdown − 32 − 40 V
Reverse Polarity Input Voltage DC

V

≥ −0.6 V, 10 W Load

OUT

−15 −30 − V

Thermal Shutdown Guaranteed by Design 150 180 210 °C

RESET AND DELAY FUNCTIONS

Delay Charge Current V
RESET Threshold V

RESET Hysteresis VRH = V
Delay Threshold Charge, V

Delay Hysteresis
RESET Output Voltage Low
RESET Output Leakage V
Delay Capacitor Discharge Voltage Discharge Latched “ON”, V
Delay Time

= 2.0 V 5.0 10 15

DELAY

Increasing, V

OUT

V

Decreasing, V

OUT

RT(ON)

Discharge, V

1.0 V < V

OUT

C

DELAY

DC(HI)

OUT

> V

RT(H)

= 0.1 mF, (Note 4)

RT(ON)

RT(OFF)

− V

RT(OFF)

DC(LO)

−

< V

, 3.0 kW to V

RT(L)

Current − 0 10

OUT

> V

OUT

RT

4.05

4.00
50 150 250 mV

3.25

2.85

200 400 800 mV

− 0.1 0.4 V

− 0.2 0.5 V

16 32 48 ms

4.35

4.20

3.50

3.10

4.50

4.45

3.75

3.35

3. To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable.

4. Assuming ideal capacitor.
C

V

Delay Time +

Delay

Delay Threshold Charge

I

Charge

+ C

3.5 105(typ)

Delay

mA
mA
mA

mA

V
V

V
V

mA

PACKAGE LEAD DESCRIPTION

PACKAGE LEAD #

TO−220

SO−16WB

1 1 V

16 5 V

5 LEAD

LEAD SYMBOL FUNCTION

IN

OUT

Unregulated supply voltage to IC.
Regulated 5.0 V output.

4, 5, 11, 12, 13 3 GND Ground Connection.

8 4 Delay Timing capacitor for RESET function.
6 2 RESET CMOS/TTL compatible output lead. RESET goes low whenever V

below 6.0% of it’s regulated value.

14 N/A V

OUT(SENSE)

Remote sensing of output voltage.

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3

OUT

drops

CS8129

120

55

TYPICAL PERFORMANCE CHARACTERISTICS

R

= 25 W

LOAD

50
45
40

35
30

(mA)

25

CQ

I

125°C

20
15

25°C

10

5
0

01234 6 8 105

Figure 2. Quiescent Current vs. Input Voltage

5.5

R

= 25 W

5.0

LOAD

4.5

4.0

3.5

3.0

(V)

OUT

V

2.5

2.0

125°C

1.5

1.0

0.5
0

01234 6 8 105

25°C

Figure 4. Output Voltage vs. Input Voltage

−40°C

VIN (V)

Over Temperature

−40°C

VIN (V)

Over Temperature

Room Temp

R

= 6.67 W

100

LOAD

80

. (mA)

CQ

I

60

R

LOAD

= 10 W

40

20

7

9

0

012 34 5

R

= 25 W

LOAD

R

= NO LOAD

LOAD

678910

VIN (V)

Figure 3. Quiescent Current vs. Input

Voltage Over Load Resistance

5.5

Room Temp

5.0

4.5

4.0

3.5

3.0

(V)

R

=

LOAD

2.5

OUT

NO LOAD

V

2.0

1.5

1.0

R

= 10 W

LOAD

0.5

7

9

0

01234 6 8 105

Figure 5. V

R

= 6.67 W

LOAD

VIN (V)

vs. VIN Over R

OUT

7

9

LOAD

100

VIN = 6−26 V

80
60
40

TEMP = 25°C

20

0

−20

Line Reg. (mV)

−40

−60

TEMP = 125°C

−80

−100

0 800100 200 700300 400

Output Current (mA)

Figure 6. Line Regulation vs. Output Current

TEMP = −40°C

600500

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100

80
60
40

20

0

−20

−40

Load Regulation (mV)

−60

−80

−100

0 800100 200 700300 400

Figure 7. Load Regulation vs. Output Current

4

TEMP = −40°C

TEMP = 25°C

VIN = 14 V

TEMP = 125°C

600500

Output Current (mA)