This is a complete series of 3 W Zener diodes with limits and
excellent operating characteristics that reflect the superior capabilities
of silicon−oxide passivated junctions. All this in an axial−lead,
transfer−molded plastic package that offers protection in all common
environmental conditions.
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Features
• Zener Voltage Range − 3.3 V to 200 V
• ESD Rating of Class 3 (>16 KV) per Human Body Model
• Surge Rating of 98 W @ 1 ms
• Maximum Limits Guaranteed on up to Six Electrical Parameters
• Package No Larger than the Conventional 1 W Package
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES:
260°C, 1/16″ from the case for 10 seconds
POLARITY: Cathode indicated by polarity band
MOUNTING POSITION: Any
MAXIMUM RATINGS
RatingSymbolValueUnit
Max. Steady State Power Dissipation
@ TL = 75°C, Lead Length = 3/8″
Derate above 75°C
Steady State Power Dissipation
@ TA = 50°C
Derate above 50°C
Operating and Storage
Temperature Range
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
P
P
TJ, T
D
D
stg
3
24
1
6.67
−65 to
+200
W
mW/°C
W
mW/°C
°C
CathodeAnode
AXIAL LEAD
CASE 59
PLASTIC
STYLE 1
MARKING DIAGRAM
A
1N
59xxB
YYWWG
G
A= Assembly Location
1N59xxB = Device Number
YY= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
DevicePackageShipping
1N59xxB, GAxial Lead
(Pb−Free)
1N59xxBRL, GAxial Lead
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specificatio
Brochure, BRD8011/D.
2000 Units/Box
6000/Tape & Ree
†
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value.
1. TOLERANCE AND TYPE NUMBER DESIGNATION
Tolerance designation − device tolerance of ±5% are indicated by a “B” suffix.
2. ZENER VOLTAGE (VZ) MEASUREMENT
ON Semiconductor guarantees the zener voltage when measured at 90 seconds while maintaining the lead temperature (TL) at 30°C ±1°C,
3/8″ from the diode body.
3. ZENER IMPEDANCE (ZZ) DERIVATION
The zener impedance is derived from 60 seconds AC voltage, which results when an AC current having an rms value equal to 10% of the
DC zener current (IZT or IZK) is superimposed on IZT or IZK.
Figure 3. Maximum Surge PowerFigure 4. Typical Reverse Leakage
R
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
, REVERSE LEAKAGE (μAdc) @ V
0.001
R
AS SPECIFIED IN ELEC. CHAR. TABLE
I
0.0005
0.0003
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4
3
2
1
TA = 125°C
TA = 125°C
125102050100 200 4001000
NOMINAL VZ (VOLTS)
APPLICATION NOTE
1N5913B Series
Since the actual voltage available from a given zener
diode is temperature dependent, it is necessary to determine
junction temperature under any set of operating conditions
in order to calculate its value. The following procedure is
recommended:
Lead Temperature, TL, should be determined from:
TL = qLA PD + T
q
is the lead-to-ambient thermal resistance (°C/W) and
LA
A
PD is the power dissipation. The value for qLA will vary and
depends on the device mounting method. qLA is generally
30−40°C/W for the various clips and tie points in common
use and for printed circuit board wiring.
The temperature of the lead can also be measured using a
thermocouple placed on the lead as close as possible to the
tie point. The thermal mass connected to the tie point is
normally large enough so that it will not significantly
respond to heat surges generated in the diode as a result of
pulsed operation once steady-state conditions are achieved.
Using the measured value of TL, the junction temperature
may be determined by:
TJ = TL + DT
JL
DTJL is the increase in junction temperature above the lead
temperature and may be found from Figure 2 for a train of
power pulses (L = 3/8 inch) or from Figure 10 for dc power.
DTJL = qJL P
D
For worst-case design, using expected limits of IZ, limits
of PD and the extremes of TJ (DTJ) may be estimated.
Changes in voltage, VZ, can then be found from:
DV = qVZ DT
q
, the zener voltage temperature coefficient, is found
VZ
J
from Figures 5 and 6.
Under high power-pulse operation, the zener voltage will
vary with time and may also be affected significantly by the
zener resistance. For best regulation, keep current
excursions as low as possible.
Data of Figure 2 should not be used to compute surge
capability. S u rge limitations are given in Figure 3. They are
lower than would be expected by considering only junction
temperature, as current crowding effects cause temperatures
to be extremely high in small spots resulting in device
degradation should the limits of Figure 3 be exceeded.
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5
1N5913B Series
TEMPERATURE COEFFICIENT RANGES
(90% of the Units are in the Ranges Indicated)
ZTVZ
10
°θ
8
ZTVZ
°θ
1000
500
6
4
2
0
−2
, TEMPERATURE COEFFICIENT (mV/ C) @ I
−4
34 5 6 789101112
VZ, ZENER VOLTAGE @ IZT (VOLTS)
RANGE
Figure 5. Units To 12 VoltsFigure 6. Units 10 To 400 Volts
SURMETIC is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
1N5913B/D
8
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