Metal position tape 30 Hz to 15 kHz ±3 dB
High position tape30 Hz to 14 kHz ±3 dB
Normal position tape
Signal to noise ratio: 56 dB (metal position tape/ Type IV,
Input Jacks:
LINE IN: 2
Input sensitivity: 80 mV
Input impedance: 50 k ohm
Output Jacks:
LINE OUT: 2
Standard output level:
Output load impedance:
Motors:DC servo motor: 1+1
Heads:
PB Head:Special Hard Permalloy x 1
Rec/PB Head:Special Hard Permalloy x 1
Erase head:Ferrite x 1
Power supply rating: North American: AC 120 V, 60 Hz
Power consumption: 17 W
Standby power consumption:
Dimensions: (W x H x D):
Weight:4.9 kg (10.8 lbs.)
Operation condition temperature/humidity:
30 Hz to 13 kHz ±3 dB
Dolby NR off)
55 dB (high position/ Type II, Dolby NR
off)
50 dB (normal position/ Type I, Dolby
NR off)
Noise reduction of 10 dB above 5 kHz
and 5 dB at 1 kHz possible with Dolby B.
Noise reduction of 20 dB at 5 kHz
possible with Dolby C.
500 mV
over 50 k ohm
European: AC 230 - 240 V, 50 Hz
North American: 7.0 W
European: 0.6 W
435 mm x 121 mm x 303 mm
(17-1/8" x 4-3/4" x 11-15/16")
5 C - 35 C/ 5% - 85% (no condensation)
TA-RW255
Specifications and external appearance are subject to change
without notice because of product improvements.
Page 3
TA-RW255
EXPLODED VIEW
P101
P901A
A202
A026A201
A208
x 7 pcs.
P801
A029
x 2 pcs.
Z001
Z009
x 4 pcs.
Z005
P102
Z008
x 2 pcs.
Z003
A010
A011
x 2 pcs.
Z006
Z007
x 2 pcs.
A029
x 5 pcs.
U05
A029
x 4 pcs.
U01
A029
x 2 pcs.
Z004
P701
A204
A007
P802
Z002
A010
A011
x 2 pcs.
U02
U04
A008
x 2 pcs.
A205
A203
A007
A006
A302
x 6 pcs.
A001
A021
A016
A015
A301
A004
x 2 pcs.
A014
x 2 pcs.
A013
A316
A317
A305
A028
x 4 pcs.
U03
T901
A029
x 2 pcs.
A020
E851
A206
x 2 pcs.
A019
x 2 pcs.
A017
A311
x 4 pcs.
A313
x 8 pcs.
A312
x 4 pcs.
A003
x 4 pcs.
A014
x 2 pcs.
A013
A315
A317
A308
A306
x 3 pcs.
A307
Except
<MDD>
TA-RW255
Page 4
TA-RW255
EXPLODED VIEW
F567-750
F REC
CMAL2Z226B
Lever for prevent to lever.
(only Left side mecha.)
THE COMPONENTS IDENTIFIED BY MARK ARE CRITICAL FOR SAFETY.
REPLACE ONLY WITH PART NUMBER SPECIFIED.
VOLTAGE (MEASURED WITH VOLTMETER)IS DC VOLTAGE. (NO INPUT SIGNAL)
ELECTROLYTIC CAPACITORS ARE IN uF/WV.
ALL CAPACITORS ARE IN pF/50WV UNLESS OTHERWISE NOTED.
EX) 030 3pF 330 33pF 331 330pF 333 0.033uF
ALL RESISTORS ARE IN OHMS 1/4WATTS UNLESS OTHERWISE NOTED.
THE THICK LINES ON PC BOARD ARE THE PRINTING SIDE OF THE PARTS.
EX)PRINTING SIDE
CIRCUIT IS SUBJECT TO CHANGE FOR IMPROVEMENT.
THE COMPONENTS IDENTIFIED BY MARK ARE CRITICAL FOR SAFETY.
REPLACE ONLY WITH PART NUMBER SPECIFIED.
VOLTAGE (MEASURED WITH VOLTMETER)IS DC VOLTAGE. (NO INPUT SIGNAL)
ELECTROLYTIC CAPACITORS ARE IN uF/WV.
ALL CAPACITORS ARE IN pF/50WV UNLESS OTHERWISE NOTED.
EX) 030 3pF 330 33pF 331 330pF 333 0.033uF
ALL RESISTORS ARE IN OHMS 1/4WATTS UNLESS OTHERWISE NOTED.
THE THICK LINES ON PC BOARD ARE THE PRINTING SIDE OF THE PARTS.
EX)PRINTING SIDE
CIRCUIT IS SUBJECT TO CHANGE FOR IMPROVEMENT.
* Input limit of VRI is more than 12dB on Vo max, and not variable range.
16
2.4k
MPX
VRI 1
NRINVREF
IAOUT
IA
E. VOL
VRI 2
VRI 3
RPI
14k
6k
–5.2dBs
43mVrms
–25.2dBsRPI
–24.3
–20
dBs
–25
–30
–0.4dBs
0
VRI*
–5
–10
–15
Page 39
PB Mode (1 kHz NR-OFF)
HA12167FB/HA12169FB
EQOUT
EQIN
RECOUT
PBOUT
BIAS TRAP
TP
5.6k
E. VOLREC EQ
+
+
DOLBY - NR
1.5k
–1dBs
775mVrms
0dBs
(HA12167)
580mVrms
–2.5dBs
(HA12169)
–5dBs
–9dBs
–8.2dBs
300mVrms
–8.2dBs
0dBs = 775mVrms
–26dBs
2.4k
MPX
VRI 1
NRINVREF
IAOUT
IA
E. VOL
VRI 2
VRI 3
RPI
14k
6k
–5.2dBs
–25.2
dBs
43mVrms
RPI
–28.2
–22.2dBs
0
–5
–10
–15
–20
dBs
–25
VRI
–30
–34.2
dBs
–35
17
Page 40
HA12167FB/HA12169FB
Application Note
Power Supply Range
HA12167FB/HA12169FB are designed to operate on either single supply or split supply.
The operating range of the supply voltage is shown in table 1.
Table 1Supply Voltage
Type No.Single SupplySplit Supply
HA12167FB12 V to 15 V±6.0 V to 7.5 V
HA12169FB11 V to 15 V±6.0 V to 7.5 V
The lower limit of supply voltage depends on the line output reference level.
The minimum value of the overload margin is specified as 12 dB by Dolby Laboratories. HA12167 series
are provided with two line output level, which will permit an optimum overload margin for power supply
conditions.
Reference Voltage
For the single supply operation these devices provide the reference voltage of half the supply voltage that is
the signal grounds. As the peculiarity of these devices, the capacitor for the ripple filter is very small about
1/100 compared with their usual value. The Reference voltage are provided for the left channel and the
right channel separately. The block diagram is shown as figure 1.
V
CC
+
–
77
+
1 µF
–
+
61
L channel
reference
R channel
reference
80
Figure 1 The Block Diagram of Reference Voltage Supply
18
Page 41
HA12167FB/HA12169FB
Operating Mode Control
HA12167FB/HA12169FB provides fully electronic switching circuits. All switches are controlled by serial
data.
Table 2Threshold Voltage (VTH)
Pin No.LoHiUnit
42–0.2 to 1.53.5 to 5.3V
39, 40, 41–0.2 to 1.04.0 to 5.3V
Notes: 1. Voltages shown above are determined by internal circuits of LSI when take pin 47 (DGND pin) as
reference pin. On split supply use, same VTH can be offered by connecting DGND pin to GND
pin.
This means that it can be controlled directly by micro processor.
2. Each pins are on pulled down with 100 k internal resistor.
Therefore, it will be low-level when each pins are open.
3. Note on serial data inputting
(a)The clock frequency on CLK must be less than 500 kHz.
(b)Over shoot level and under shoot level of input signal must be the value shown below.
When connecting microcomputer or Logic-IC with HA12167FB/HA12169FB directly, there is
apprehension of rash-current under some transition timming of raising voltage or falling voltage at V
CC
ON/OFF.
For this countermeasure, connect 10 k to 20 k resistor with each pins. It is shown in test circuit on this
data sheet.
In case of changing NR-ON/OFF at the C-mode, for the countermeasure of the noise of pop, perform the
following processes.
In case of changing NR-OFF to NR-ON at C-mode. C-mode, NR-OFF → B-mode, NR-OFF → B-mode,
NR-ON → C-mode, NR-ON.
In case of changing NR-ON to NR-OFF at C-mode. C-mode, NR-ON → B-mode, NR-ON → B-mode,
NR-OFF → C-mode, NR-OFF.
19
Page 42
HA12167FB/HA12169FB
Under 5.3 V
0
Within –0.2 V
Figure 2 Input Level
Serial Data Formatting
14 bit shift register is employed.
CLK and data are stored during STB being high and data is latched when STB goes high to low.
Reset goes reset a state when reset low and high releasles reset. (High fixed at use time)
Attention Point of Serial Interface
• Reset goes low condition when a power supply is ON or OFF.
• Characteristics select of Bias DAC is connected with equalizer tape selector.
• Bias DAC register is all low when a time of tape select.
• Bias DAC register is all low and Bias DAC out is dropped low level at compulsion by force.
• Input pin select, REC/PB select and Input volume gain select does not select at the same time.
• Input volume must go mute condition when selected of RPI is input pin select.
CLK
DATA
STB
RESET
20
012345678910111213
Latch of data
Reset release
Figure 3 Serial Data Timming Chart Figure
Page 43
HA12167FB/HA12169FB
MUTE
DAC
BIAS CONT
+
Figure 4 Bias DAC Output Circuit
DACOUT
Buff
21
Page 44
HA12167FB/HA12169FB
Serial Data Formatting
Bit Mode ControlInput VoltageEaqualizer VoltageBasic DAC
No.ResetResetResetReset
0Tape
selector 1
1Tape
selector 2
2Tape
speed
3Meter
sensitivity
4Input
selector 1
5Input
selector 2
6REC/PB H PB mode selectionHR
7Input
voltage
gain
8MPXH ONLI-bit 2 LE-bit 2 LB-bit 2 L
9NRH ONLI-bit 3 LE-bit 3 LB-bit 3 L
10 B/CH CLI-bit 4 LE-bit 4 LB-bit 4 L
11 ———I-bit 5 H——B-bit 5 L
12 Registor
selector 1
13 Registor
selector 2
bit 0
bit 1 HL
HMetalNormal
LCromNormal
H Hi speed selectionLI-bit 2 LE-bit 2 LB-bit 2 L
L Normal speed selection
H Meter sensitivity 20 dBupLI-bit 3 LE-bit 3 LB-bit 3 L
L Meter sensitinity normal
bit 4
bit 5 HL
HVRI3RPI
LVRI2VRI1
L REC mode selection
H PB mode volume gain HI-bit 1 LE-bit 1 LB-bit 1 L
L Rec mode volume gain
L OFF
L OFF
L B
bit 12
bit 13 HL
HBias DACInput volume
LEqualizer volume Mode control
LL
channel
LI-bit 1 LE-bit 1 LB-bit 1 L
LI=bit 4 LE-bit 4 LB-bit 4 L
LI-bit 5 H——B-bit 5 L
channel
I-bit 0 LL
I-bit 0 LR
channel
channel
E-bit 0 LL
E-bit 0 LR
B-bit o L
channel
B-bit 0
channel
22
Page 45
HA12167FB/HA12169FB
Input Volume Register
I-bit 5I-bit 4I-bit 3I-bit 2I-bit 1I-bit 0Gain
LLLLLLIncrease
LLLLLH↑
LLLLHL:
LLLLHH:
:::::::
::::::↓
HHHHHLDecrease
HHHHHHMute
Equalizer Volume Register
E-bit 4E-bit 3E-bit 2E-bit 1E-bit 0Gain
LLLLLIncrease
LLLLH↑
LLLHL:
LLLHH:
::::::
:::::↓
HHHHLDecrease
HHHHHMute
Bias DAC Register
B-bit 5B-bit 4B-bit 3B-bit 2B-bit 1B-bit 0Bias
LLLLLLMute
LLLLLHDecrease
LLLLHL↑
LLLLHH:
:::::::
:::::::
HHHHHL↓
HHHHHHIncrease
23
Page 46
HA12167FB/HA12169FB
MPX ON/OFF Switch
MPX-OFF mode means that signal from input amp doesn’t go through the MPX filter, but signal goes
through the NR circuit after being attenuated 3 dB by internal resistor. Refer to figure 5. For not cause any
level difference between MPX-ON mode and MPX-OFF mode, it is requested to use MPX-filter which has
definitely 3 dB attenuated. And when applying other usage except figure 5,
take consideration to give bias voltage to NR-IN terminal by resistor or so on because internal of NR-IN
terminal has no bias resistor.
Application as for the Dubbing Cassette Deck
HA12167FB/HA12169FB series has unprocessor signal from recording out terminals during playback
mode. So, it is simply applied for dubbing cassette decks.
MPX
filter
2.4 k
IA OUTNR INTPVref
IA
MPX ON
6 k
14 k
MPX OFF
3 dB ATT
Figure 5 MPX ON/OFF Switch Block Diagram
5.6 k
X 1
10 mH 220 P
1.5 k
BIAS TRAP
NR
processer
24
Page 47
HA12167FB/HA12169FB
A deck
REC IN VRI 1
PB EQ
Compensation
of low
frequency
reagion
VRI 2 VRI 3REC OUT
HA12167/9
PB EQ
EQ IN
EQ OUT
B deck
PBREC
PB OUT
Figure 6 Application for Dubbing Deck
Injector Current
HA12167FB/HA12169FB has logic circuit which is fabricated by I2L into IC. To operate this circuit, it is
required enough injector current. Injector current goes into from the INJ pin (pin 38) and external resistor
is required to connect to this pin for adequate current. The value of external resistor is obtained by using
following equations. And put them with ±10% tolerance value which is calculated. V
can allow to
INJ
connect to VCC shown below. Large injector current fear to cause mis-operation of Logic under the
condition of high temperature. Also, small injector current fear to cause mis-operation (stop operation).
Under the condition of low temperature. Therefore, pay attention to have good stability of V
INJ
.
INJ
INJ
INJ
V+V
INJEE
R
R
3.6
k=
ΩSingle supply
[]
–0.7
k=
ΩSplit supply
3.6
[]
– 0.7
V
Gain Control of Electronic Volume
HA12167FB/HA12169FB is designed in order to change the gain by DAC fabricated into IC. To reduce
the click noise when changing volume gain instantaneously, required to connect the capacitor and resistor
(CR time constant) to CONT pin (pin 13, 48, 68, 73). These terminals are also be used as output pin of
DAC. Therefore, by forcing voltage and current to these terminals, it is applicable to control volume gain
directly. But, voltage forced to these terminals must be from VCC/2 –2 V to VCC/2 (for split supply use, –2
V to 0 V) in this case. And, this case, change of a gain depending on a temperature gets large.
25
Page 48
HA12167FB/HA12169FB
R
INJ
38
3.6 mA
V
INJ
a) Single supply useb) Split supply use
HA12167/9
70
71
34
R
INJ
38
3.6 mA
V
INJ
V
EE
HA12167/9
70
71
34
Figure 7 Injector Current Application
The Tolerances of External Components for Dolby NR-Block
For adequate Dolby NR tracking response, take external components shown below.
For C5, C6, C24, and C25, please employ a few object of the leak, though you can be useful for an
electrolytic-capacitor.
C27
2200 p
±5%
C28
2200 p
±5%
Unit R :
C : F
Ω
BIAS
R31
18 k
±2%
R24
22 k
±2%
59585756555464
PB OUT
(L)
PB OUT
(R)
234567
C2
2200 p
±5%
SS1
(L)
HA12167/9 (REC 1 Chip)
SS1
(R)
R2
22 k
±2%
C3
2200 p
±5%
R26
560
±2%
SS2
(L)
SS2
(R)
R3
560
±2%
C26
2200 p
±5%
CCR
(L)
CCR
(R)
C4
2200 p
±5%
C25
0.1
±10%
HLS
DET(L)
HLS
DET(R)
C5
0.1
±10%
µ
LLS
DET(L)
LLS
DET(R)
µ
Figure 8 Tolerances of External Components
C24
0.1
µ
±10%
C6
0.1
µ
±10%
26
Page 49
BIAS DAC
The full-scale of DAC is computed by the formula mentioned below.
HA12167FB/HA12169FB
2.4
V
29
R
14 to 16
2.4
V
32
R
14 to 16
R
R
10
13
V=×
[]
V=×
[]
R14: Normal Tape (pin 35)
R15: Metal Tape (pin 36)
R16: Chrome Tape (pin 37)
The maximum source current of DAC output (pin 29, 32) is 2 mA. Therefor the Bias-osc is drived through
external transisitor of emitter-follower.
Level Meter
The coupling capacitor of LMIN pin (9 pin and 52 pin).
For these capacitors, please employ a small object of the leak.
27
Page 50
HA12167FB/HA12169FB
The Application of Equalizer Frequency Response
EQ
IN
EQ
VR
R1
Transfer Function:
F/Q
GP
+
Gm 1
–
+
Gm 4
–
R4
C3
+
OP 2
–
R5
+
OP 7
–
–
Gm 2
+
OP 6
+
–
–
Gm 5
+
–
Gm 6
+
GLFM
GH
Figure 9 REC Equalizer Block Diagram
C2
C1
–
OP 5
+
+
OP 3
–
Gm 3
R8
R6
R7
+
–
R10
EQ
OUT
R9
–
OP 4
+
Vout
Vin
Note: R
=⋅
Gm5
G
V
9
=⋅
R
REF
....14 pin bias resistance
REF
GV......Gain of EQ-VR
28
R
GL
C3
1+
⋅
RR
810
R
1 6.67 10
Gm4
⋅
9
1+
Gm4
+×
1 6.67 10
–10
+× ⋅
Gm6
⋅⋅
S
Gm5
C3
⋅
S
⋅
RR
FM GH
R
GL
–10
S
R
FM
RR
Gm1
⋅⋅
S
+⋅
R
GP
410
RR
67
+⋅
C3
⋅
C2
–10
Gm4
R
S+
FQ
S
–20
R
R
S
4
5
RR
C1
Gm2C2Gm3
FQ F/Q
⋅
⋅
+
RRR
457
⋅
1+
+× ⋅⋅× ⋅⋅
1 4.5 10
–11
⋅⋅ ⋅⋅⋅
+
RR
Gm3
67
×⋅⋅
3.0 10
S+2.5 10
R
FQ
2
S
2
S
Page 51
Gain
g1
g2
g3
HA12167FB/HA12169FB
3dB
BW
f1f2f3f
Figure 10 REC Equalizer Frequency Response
g1=
=
g2
=
g3
f1=
f2 =
f3=
BW =
Q=
9
6.67
×+
(
RR
R
REF
×
9R
R
REF
×
9R
REF
R
GL
GH
GPGH
1
π
×××
26.67
π
××××
26.67
1
⋅
π
2
2.25
–10
10
R
FM
R
GL
–10
10
RR
0.3
–21
×××
10
RR
1
π
×××
42.78
f3
3.51
=×
BW
10
–10
R
F/Q
R
FQ
)
when Gain of EQ- VR is center
FMGH
FQF/Q
R
F/Q
29
Page 52
HA12167FB/HA12169FB
Equalizer Characteristics Control Using a Bias DAC
When only one of the bias DAC channels is used, any one of the six parameters (FM, fQ, f/Q, GH, GL, and
GP) that set the equalizer’s chara cteristics can controlled by the unused bias DAC.
The figure below gives one example.
R
ADJ
37
BIAS ADJ (C)
6 bit
DAC
6 bit
DAC
EQ-
controller
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
FM
fQ
f/Q
GH
GL
GP
HM
BIAS ADJ (M)
BIAS ADJ (N)
GND
BIAS CONT
DAC OUT
V
CC
R’
GP
30
1617181920
NNNCNM HNHC
Figure 11 Bias DAC Control of the GP Parameter
R = R’ //
GPGP
n: DAC step
63 R
ADJ
2 n
Page 53
HA12167FB/HA12169FB
Figures 12, 13, and 14 show the characteristics when GP is controlled by a bias DAC.
60
50
40
Gain (dB)
30
20
1001 k10 k30 k
Frequency (Hz)
Figure 12 Equalizer Gain vs. Frequency
B_DAC
0
16
30
46
63
E_DAC = 0 step
V
= 14 V
CC
R
= 100 k
= 51 k
= 20 k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
FM
RFQ = 51 k
R
F/Q
RGH = 33 k
RGL = 33 k
R’GP = 510 k
R
ADJ
31
Page 54
HA12167FB/HA12169FB
60
55
50
45
EQ peak gain (dB)
40
35
30
0 10203040506070
Figure 13 Equalizer Peak Gain vs. DAC Step Characteristics (1)
B_DAC step
R’GP = 510 k
R’
= 120 k
GP
R’
= 47 k
GP
E_DAC = 0 step
= 14 V
Ω
V
CC
Ω
Ω
= 20 k
Ω
Ω
Ω
Ω
Ω
Ω
R
FM
R
FQ
R
F/Q
R
GH
R
GL
R
ADJ
= 100 k
= 51 k
= 51 k
= 33 k
= 33 k
60
= 33 k (Normal)
55
R
ADJ
R
ADJ
R
ADJ
Ω
= 24 k (Chrome)
Ω
Ω
= 20 k (Metal)
50
45
EQ peak gain (dB)
40
35
0 10203040506070
B_DAC step
Figure 14 Equalizer Peak Gain vs. DAC Step Characteristics (2)
E_DAC = 0 step
= 14 V
V
CC
R
R
R
R
R
R’
FM
FQ
F/Q
GH
GL
= 100 k
= 51 k
= 51 k
= 33 k
= 33 k
= 510 k
GP
Ω
Ω
Ω
Ω
Ω
Ω
32
Page 55
HA12167FB/HA12169FB
When the (variable) width of the DAC step is to be changed, the gain at step 0 or at step 63 must be
changed. The step 0 gain can be changed using R’GP as shown in figure 13. Also, R’GP can be switched
using the tape selector, as shown in figure 15. However, it is necessary to take into account that the value
of R
, which sets the step 63 gain, is also used for the output bias. When the load resistance on pin 33 is
ADJ
RL, the following formula gives the output bias, V
V
= 2.4 × RL / R
BMAX
ADJ
BMAX
.
Therefore, it is possible to compensate the output bias, V
f=100 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
+10 dB
–10 dB
0 dB
56
1.0
–10 dB
0.1
0 dB
Total Harmonic Distortion T.H.D. (%)
+10 dB
0.01
0 102030405060
DAC Step
Page 79
HA12167FB/HA12169FB
Total Harmonic Distortion vs. DAC Step (5)
10
f=1 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
1.0
–10 dB
0.1
0 dB
Total Harmonic Distortion T.H.D. (%)
+10 dB
0.01
0 102030405060
DAC Step
Total Harmonic Distortion vs. DAC Step (6)
10
f=10 kHz PBmode
VRI2in PBOUTout
V =14 V 80 kHz LPF
CC
1.0
–10 dB
0.1
0 dB
Total Harmonic Distortion T.H.D. (%)
+10 dB
0.01
0 102030405060
DAC Step
57
Page 80
HA12167FB/HA12169FB
REC Volume Maximam Input
Level vs. Supply Voltage
15
10
5
RECVol I.DAC Step=42
VRI1in PBOUTout f=1 kHz
REC Volume Maximam Input Level Vin Max (dBs)
0
810121416
Supply Voltage (V)
Volume Gain vs. Frequency (1) HA12167FB
I.DAC 0
20
0
–20
–40
Volume Gain (dB)
–60
–70
VRI1 PBOUT RECVolume V =14 V
101001 k10 k100 k1 M
CC
Frequency (Hz)
I.DAC 10
I.DAC 20
I.DAC 30
I.DAC 40
I.DAC 50
I.DAC 62
58
Page 81
50
40
HA12167FB/HA12169FB
Volume Gain vs. Frequency (2) HA12167FB
I.DAC 0
30
20
Volume Gain (dB)
10
VRI 2 PBOUT PBVolume V =14 V
0
101001 k10 k100 k1 M
Volume Gain vs. Frequency (3) HA12169FB
STEP 0
20
0
–20
STEP 10
I.DAC 32
I.DAC 62
CC
Frequency (Hz)
STEP 20
STEP 30
STEP 40
STEP 50
–40
Volume Gain (dB)
–60
–70
VRI1 PBOUT RECVolume V =14 V
101001 k10 k100 k1 M
CC
Frequency (Hz)
STEP 60
STEP 62
59
Page 82
HA12167FB/HA12169FB
Volume Gain vs. Frequency (4) HA12169FB
40
32
STEP 0
STEP 32
24
STEP 62
16
Volume Gain (dB)
8
VRI 2 PBOUT PBVolume V =14 V
CC
0
101001 k10 k100 k1 M
Frequency (Hz)
Input Volume Gain vs.
Input Volume Gain vs.
Temperature (1) HA12167FB
Temperature (2) HA12167FB
35
20
30
0
RECVol
VRI1in PBOUTout
V =14 V
–20
f=1 kHz
400 Hz HPF
80 kHz LPF
Input Volume Gain (dB)
–40
–60
–40 –20020406080
60
CC
Temperature Ta (°C)
: 0 step
: 10 step
: 20 step
: 30 step
: 62 step
25
Input Volume Gain (dB)
PBVol
20
VRI2in PBOUTout
f=1 kHz
V =14 V
CC
400 Hz HPF
80 kHz LPF
: 0 step
: 32 step
: 62 step
15
–40 –20020406080
Temperature Ta (°C)
Page 83
HA12167FB/HA12169FB
Maximum Output Level vs. Temperature (1)
20
15
10
RECVol
VRI1in PBOUTout
V =14 V T.H.D.=1%
CC
5
400 Hz HPF
Maximum Output Level Vomax (dBs)
80 kHz LPF
: 0 step
: 16 step
: 25 step
: 30 step
0
–40 –20020406080
Temperature Ta (°C)
Maximum Output Level vs. Temperature (2)
20
15
10
PBVol
VRI2in PBOUTout
V =14 V T.H.D.=1%
CC
5
400 Hz HPF
Maximum Output Level Vomax (dBs)
80 kHz LPF
: 0 step
: 32 step
: 62 step
0
–40 –20020406080
Temperature Ta (°C)
Level Meter Output vs. Input Level
V = 14 V
4.0
CC
fin = 1 kHz
0 dB = 775
mVrms
3.0
2.0
Level Meter Output (V)
1.0
0
–80 –60 –40 –2002040
Input Level Vin (dB)
Level Meter Output vs.
Supply Voltage (1) HA12167FB
4
3
2
: 0 dB range Vin=+12 dB
: 0 dB range Vin=0 dB
: 0 dB range Vin=–20 dB
Level Meter Output (V)
: 20 dB range Vin=–20 dB
1
0
8 1012141618
Supply Voltage (V)
61
Page 84
HA12167FB/HA12169FB
Level Meter Output vs.
Supply Voltage (2) HA12169FB
4
3
2
: 0 dB range Vin=+12 dB
: 0 dB range Vin=0 dB
: 0 dB range Vin=–20 dB
Level Meter Output (V)
: 20 dB range Vin=–20 dB
1
0
8 1012141618
Supply Voltage (V)
Level Meter Output vs. Temperature
4.0
3.0
2.0
: 0 dB range 0 dB
: 0 dB range 12 dB
: 20 dB range –5 dB
Level Meter Output LMout (V)
1.0
: 20 dB range –20 dB
f = 1 kHz V = 14 V
0
–40 –20020406080
Temperature Ta (°C)
CC
Level Meter Output vs. Frequency
3.2
: Normal range Vin=0 dB
3.0
2.8
2.6
2.4
Level Meter Output (V)
2.2
2.0
201001 k10 k50 k
Frequency (Hz)
: 20 dBup range Vin=–20 dB
V = 14 V
CC
62
Page 85
HA12167FB/HA12169FB
)
55
Equalizer Gain vs. Frequency (1)
50
40
30
20
Equalizer Gain (dB)
10
(1) (2) (3) (4) (5) (6)
NN HN NC HC NM HM
33 k 33 k 33 k 33 k 47 k 47 k
RGP
33 k 33 k 51 k 51 k 51 k 51 k
RGL
33 k 33 k 51 k 51 k 51 k 51 k
RGH
51 k 20 k 51 k 20 k 51 k 20 k
RF/Q
51 k 27 k 51 k 27 k 51 k 27 k
RFQ
100 k 100 k 100 k 100 k 100 k 100 k
RFM
EQin EQout V =14 V EQ.DAC=0 Vin=–38 dBS
CC
(5)
(3)
(1)
(4)
(2)
(6)
5
101001 k10 k100 k1 M
Frequency (Hz
Equalizer Gain vs. Frequancy (2)
50
40
30
20
Equalizer Gain (dB)
DAC 16
DAC 0
DAC 30
10
EQin EQout V =14 V Vin=–36 dBS
0
101001 k10 k100 k1 M
CC
Frequency (Hz)
63
Page 86
HA12167FB/HA12169FB
q
)
)
40
0
–40
–80
Equalizer Gain
–120
EQin EQout V =14 V Vin=–36 dBS
–160
101001 k10 k100 k1 M
Equalizer Gain vs. Frequancy (3)
CC
Fre
uency (Hz
Total Harmonic Distortion vs.
50
Equalizer Output Level (1)
EQin EQout 0 step
V
= 14 V, 0 dB = –1 dBs
CC
DAC 30
DAC 31
3.5 kHz
10
1.0
Total Harmonic DIstortion T.H.D. (%)
350 Hz
0.1
–30–20–100102030
Equalizer Output Level (dB
10 kHz
1 kHz
15 kHz
6.3 kHz
64
Page 87
Total Harmonic Distortion vs.
q
)
50
10
1.0
Equalizer Output Level (2)
EQin EQout 16 step
V
= 14 V, 0 dB = –4 dBs
CC
HA12167FB/HA12169FB
15 kHz
315 Hz
3.15 kHz
6.3 kHz
Total Harmonic DIstortion T.H.D. (%)
0.1
–30–20–100102030
Equalizer Output Level (dB)
Total Harmonic Distortion vs.
Equalizer Output Level (3)
50
EQin EQout 30 step
V
= 14 V, 0 dB = –8 dBs
CC
10
1.0
10 kHz
315 Hz
1 kHz
1 kHz
15 kHz
Total Harminic Distortion T.H.D. (%)
0.1
–30–20–100102030
E
ualizer Output Level (dB
10 kHz
6.3 kHz
3.15 kHz
65
Page 88
HA12167FB/HA12169FB
Equalizer Amp. Gain vs. R
GL
45
EQin EQout V = 14 V
CC
Vin = –46 dBS = 0 dB
EQ.DAC = 0 Step
40
R = R = 33 k
GHGP
R = R = 51 k
FQF/Q
R = 100 k
FM
Ω
Ω
Ω
35
30
25
Equalizer Amp. Gain GL (dB)
: 316 Hz
: 1 kHz
20
15
5 k10 k30 k100 k300 k1 M
R (Ω)
GL
45
Equalizer Amp. Gain vs. R
EQin EQout V = 14 V
CC
GH
Vin = –46 dBS = 0 dB
EQ.DAC = 0 Step
40
35
R = 33 k
GL
R = 16 k
GP
R = R = 24 k
FQ
R = 390 k
FM
F/Q
Ω
Ω
Ω
Ω
f = 6.3 kHz
30
25
Equalizer Amp. Gain GH (dB)
20
15
5 k10 k30 k100 k300 k1 M
R (Ω)
GH
66
Page 89
HA12167FB/HA12169FB
Equalizer Amp. Gain vs. R
GP
65
60
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
55
50
R = R = 33 k
GL
FQ
FM
GH
F/Q
R = R = 51 k
R = 100 k
f = 19 kHz
Ω
Ω
Ω
45
Equalizer Amp. Gain GP (dB)
40
35
5 k10 k30 k100 k300 k1 M
R (Ω)
GP
100 k
Equalizer Cutoff Frequency vs. R
FM
EQin EQout
Vcc = 14 V
EQ.DAC=0 Step
10 k
1 k
Equalizer Cutoff Frequency (Hz)
R = 120 k
GL
R = 7.5 k
GH
R = R = 24k
FQF/Q
R = 16 k
GP
Ω
Ω
Ω
Ω
100
5 k 10 k30 k100 k300 k 500 k
RFM (Ω)
67
Page 90
HA12167FB/HA12169FB
1 M
Equalizer Peak Frequency vs. R
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
100 k
10 k
R
Equalizer Peak Frequency fo (Hz)
F/Q
: 12 k
: 24 k
: 51 k
: 100 k
: 200 k
: 390 k
Ω
Ω
Ω
Ω
Ω
Ω
1 k
5 k 10 k30 k100 k300 k 500 k
RFQ (Ω)
FQ
Equalizer Quality Factor vs. R
FQ
15
EQin EQout
Vcc = 14 V
EQ.DAC = 0 Step
Vin = - 50 dBs
R =
10
F/Q
: 390 k
: 200 k
: 100 k
Ω
: 51 k
Ω
: 24 k
Ω
: 12 k
5
Equalizer Quality Factor Q.
0
5 k10 k30 k100 k300 k1 M
(Ω)
R
FQ
Ω
Ω
Ω
68
Page 91
HA12167FB/HA12169FB
31
26
EQ. Gain (dB)
21
16
0102030
–60
Equalizer Gain vs. DAC Step
VCC = 14 V
EQin EQOUTout
f = 1 kHz
Vin = –26dBs
DAC Step
Equalizer Noise vs. DAC Step
V
= 14 V
CC
JIS-A filter
–65
EQ. Noise (dBs)
–70
–75
0102030
DAC Step
69
Page 92
HA12167FB/HA12169FB
15
Equalizer Vo max, Vin max vs. DAC Step
10
Vin max
5
Equalizer Vo max (dBs)
0
102030
Equalizer Vo max, Vin max vs. Supply Voltage
15
EQin EQout
0
f = 1 kHz
T.H.D.=1%
Vo max
EQin EQout
f = 1 kHz V
T.H.D. = 1%
DAC Step
0
–5
–10
Equalizer Vin max (dBs)
= 14 V
cc
–15
Equalizer Gain vs. Temperature
30
10
5
Equalizer Vo max (dBs)
0
–3
8 10121416
Supply Voltage (V)
Vo max
: 0 Step
: 16 Step
: 30 Step
Vin max
: 0 Step
: 16 Step
: 30 Step
–5
–10
–15
–18
25
20
Gain (dB)
Equalizer Vin max (dBs)
15
10
–40 –20020406080
0 step
16 step
30 step
V = 14 V, Vin = –26 dBs
CC
f = 1 kHz
Temperature Ta (°C)
70
Page 93
HA12167FB/HA12169FB
(°C)
Equalizer Vo max, Vin max vs. Temperature
150
Vo max
10
5
Equalizer Vo max (dBs)
EQin EQout V = 14 V
0
0 step f = 1 kHz
–3
–40 –20020406080
Maximum Output Level vs. BIAS Adjust Register
14
12
10
8
Vin max
CC
Temperature Ta
V = 14 V
CC
B. DAC = 63 Step
Normal
Crom
Metal
–5
–10
Equalizer Vin max (dBs)
–15
–18
90
6
4
Maximum Output Level (V)
2
0
5 k10 k100 k1 M
BIAS Adjust Register R
ADJ
(Ω)
71
Page 94
HA12167FB/HA12169FB
y
)
14
12
10
8
6
4
DAC Output Level (V)
2
0 102030405060
DAC Output Level vs. DAC Step
V =14 V
CC
Metal : 20 k
Crom : 24 k
Normal : 33 k
Bias Vomax vs. Supply Voltage
20
18
16
Ω
Ω
Ω
Metal
DAC Step
Metal
Crom
Normal
VCC Line
Crom
Normal
72
14
12
Bias Vo max (V)
10
8
6
4
810121416
Suppl
B.DAC=63 step
R =10 k
ADJ
Voltage (V
Ω
Page 95
Package Dimensions
HA12167FB/HA12169FB
17.2 ± 0.3
14
60
41
61
17.2 ± 0.3
80
1
*0.32 ± 0.08
0.30 ± 0.06
20
0.12
0.83
0.10
*Dimension including the plating thickness
Base material dimension
Unit: mm
40
0.65
21
M
2.70
3.05 Max
0.15 ± 0.04
*0.17 ± 0.05
1.6
0° – 8°
+0.15
–0.10
0.10
Hitachi Code
JEDEC
EIAJ
Weight
(reference value)
0.8 ± 0.3
FP-80A
—
Conforms
1.2 g
73
Page 96
HA12167FB/HA12169FB
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URLNorthAmerica : http:semiconductor.hitachi.com/
For further information write to:
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive,
San Jose,CA 95134
Tel: <1> (408) 433-1990
Fax: <1>(408) 433-0223
Europe: http://www.hitachi-eu.com/hel/ecg
Asia (Singapore): http://www.has.hitachi.com.sg/grp3/sicd/index.htm
Asia (Taiwan): http://www.hitachi.com.tw/E/Product/SICD_Frame.htm
Asia (HongKong): http://www.hitachi.com.hk/eng/bo/grp3/index.htm
Japan: http://www.hitachi.co.jp/Sicd/indx.htm
Hitachi Asia Ltd.
Taipei Branch Office
3F, Hung Kuo Building. No.167,
Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
Fax: <886> (2) 2718-8180
Copyright ' Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
74
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
Fax: <852> (2) 730 0281
Telex: 40815 HITEC HX
1P94/FIP6CAP MOTOR(A)O Capstan motor control output signal pin. (Deck-A)
2P93/FIP5CAP X1/~X2(A)O Capstan motor speed control output pin. (Deck-A)
3P92/FIP4SOLENOID(A)O Solenoid coil control signal output pin. (Deck-A)
4P91/FIP31GO Grid (G1) control output pin.
5P90/FIP22GO Grid (G2) control output pin.
6P81/FIP13GO Grid (G3) control output pin.
7P80/FIP04GO Grid (G4) control output pin.
8VDD+5VI+5 V. Power supply pin.
9P27/SCK0DOLBY CLKO Clock control output pin of dolby IC.
10P26/SO0/SB1DOLBY DATAO Data control output pin of dolby IC.
11P25/SI0/SB0DOLBY STBO Strobe control output pin of dolby IC.
12P24/BUSY~DOLBY RSTO Reset control output pin of dolby IC.
13P23/STB70/~120(A)O Play equalizer signal select output pin. (Deck-A)
14P22/SCK170/~120(B)O Play equalizer signal select output pin. (Deck-B)
15P21/SO1PB X1/~X2O Playback frequency bandwidth select signal output pin.
16P20/SI1LINE MUTEO Line mute signal control output pin.
17RESET~RESETIReset signal input pin.
18P74REC MUTE(B)O Recording mute signal control output pin. (Deck-B)
19P73~POFFIpower stoppage detection input pin.
20AVSSGNDIGND. For A/D port of power supply.
21P17/ANI7~FT MODEITest mode setting input pin. For factory.
22P16/ANI6~TEST MODEIMechanism test mode input pin.
23P15/ANI5SIGNAL LCHI Display the level of L-channel/ search signal of A/D input pin.
24P14/ANI4SIGNAL RCHIDisplay the level of R-channel/ search signal of A/D input pin.
25P13/ANI3VOLUMEIVOLUME A/D input pin.
26P12/ANI2KEY(2)IKey A/D input pin.
27P11/ANI1KEY(1)IKey A/D input pin.
28P10/ANI0KEY(0)IKey A/D input pin.
29AVDD+5VI5V. Power supply.
30AVREF+5VIPower supply pin for A/D port.
31P04/XT1INot used. To connect to GND.
32XT2Not used. Open pin.
33VSSGNDIGND pin.
34X1X1IClock signal input pin. (5MHz)
35X2X2O Clock signal output pin.
36P37BIAS(B)O Bias control output signal pin. (Deck-B)
37P36/BUZNORMAL BIAS(B) O Bias (Normal) control output signal pin. (Deck-B)
38P35/PCLHIGH BIAS(B)O Bias (High) control output signal pin. (Deck-B)
39P34/TI2REC/~PB(B)O R/P head select output signal pin. (Deck-B)
40P33/TI1DECK ~A/BO R/P head select output signal pin. (Deck-A/B)
41P32/TO2R.SENS(B)IDetect the reel rotation input signal pin. (Deck-B)
42P31/TO1R.SENS(A)IDetect the reel rotation input signal pin. (Deck-A)
43P30/TO0CAP MOTOR(B)O Capstan motor control signal output pin. (Deck-B)
44P03/INTP3/C
45P02/INTP2SOLENOID(B)O Solenoid control output pin. (Deck-B)
46P01/INTP1~RI OUTPUTO RI signal output pin.
47P00/INTP0/T
48IC(VPP)GNDIGND. Internal connection pin.
49P72~PACK SW(A)ITape installation detection input signal pin. (Deck-A.)
50P71HIGH SW(A)ITa
CAP X1/~X2(B)O Speed control of capstan motor output pin.
RI_INPUTIRI signal input pin.
I/O
e class (HIGH) detection si nal in ut terminal. (Deck-A)
51P70~PLAY SW(A)IHead position detection input signal pin. (Deck-A)
52VDD+5VI+5V.
53P127/FIP33PLAY_SW(B)IHead position detection input signal pin. (Deck-B)
54P126/FIP32HIGH SW(B)ITape class (HIGH) detection signal input pin. (Deck-B)
55P125/FIP31~PACK SW(B)ITape installation detection signal input pin. (Deck-B)
56P124/FIP30F.REC INH.SW(B)IProhibition setting detection signal switch input pin
of FWD recording. (Deck-B)
57P123/FIP29METAL_SW(B)ITape class (METAL) detection signal input pin. (Deck-B)
58P122/FIP28R_REC_INH_SW(BIProhibition setting detection signal switch input pin
of FWD recording. (Deck-B)
59P121/FIP27INot used.
60P120/FIP26SEARCH SPECIInput terminal for setting whether to install selection.
61P117/FIP25P16O Segment (P16) control output pin.
62P116/FIP24P15O Segment (P15) control output pin.
63P115/FIP23P14O Segment (P14) control output pin.
64P114/FIP22P13O Segment (P13) control output pin.
65P113/FIP21P12O Segment (P12) control output pin.
66P112/FIP20P11O Segment (P11) control output pin.
67P111/FIP19P10O Segment (P10) control output pin.
68P110/FIP18P9O Segment (P9) control output pin.
69P107/FIP17P8O Segment (P8) control output pin.
70P106/FIP16P7O Segment (P7) control output pin.
71VLOAD-VDISPNegative power supply for FL tube.
72P105/FIP15P6O Segment (P6) control output pin.
73P104/FIP14P5O Segment (P5) control output pin.
74P103/FIP13P4O Segment (P4) control output pin.
75P102/FIP12P3O Segment (P3) control output pin.
76P101/FIP11P2O Segment (P2) control output pin.
77P100/FIP10P1O Segment (P1) control output pin.
78P97/FIP9RELAYO Relay control output signal pin.
79P96/FIP8STANDBY LEDO Standby LED control output pin.
80P95/FIP7FILAMENTO Filament control signal output pin.
TA-RW255
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