NZQA5V6XV5T1G Series
Quad Array for
ESD Protection
This quad monolithic silicon voltage suppressor is designed for
applications requiring transient overvoltage protection capability. It is
intended for use in voltage and ESD sensitive equipment such as
computers, printers, business machines, communication systems,
medical equipment, and other applications. Its quad junction common
anode design protects four separate lines using only one package.
These devices are ideal for situations where board space is at a
premium.
Specification Features
• SOT−553 Package Allows Four Separate Unidirectional
Configurations
• Low Leakage < 1 mA @ 3 V for NZQA5V6XV5T1G
• Breakdown Voltage: 5.6 V − 6.8 V @ 1 mA
• ESD Protection Meeting IEC61000−4−2 − Level 4
• These are Pb−Free Devices
Mechanical Characteristics
• Void Free, Transfer−Molded, Thermosetting Plastic Case
• Corrosion Resistant Finish, Easily Solderable
• Package Designed for Optimal Automated Board Assembly
• Small Package Size for High Density Applications
• 100% Lead Free, MSL1 @ 260°C Reflow Temperature
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SOT−553
CASE 463B
PLASTIC
MARKING DIAGRAM
xx MG
G
xx = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
1
2
5
3
ORDERING INFORMATION
Device Package Shipping
NZQA5V6XV5T1G SOT−553
(Pb−Free)
NZQA5V6XV5T3G SOT−553
(Pb−Free)
NZQA6V2XV5T1G SOT−553
(Pb−Free)
NZQA6V8XV5T1G SOT−553
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
4
†
4000 / Tape & Reel
16000 /
Tape & Reel
4000 / Tape & Reel
4000 / Tape & Reel
© Semiconductor Components Industries, LLC, 2007
April, 2007 − Rev. 3
1 Publication Order Number:
NZQA5V6XV5T1/D
NZQA5V6XV5T1G Series
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
I
V
V
RWM
V
QV
V
Z
I
Z
MAXIMUM RATINGS (T
Maximum Reverse Peak Pulse Current
PP
Clamping Voltage @ I
C
PP
Working Peak Reverse Voltage
I
Maximum Reverse Leakage Current @ V
R
Breakdown Voltage @ I
BR
I
Test Current
T
Maximum Temperature Coefficient of V
BR
I
Forward Current
F
Forward Voltage @ I
F
Maximum Zener Impedance @ I
ZT
Reverse Current
ZK
Maximum Zener Impedance @ I
ZK
F
= 25°C unless otherwise noted)
A
T
ZT
ZK
BR
RWM
VCV
BR
V
RWM
I
I
F
I
V
R
F
I
T
I
PP
Uni−Directional
V
Characteristic Symbol Value Unit
Peak Power Dissipation (8 X 20 ms @ TA = 25°C) (Note 1)
P
Steady State Power − 1 Diode (Note 2) P
Thermal Resistance Junction to Ambient
R
Above 25°C, Derate
Maximum Junction Temperature T
Jmax
Operating Junction and Storage Temperature Range TJ T
ESD Discharge MIL STD 883C − Method 3015−6
V
IEC1000−4−2, Air Discharge
IEC1000−4−2, Contact Discharge
Lead Solder Temperature (10 seconds duration) T
PK
D
q
JA
stg
PP
L
100 W
300 mW
370
2.7
°C/W
mW/°C
150 °C
−55 to +150 °C
16
kV
16
9
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (T
= 25°C)
A
Typ Capacitance
Device
Device
Marking
Breakdown Voltage
VBR @ 1 mA (Volts)
Min Nom Max V
Leakage Current
IRM @ V
RWM
I
RWM
RM
(mA)
VC Max @ I
PP
@ 0 V Bias
(Note 3)
VF @ IF =
200 mA
VC (V) IPP (A) (pF) (V)
NZQA5V6XV5T1G 56 5.32 5.6 5.88 3.0 1.0 10.5 10 90 1.3
NZQA6V2XV5T1G 62 5.89 6.2 6.51 4.0 0.5 11.5 9.0 80 1.3
NZQA6V8XV5T1G 68 6.46 6.8 7.14 4.3 0.1 12.5 8.0 70 1.3
1. Non−repetitive current per Figure 1.
2. Only 1 diode under power. For all 4 diodes under power, PD will be 25%. Mounted on FR−4 board with min pad.
3. Capacitance of one diode at f = 1 MHz, VR = 0 V, TA = 25°C
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2
Max
NZQA5V6XV5T1G Series
110
100
90
80
PP
70
60
50
40
PERCENT OF I
30
20
10
0
14
12
10
8
6
4
, CLAMPING VOLTAGE (V)
C
V
2
0
WAVEFORM
PARAMETERS
= 8 ms
t
r
t
= 20 ms
d
c−t
td = IPP/2
t, TIME (ms)
Figure 1. Pulse Waveform
NZQA6V8XV5T1
NZQA6V2XV5T1
NZQA5V6XV5T1
IPP, PEAK PULSE CURRENT (A)
110
100
PP
90
80
70
60
50
40
30
20
% OF RATED POWER OR I
10
2520
30151050
0
TA, AMBIENT TEMPERATURE (°C)
1501251007550250
Figure 2. Power Derating Curve
100
90
80
70
60
50
40
30
C, CAPACITANCE (pF)
20
10
12.5111
13.5357910
0
VBR, BREAKDOWN VOLTAGE (V)
6.86.25.6
7.16.55.95.3
Figure 3. Clamping Voltage versus
Peak Pulse Current
Figure 4. Typical Capacitance
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3
D
−X−
45
12 3
e
1.35
0.0531
NZQA5V6XV5T1G Series
PACKAGE DIMENSIONS
A
E
−Y−
b 5 PL
0.08 (0.003) X
SOLDERING FOOTPRINT*
M
0.3
0.0118
1.0
0.0394
Y
0.0177
SOT−553, 5 LEAD
CASE 463B−01
ISSUE B
L
H
E
c
0.45
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
DIMAMIN NOM MAX MIN
b 0.17 0.22 0.27 0.007
c
D 1.50 1.60 1.70 0.059
E 1.10 1.20 1.30 0.043
e 0.50 BSC
L 0.10 0.20 0.30 0.004
H
E
STYLE 1:
PIN 1. BASE
MILLIMETERS
0.50 0.55 0.60 0.020
0.08 0.13 0.18
1.50 1.60 1.70 0.059 0.063 0.067
STYLE 2:
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
0.003 0.005 0.007
INCHES
NOM MAX
0.022 0.024
0.009 0.011
0.063 0.067
0.047 0.051
0.020 BSC
0.008 0.012
0.5
0.5
0.0197
0.0197
mm
ǒ
SCALE 20:1
inches
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
NZQA5V6XV5T1/D
4
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