OKI MSM82C55A-2GS Technical data
E2O0020-27-X3
¡ Semiconductor MSM82C55A-2RS/GS/VJS
¡ Semiconductor
This version: Jan. 1998
Previous version: Aug. 1996
MSM82C55A-2RS/GS/VJS
CMOS PROGRAMMABLE PERIPHERAL INTERFACE
GENERAL DESCRIPTION
The MSM82C55A-2 is a programmable universal I/O interface device which operates as high
speed and on low power consumption due to 3m silicon gate CMOS technology. It is the best
fit as an I/O port in a system which employs the 8-bit parallel processing MSM80C85AH CPU.
This device has 24-bit I/O pins equivalent to three 8-bit I/O ports and all inputs/outputs are
TTL interface compatible.
FEATURES
• High speed and low power consumption due to 3m silicon gate CMOS technology
• 3 V to 6 V single power supply
• Full static operation
• Programmable 24-bit I/O ports
• Bidirectional bus operation (Port A)
• Bit set/reset function (Port C)
• TTL compatible
• Compatible with 8255A-5
• 40-pin Plastic DIP (DIP40-P-600-2.54): (Product name: MSM82C55A-2RS)
• 44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM82C55A-2VJS)
• 44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM82C55A-2GS-2K)
1/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
CIRCUIT CONFIGURATION
V
GND
D
- D
0
RD
WR
RESET
CS
8
CC
8
Group A
Port A
8
PA
- PA
0
7
(8)
8
Group A
Control
4
(High Order
Group A
Port C
4
PC4 - PC
7
4 Bits)
8
7
Data
Bus
Buffer
8
Internal Bus Line
8
4
(Low Order
Group B
Port C
4 Bits)
4
PC0 - PC
3
Group B
Read/
Write
Control
Logic
Control
8
Group B
Port B
8
PB0 - PB
7
(8)
A
0
A
1
2/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
PIN CONFIGURATION (TOP VIEW)
40 pin Plastic DIP
CS
GND
A
A
PC
PC
PC
PC
PC
PC
PC
1
PA
3
2
PA
2
3
PA
1
4
PA
0
5
RD
6
CS
7
GND
8
A
1
9
A
0
10
PC
7
11
PC
6
12
PC
5
13
PC
4
14
PC
0
15
PC
44 pin Plastic QFP
0PA1PA2PA3
RD
PA
4443424140
1
2
3
1
4
0
5
7
6
6
7
5
8
4
9
0
10
1
11
2
1415161718
12
13
3PB0PB1PB2
NC
PC
VCCPA
39
38
CC
V
PB
4
5PA6PA7
PA
37
192021
3
4PB5PB6
PB
363534
WR
22
NC
33
32
31
30
29
28
27
26
25
24
23
RESET
D
0
D
1
D
2.
D
3
D
4
D
5
D
6
D
7
V
CC
PB
7
1
16
PC
2
17
PC
3
18
PB
0
19
PB
1
20
PB
2
44 pin Plastic QFJ
0PA1PA2PA3
RD
PA
6
5
432
NC
1
4
PA
44
5PA6PA7
PA
43
424140
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
PA
PA
PA
PA
WR
RESET
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
V
CC
PB
PB
PB
PB
PB
WR
4
5
6
7
7
6
5
4
3
CS
GND
PC
NC
PC
PC
PC
PC
PC
39
7
8
A
9
1
A
10
0
11
7
12
13
6
14
5
15
4
16
0
17
1
2021222324
18
19
2PC3PB0PB1PB2
PC
NC
252627
3
4PB5PB6PB7
PB
PB
RESET
38
D
0
37
D
1
36
D
2.
35
D
3
34
NC
33
D
4
32
D
5
31
D
6
30
D
7
29
V
CC
28
3/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
ABSOLUTE MAXIMUM RATINGS
Parameter Unit
Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
Power Dissipation
Symbol
V
V
V
OUT
T
STG
P
CC
IN
D
Conditions
Ta = 25°C
with respect
to GND
—
Ta = 25°C
MSM82C55A-2RS
Rating
MSM82C55A-2GS MSM82C55A-2vJS
–0.5 to +7
–0.5 to V
–0.5 to V
CC
CC
+0.5
+0.5
–55 to +150
0.7
1.01.0
OPERATING RANGE
Parameter UnitSymbol
Supply Voltage
Operating Temperature
V
CC
T
op
Range
3 to 6
–40 to 85
RECOMMENDED OPERATING RANGE
Parameter UnitSymbol
Supply Voltage
Operating Temperature
"L" Input Voltage V
"H" Input Voltage
Min.
V
CC
T
op
IL
V
IH
4.5
–40
–0.3
2.2
Typ.
5V
+25
—
—
Max.
V
CC
5.5
+85
+0.8
+ 0.3
V
V
V
°C
W
V
°C
°C
V
V
DC CHARACTERISTICS
Parameter Unit
"L" Output Voltage
"H" Output Voltage
Input Leak Current
Output Leak Current
Supply Current
(Standby)
Average Supply
Current (Active)
Symbol
V
OL
V
OH
I
LI
I
LO
I
CCS
I
CC
Conditions
I
= 2.5 mA
OL
I
= –40 mA
OH
I
= –2.5 mA
OH
£ V
0 £ V
IN
CC
0 £ V
CS ≥ V
V
IH
≥ V
V
IL £
OUT
CC
CC
£ V
–0.2 V
–0.2 V
0.2 V
CC
I/O Wire Cycle
82C55A-2
...8 MHzCPU Timing
V
= 4.5 V to 5.5 V
CC
Ta
= –40°C to +85°C
(C
= 0 pF)
L
MSM82C55A-2
Min.
–10
—
4.2
3.7
–1
—
—
Typ. Max.
—
—
—
—
—
0.1
—
0.4 V
—V
—V
1 mA
10 mA
10
mA
8mA
4/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
AC CHARACTERISTICS
Parameter
Setup Time of Address to the Falling Edge of RD
Hold Time of Address to the Rising Edge of RD
RD Pulse Width
Delay Time from the Falling Edge of RD to the Output of
Defined Data
Delay Time from the Rising Edge of RD to the Floating of
Data Bus
Time from the Rising Edge of RD or WR to the Next Falling
Edge of RD or WR
Setup Time of Address before the Falling Edge of WR
Hold Time of Address after the Rising Edge of WR
WR Pulse Width
Setup Time of Bus Data before the Rising Edge of WR
Hold Time of Bus Data after the Rising Edge of WR
Delay Time from the rising Edge of WR to the Output of
Defined Data
Setup Time of Port Data before the Falling Edge of RD
Hold Time of Port Data after the Rising Edge of RD
ACK Pulse Width
STB Pulse Width
Setup Time of Port Data before the rising Edge of STB
Hold Time of Port Bus Data after the rising Edge of STB
Delay Time from the Falling Edge of ACK to the Output of
Defined Data
Delay Time from the Rising Edge of ACK to the Floating of
Port (Port A in Mode 2)
Delay Time from the Rising Edge of WR to the Falling Edge of
OBF
Delay Time from the Falling Edge of ACK to the Rising Edge of
OBF
Delay Time from the Falling Edge of STB to the Rising Edge of
IBF
Delay Time from the Rising Edge of RD to the Falling Edge of
IBF
Delay Time from the the Falling Edge of RD to the Falling Edge
of INTR
Delay Time from the Rising Edge of STB to the Rising Edge of
INTR
Delay Time from the Rising Edge of ACK to the Rising Edge of
INTR
Delay Time from the Falling Edge of WR to the Falling Edge of
INTR
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WOB
t
AOB
t
t
t
t
t
t
AR
RA
RR
RD
DF
RV
AW
WA
WW
DW
WD
WB
t
IR
HR
AK
ST
PS
PH
AD
KD
SIB
RIB
RIT
SIT
AIT
WIT
(V
= 4.5 V to 5.5 V, Ta = –40 to +85°C)
CC
MSM82C55A-2
Min. Max.
20
0
100
—
10
200
0
20
150
50
30
—
20
10
100
100
20
50
—
20
—
—
—
—
—
—
—
—
—ns
—ns
—ns
120 ns
75 ns
—ns
—ns
—ns
—ns
—ns
—ns
200 ns
—ns
—ns
—ns
—ns
—ns
—ns
150 ns
250 ns
150 ns
150 ns
150 ns
150 ns
200 ns
150 ns
150 ns
250 ns
UnitSymbol
Remarks
Load
150 pF
Note: Timing measured at VL = 0.8 V and VH = 2.2 V for both inputs and outputs.
5/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
TIMING DIAGRAM
Basic Input Operation (Mode 0)
t
RR
RD
Port Input
t
, A
CS, A
1
0
D7 - D
0
Basic Output Operation (Mode 0)
WR
D7 - D
0
t
AW
, A
CS, A
1
0
AR
t
IR
t
RD
t
WW
t
DW
t
HR
t
RA
t
DF
t
WD
t
WA
Port Output
Strobe Input Operation (Mode 1)
STB
t
SIB
IBF
INTR
RD
Port Input
t
PS
t
WB
t
ST
t
SIT
t
RIT
t
PH
t
RIB
6/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
Strobe Output Operation (Mode 1)
WR
t
AOB
OBF
t
WOB
INTR
t
WIT
ACK
t
AK
t
AIT
Port Output
t
WB
Bidirectional Bus Operation (Mode 2)
WR
OBF
INTR
ACK
STB
IBF
Port A
RD
t
WOB
t
AOB
t
AK
t
ST
t
SIB
t
t
PS
t
AD
PH
t
KD
t
RIB
7/26
¡ Semiconductor MSM82C55A-2RS/GS/VJS
OUTPUT CHARACTERISTICS (REFERENCE VALUE)
1 Output "H" Voltage (VOH) vs. Output Current (IOH)
5
4
(V)
OH
3
2
1
Output "H" Voltage V
0
0 –1–2–3–4–5
Output Current IOH (mA)
Ta = –40 to + 85°C
VCC = 5.0 V
2 Output "L" Voltage (VOL) vs. Output Current (IOL)
5
4
(V)
OL
3
2
1
Output "L" Voltage V
0
012345
VCC = 5.0 V
Ta = –40 to +85°C
Output Current IOL (mA)
Note: The direction of flowing into the device is taken as positive for the output current.
8/26
Loading...