OKI MR27V852E Technical data
FEDR27V852E-01-01
1
Semiconductor
This version: Jan. 2001
MR27V852E
524,288–Word ×××× 16–Bit or 1,048,576–Word ×××× 8–Bit
8–Word x 16-Bit or 16–Word x 8-Bit Page Mode One Time PROM
GENERAL DESCRIPTION
The MR27V852E is a 8 Mbit electrically One Time Programmable Read-Only Memory with page mode. Its
configuration can be electrically switched betw een 524,28 8-word × 16-bit and 1,048,576-word × 8-bit by the state
of the BYTE pin. The MR27V852E supports high speed asynchronous read operation using a single 3.3V power
supply.
FEATURES
· 524,288-word × 16-bit/1,048,576-word × 8-bit electrically switchable configuration
· Page size of 8-word x 16-Bit or 16-word x 8-Bit
· +3.3 V power supply
· Access time
Random access mode 100 ns MAX
Page access mode 30 ns MAX
· Operating current 80 mA MAX
· Standby current 50 µA MAX
· Input/Output TTL compatible
· Tri-state output
· Packages:
42-pin plastic DIP (DIP42-P-600-2.54) (Product Name : MR27V852ERA)
42-pin plastic SOJ (SOJ42-P-400-1.27) (Product Name : MR27V852EJA)
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1
Semiconductor
PIN CONFIGURATION (TOP VIEW)
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
V
OE
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
SS
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/ V
V
D15/A–1
D7
D14
D6
D13
D5
D12
D4
V
FEDR27V852E-01-01
MR27V852E
1
A18
2
A17
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
PP
SS
CC
CE
V
OE
D0
D8
D1
D9
D2
D10
D3
D11
12
SS
13
14
15
16
17
18
19
20
21
NC
42
A8
41
A9
40
39
A10
A11
38
A12
37
A13
36
35
A14
A15
34
A16
33
BYTE/ V
32
31
V
D15/A–1
30
D7
29
D14
28
27
D6
D13
26
D5
25
D12
24
23
D4
22
V
PP
SS
CC
42-pin DIP
42-pin SOJ
Pin name Functions
D15/A–1 Data output/Address input
A0 to A18 Address input
D0 to D14 Data output
CE Chip enable
OE Output enable
BYTE/V
V
CC
V
SS
PP
Mode switch/Program power supply voltage
Power supply voltage
GND
NC Non connection
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1
A0
Semiconductor
BLOCK DIAGRAM
FEDR27V852E-01-01
MR27V852E
A–1
× 8/× 16 Switch
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
Address Buffer
CE BYTE/V
OE
CE PGMOE
Memory Cell Matrix
524,288 × 16-Bit or 1,048,576× 8-Bit
Row Decoder
Multiplexer
Output Buffer
Column Decoder
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
PP
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
FUNCTION TABLE
Mode CE OE BYTE/V
PP
Read (16-Bit) L L H D
Read (8-Bit) L L L D
Output disable L H
Standby H ∗
H
L
H
L
Program L H D
Program inhibit H H Hi–Z
9.75 V 4.0 V
Program verify H L
∗: Don’t Care (H or L)
V
CC
3.3 V
D0 to D7 D8 to D14 D15/A–1
OUT
Hi–Z L/H
Hi–Z
Hi–Z
D
OUT
∗
∗
IN
OUT
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FEDR27V852E-01-01
1
Semiconductor
MR27V852E
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Condition Value Unit
Operating temperature under bias Ta 0 to 70 °C
Storage temperature Tstg
Input voltage V
Output voltage V
Power supply voltage V
Program power supply voltage V
Power dissipation per package P
I
O
CC
PP
D
—
–55 to 125 °C
–0.5 to VCC+0.5 V
relative to V
SS
–0.5 to VCC+0.5 V
–0.5 to 5 V
–0.5 to 11.5 V
—1.0W
RECOMMENDED OPERATING CONDITIONS
(Ta = 0 to 70°C)
Parameter Symbol Condition Min. Typ. Max. Unit
VCC power supply voltage V
VPP power supply voltage V
Input “H” level V
Input “L” level V
CC
PP
IH
IL
VCC = 3.0 to 3.6 V
3.0 — 3.6 V
–0.5 — VCC+0.5 V
2.2 — VCC+0.5∗ V
–0.5∗∗ —0.6V
Voltage is relative to VSS.
∗ : Vcc+1.5 V(Max.) when pulse width of overshoot is less than 10 ns.
∗∗ : -1.5 V(Min.) when pulse width of undershoot is less than 10 ns.
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