FEDL7050LA-02
This version: June 2001
1
Semiconductor
Previous version: Sep. 2000
ML7050LA
Bluetooth RF Transceiver IC
GENERAL DESCRIPTION
The Oki ML7050LA is a highly integrated BluetoothTM radio transceiver designed to operate in the global 2.4 GHz
Industrial, Scientific, and Medical (ISM) ban d. The ML 7050LA archi tecture incorporates v ital intermedi ate f requency
(IF) and radio frequency (RF) circuits on a low cost, integration-friendly bulk CMOS process.
Bluetooth technology directly supports short range, wireless voice and data communications with 1 Mbps throughput
performance in the public ISM band across many applications, employing rapid frequency hopping (1.6K hops/s)
spread spectrum (FHSS) approach. The ML7050LA highly integrated CMOS Bluetooth RF transceiver LSI will
establish a 2.4 to 2.5 GHz communication link compliant with Bluetooth Specification Version 1.1 and is packaged in
the Oki 48-pin ball grid array (BGA) package requires only 7 mm x 7 mm of the systems critical board space.
Oki’s Bluetooth L SI family includes bas eband LSI (ML 70511LA ), Sys tem Developm ent Kit (BT-SD K), fi rmware an d
software (BTS Pack1/2/3). Togeth er, th e RF LSI (ML7050L A) and baseban d (ML70511L A) dev ices f orm a compl ete
hardware solution optimized for low system cost, small form factor, and reduced power consumption Bluetooth
applications.
FEATURES
•
Circuit design based on the Bluetooth Specification Version 1.1.
•
CMOS process technology lowers system cost and simplifies future baseband integration
•
Fully integrated CMOS RF LSI: TX/RX switch, power amplifier, LNA, image rejection mixer, VCO, PLL, gm-
C IF filter, modulator, and demodulator.
•
Low IF circuitry eliminates off-chip SAW filter reducing bill-of-material (BOM)
•
Class 2 power operation compliant covering a wide range of applications
•
Seamless interface with Oki’s ML70511LA Bluetooth baseband controller LSI
•
Power supply voltage: 2.7 to 3.3 V
•
Package: 48-pin BGA (7 mm x 7 mm x 1.41mm)
BLUETOOTH is a trademark owned by Bluetooth SIG, Inc. and licensed to Oki Electric Industry.
The information contained herein can change without notice owing to the product being under development.
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Oki Semiconductor
BLOCK DIAGRAM
FEDL7050LA-02
ML7050LA
RF_Ant
Vdd_PA
Vdd_VCO
Vdd_PLL
Vdd_IF
Vdd_IRM_LO
Vdd_IRM
GND
SW
Vdd_LNA
Tune_C
IRMLNA
IF BPF
LIM_C1
Limiting
LIM_C2
AMP
LPF_C
DEMOD
RXD
Gm-C
Tuning
(SW Control)
TX_POW
RX_POW
PLL_POW
PLL
PLL_CLK
PLL_DATA
Loop Filter
PLL_LE
PLL_OFF
SWPA
AMP
VCO
PLL_LF1PLL_LF2
MCLK
Gaussian
Filter
TXD
Vdd_DGND_D
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Rating Unit
Power supply voltage V
Input voltage V
Allowable power dissipation P
Storage temperature T
DD
I
D
STG
Ta = 25°C –0.3 to 4.5 V
–0.3 to VDD +0.3 V
-0.5W
- –55 to +150 °C
In-Band TBD dBmInput RF Power
- Out-of-Band TBD dBm
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Conditions Min. Typ. Max. Unit
Power supply voltage V
DD
Full specification range Ta - 0 - 55
Operating temperature range Ta - –20 - +85 °C
- 2.7 3.0 3.3 V
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FEDL7050LA-02
1
Oki Semiconductor
ML7050LA
ELECTRICAL CHARACTERISTICS
(V
= 3.0V, Ta = 0 to +55°C)
DD
Symbol Description Conditions Min. Typ. Max. Unit
Digital Inputs
Vih Digital input high 2.4 VDD+0.3 V
Vil Digital input low -0.3 0.4 V
Digital Outputs
Voh Digital output high Ioh=-2mA 2.2 3.6 V
Vol Digital output low Iol=2mA 0 0.8 V
Clock
MCLK Master clock frequency - 12.13,
16
Current Consumption Ta=25°C
IDDO
Receive Mode - 55 - mA
Transmit Mode - 34 - mA
PLL Mode TX and RX disabled - 22 - mA
applied and power
IDDS Standby Mode
V
DD
-10-uA
control pins disabled
Receiver
RF
F
R
IN
RF Frequency 2.4 2.5 GHz
Reception sensitivity Includes ANT BPF loss,
Note 1
–75 dBm
- Maximum Received Signal –20 dBm
- Spurious level
30 MHz to 1 GHz –57 dBm
1 GHz to 12.75 GHz –47 dBm
- Input VSWR - 2:1 -
Z
IN
RF Input impedance SW in 50 Ω
Transmitter
f
RF
P
O
RF Frequency 2.4 2.5 GHz
RF Output power
fRF = 2.4 to 2.5 GHz,
024dBm
— Carrier frequency tolerance initial accuracy (static) -75 75 KHz
f
stab1
f
stab2
f
stab3
Frequency drift
Frequency drift
Frequency drift
(1 slot packet)
(3 slot packet)
(5 slot packet)
-25 25 KHz
-40 40 KHz
-40 40 KHz
Maximum frequency drift
rate
— Power stability over temp TBD dBm
— Modulation index 0.28 0.35 -
±500 kHz –20 dBm
— In-band spurious level
Offset = 2 MHz –20 dBm
Offset > 3 MHz –40 dBm
-MHz
400 Hz/µs
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Oki Semiconductor
30 MHz to 1 GHz –36 dBm
— Out-of-band spurious level
— Output VSWR - 2:1 -
Z
OUT
PLL
— Phase noise
— PLL lock-up time - - 150 µs
RF Output impedance SW out 50 Ω
1 GHz to 12.75 GHz –30 dBm
1.8 GHz to 1.9 GHz –47 dBm
5.15 GHz to 5.3 GHz –47 dBm
@550 kHz –103 dBc/Hz
@2 MHz –120 dBc/Hz
FEDL7050LA-02
ML7050LA
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Oki Semiconductor
PIN LAYOUT (TOP VIEW)
A1 ball
corner
12345 678
FEDL7050LA-02
ML7050LA
Gnd
A
RF_Ant Gnd RX_POW Gnd Gnd Test1 Test2
B
Gnd Gnd Lim_C1 Lim_C2
C
Vdd_PA Test7 Gnd Tune_C
D
Vdd_
VCO
E
Test5 Gnd Gnd LPF_C
F
PLL_
LF1
G
PLL_
LF2
H
Vdd_
LNA
Test8 Vdd_IF Test6
Gnd
Vdd_
PLL
Vdd_
IRM
PLL_
CLK
PLL_
DATA
Vdd_
IRM_LO
MCLK
PLL_LE
Test3
GND Test9 Gnd_D
RXD Vdd_D Vdd_IF
Test4 TXD
TX_POW
PLL_
POW
PLL_
OFF
Test10
TOP VIEW
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