OKI ML7005 User Manual

E2A0050-29-81

¡ Semiconductor ML7005

¡ Semiconductor

This version: Aug. 1999

Previous version: May 1999

ML7005

DTMF Transceiver

GENERAL DESCRIPTION

The ML7005 is a multi-functional DTMF transceiver LSI with built-in a DTMF signal generator, a DTMF signal receiver, a call progress tone generator, a call progress tone detector, and a FAX (FX) signal detector. Each functional block can be controlled by an external MCU via a 4-bit processor interface. The ML7005 does not contains a modem. However, the DTMF system data transmission is possible at less than 66 bps by setting the DTMF receiver to the high-speed detection mode. The ML7005 operates with low-power consumption and is suitable for remote control systems, especially for ACR (Automatic Cost Routing) controllers.

FEATURES

• Wide range of power supply voltage : +2.7 V to +5.5 V

• Low power consumption Operating mode : 4.0 mA (VDD = 3 V) Typ. Operating mode : 5.0 mA (VDD = 5 V) Typ. Power down mode : 1 mA Typ.

• The 4-bit processor interface supports both the Intel processor mode in which a read signal and a write signal are used independently of each other, and the Motorola processor mode in which a read signal and a write signal are used in common.

• The DTMF receiver can select either the high-speed detection mode (signal repeat time: more than 60 ms) or the normal detection mode (signal repeat time: more than 90 ms).

• Built-in call progress tone generator

• Built-in FAX signal (FX: 1300 Hz) detector

• The DTMF signal generator, DTMF signal detector, call progress tone generator, and call progress tone detector can operate concurrently.

• Built-in 3.579545 MHz crystal oscillator circuit

• Package :

32-pin plastic SSOP (SSOP32-P-430-1.00-K) (Product name: ML7005MB)

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¡ Semiconductor ML7005

BLOCK DIAGRAM

FXDIM

FXDIO

CPDIP

CPDIM

CPDIO

DTRIP

DTRIM

DTRIO

DTGO

DTAI

DTAO

CPTGO

CPAI

– +

+ –

– +

PRE

LPF

PRE

LPF

PRE

LPF

Detector

CPT

Detector

DTMF

Receiver

DTMF

Generator

CPT

Generator

Control

Processor

Interface

FXD0

CPD0

PTYPE

READ WR

ALE

CPAO

GND

Generator

Status

CLKO

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¡ Semiconductor ML7005

PIN CONFIGURATION (TOP VIEW)

1DTRIO

2DTRIM

3DTRIP

4SG

5CPAO

6CPAI

7CPTGO

8PTYPE

10PD

11X1

12X2

13CLKO

14READ

15CS

32 CPDIO

31 CPDIM

30 CPDIP

29 FXDIO

28 FXDIM

27 FXDO

26 DTAO

25 DTAI

24 DTGO

23 GND

22 CPDO

21 D0

20 D1

19 D2

18 D3

16ALE

17 WR

32-Pin Plastic SSOP

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¡ Semiconductor ML7005

PIN DESCRIPTION

Pin Symbol Type Description

1ODTRIO Output pin for DTMF signal receiver input amplifier.

See the figure 8 for adjusting the receive signal level. See the figure 10 when the DTMF signal receiver is not used.

2IDTRIM Inverting input pin for DTMF signal receiver input amplifier.

3IDTRIP Non-inverting input pin for DTMF signal receiver input amplifier.

4OSG Output pin for signal ground.

The output voltage is half of V Connect SG and GND by a 1 µF capacitor. This pin goes to a high impedance state when in power down mode.

5OCPAO Output pin for amplifier used for adjusting the transmit output level of CPT

(Call Progress Tone) signal generator. The non-inverting input of this amplifier is internally connected to SG. See the figure 11 for adjusting the transmit signal level. When this amplifier is not used, the CPAO pin should be shorted to the CPAI pin.

6ICPAI Inverting input pin for amplifier used to adjust the transmit level of the CPT signal

generator.

7OCPTGO Analog output pin for CPT signal generator.

The tone amplitude is approximately - 3 dBm. The transmit signal level can be changed by using the CPAO and CPAI pins. See the figure 11 for adjusting the transmit signal level. Control the ON/OFF of CPT transmission by using CPGC of the control register.

8IPTYPE Input pin for selecting the processor mode.

This selection determines the functions of READ, CS, ALE, WR, D1 and D0 pins. When this pin is "1", the Intel processor mode is selected. When this pin is "0", the Motorola processor mode (MSM7524-compatible) is selected. This pin should be fixed at "0" or "1".

9—V

10 IPD Input pin for controlling the power down mode.

11 IX1

12 OX2

13 OCLKO 3.579545 MHz clock output pin. This pin can drive one ML7005 device.

Power supply pin.

When this pin is set to "1", the entire LSI enters the power down mode and each functional operation stops. The DC level of the analog output pin becomes undefined. The digital output pins (FXD0, CPD0) and status register indicate a non-detection state. At that time, the control register CR and DTMF transmit register DTMFT are cleared. ("0" is written) The internal circuits (timer, etc. for each detector) also are reset. After turning on the power, set this pin to "1" to reset the LSI before using this LSI. When this pin is set to "0", the normal operation starts.

X1 and X2 are connected to a 3.579545 MHz crystal. See "Oscillation Circuit" of the FUNCTIONAL DESCRIPTION for reference.

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¡ Semiconductor ML7005

Pin Symbol Type Description

14 IREAD Input pin for processor interface.

When PTYPE is "1" (Intel processor mode) : This pin is the read control input pin. When this pin is set to "0", data in the specified register is output to the bus lines (D3 to D0). At that time, CS must be "0". See the figure 4 for processor interface timing. When PTYPE is "0" (Motorola processor mode) : This pin is the clock input pin (equivalent to SCLK of the MSM7524). When in Write mode, data in D3 to D0 is written to the specified register at the falling edge of the READ signal. When in Read mode, data in the specified register is output to D3 to D0 when the READ signal is "1", and D3 to D0 is opened when the READ signal is "0". The READ signal is not necessarily a periodical signal. See the figure 5 for processor interface timing.

15 ICS Chip select input pin for processor interface.

When the CS signal is "0", read and write operations are possible. When the CS signal is "1", read and write operations are impossible.

16 IALE Input pin for processor interface.

When PTYPE is "1" (Intel processor mode) : This pin is the address latch enable input pin. The register address data in D1 to D0 is latched at the falling edge of ALE. When PTYPE is "0" (Motorola processor mode) : This pin is the address data input pin (equivalent to AD0 of the MSM7524). When this pin is "1", data can be written to the control register (CR) and data can be read from the status register (STR). When this pin is "0", data can be written to the DTMF transmit register (DTMFT) and data can be read from the DTMF receive register (DTMFR).

17 IWR Input pin for processor interface.

When PTYPE is "1" (Intel processor mode) : This pin is the Write control input. Data in the data bus lines (D3 to D0) is written to the specified register. At that time, CS must be "0". When PTYPE is "0" (Motorola processor mode) : This is the signal input pin for controlling the Read and Write modes (equivalent to R/W of the MSM7524). When this pin is "1", the LSI enters the Read mode. When this pin is "0", the LSI enters the Write mode.

18 - 21 I/OD3 - D0 4-bit data bus I/O pins for processor interface.

When PTYPE is "1" (Intel processor mode), D1 and D0 are also used for addressing.

22 OCPDO Digital output pin for CPT detector.

When a 400 Hz signal is input to the CPDIP and CPDIM pins, this pin is "1". When the DOEN register is "0", this pin is fixed at "0".

23 —GND Ground pin.

24 ODTGO Analog output pin for DTMF signal generator.

The tone amplitude is approximately - 9.0 dBm for a low group and approximately

- 7.0 dBm for a high group. The transmit signal level can be changed by using the DTAI and DTAO pins. See the figure 11 for adjusting the transmit signal level. Control the ON/OFF of signal transmission by using MFC of the control register.

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Pin Symbol Type Description

25 IDTAI Inverting input pin for operational amplifier used for adjusting the transmit output

level of the DTMF signal generator. The non-inverting input of this amplifier is internally connected to SG. See the figure 11 for adjusting the transmit signal level. When this amplifier is not used, the DTAO pin should be shorted to the DTAI pin.

26 ODTAO Output pin for operational amplifier used for adjusting the transmit output level of

the DTMF signal generator.

27 OFXDO Digital output pin for FAX signal (FX) detector.

When a 1300 Hz signal is input to the FXDIM, this pin is "1". When a call progress tone (CPT) is received (CPD0="1"), this pin is forced to be "0". When the DOEN register is "0", this pin is fixed at "0".

28 IFXDIM Inverting input pin for input amplifier used for detecting the FAX signal (FX).

See the figure 9 for adjusting the receive signal level. When the FX detector is not used, the FXDIM pin should be shorted to the FXDIO pin.

29 OFXDIO Output pin for input amplifier used for detecting the FAX signal (FX).

30 ICPDIP Non-inverting input pin for input amplifier used for detecting the CPT.

See the figure 8 for adjusting the receive signal level. When the CPT detector is not used, see the figure 10.

31 ICPDIM Inverting input pin for input amplifier used for detecting the CPT.

32 OCPDIO Output pin for input amplifier used for detecting the CPT.

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ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Condition Rating Unit

Power Supply Voltage V

Input Voltage V

Storage Temperature T

Output Short Current I

Power Dissipation P

stg

SHT

Ta = 25°C

With respect to GND

–0.3 to +7.0

–0.3 to VDD + 0.3

–55 to +150 °C—

35 mAShort to VDD or GND

100 mW—

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Condition Typ. Unit

Power supply voltage V

Operating Temperature Range T

Input Clock Frequency Deviation f

Input Clock duty DUTY %

X1, X2 Load Capacitance C1, C2 pF

SG Bypass Capacitance C3

VDD Bypass Capacitance C4 mF

An external clock is applied to

CLK

SG - GND

- GND

—

Digital Input Rise Time T

Digital Input Fall Time T

Digital Ouput Load Capacitance C

Frequency Deviation — —

PD, READ, CS,

ALE, WR, D3 to D0

FCDO, CPDO, D3 to D0

DL1

CLKO

DL2

+25°C ±5°C

Temperature Characteristics — —–30°C to +85°C –100 +100

Equivalent Series Resistance — — W——90

Crystal

Min. Max.

2.7 5.5

–30

–0.1

0.1

—50

—40

—20

–100 +100

3.6 V—

—

—50—

—

+85

+0.1

—

°C—

ppm

Load Capacitance — 16 pF———

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¡ Semiconductor ML7005

ELECTRICAL CHARACTERISTICS

DC and Digital Interface Characteristics

Parameter Symbol Condition or Applicable pin Typ. Unit

VDD = 2.7 to 5.5 V

Power Down Mode

—

= V

= 0 V

Other than

CLK0

CLKO, CL £ 20pF

= 3 V

= 5 V

= –100 mA

= 100 mA

Power Supply Current

Digital Input Voltage V

Digital Input Current I

Digital Output Voltage V

Analog Input Resistance R

Analog Output DC Potential V

Analog Output Load Resistance R

DD1

DD2

OHCK

OLCK

OUT

Operating Mode

*1 DTRIM, DTRIP, CPAI, DTAI, FXDIM, CPDIP, CPDIM *2 DTRIO, CPAO, CPTGO, DTGO, DTAO, FXDIO, CPDIO *3 DTRIO, CPAO, CPTGO, DTGO, DTAO, FXDIO, CPDIO, SG

= 2.7 to 5.5 V, Ta = –30 to +85°C)

Min. Max.

— 9.0

—

5.0 ——

—

0.7 V

0.0

–10

– 0.2

0.0 0.2

VDD – 0.5

0.0

——

VDD /2–0.1 VDD /2–0.1

——

—

– 0.06

0.06

—

10 MW

VDD/2

0.3V

+10

0.5

—KW20 —

mA4.0 ——

AC CHARACTERISTICS

AC Characteristics 1 DTMF Signal Generator

Parameter Symbol Condition Typ. Unit

DTMF Tone Transmit Amplitude

Tone Transmit Amplitude Ratio

Tone Frequency Accuracy

Total Harmonic Distortion

Out-of-Band Spurious

*1 0dBm = 0.775 Vrms (For all AC characteristics)

DTTL

DTTH

DTDF

DDT

THD

Measured at

DTGO

With respect to

output signal

level measured

at DTGO

Low Group Tone

High Group Tone

– V

DTTH

DTTL

To Nominal

Frequency

Harmonics -

Fundamental

4kHz to 8kHz

8kHz to 12kHz

12 kHz to each

4 kHz band

= 2.7 to 5.5 V, Ta = –30 to +85°C)

Min. Max.

–9.0 –7.5–10.5

–8.5 –5.5

1.0

–1.5

–7.0

2.0

—

3.0

+1.5

–40 –23—

P–51

— P–20

P–60— P–40

P–75— P–60

dBm

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