OKI ML632 User Manual

FEDL63295A-02

Semiconductor

This version: Jul. 2001 Previous version: Nov. 2000

ML63295A

4-Bit Microcontroller with Built-in 3072-Dot Matrix LCD Driver and Melody Circuit

GENERAL DESCRIPTION

The ML63295A is a CMOS 4-bit microcontroller that employs Oki’s original CPU core nX-4/250. The ML63295A operates on a power supply voltage of 6 V. With built-in 3072- dot matrix LCD drivers (96 S EG. × 32 COM.), th e ML63295A is suited for applicati ons such as electronic dictionaries with an LCD.

FEATURES

• Extensive instruction set 439 instructions:

Transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask operations, bit operations, ROM table reference, external memory transfer, stack operations, flag operations, jump, conditional branch, call/return, control

• Wide variety of addressing modes Indirect addressing mode for 4 types of data memory with current bank register, extra bank register, HL register and XY register Data memory bank internal direct addressing mode

• Processing speed 2 clocks per machine cycle, with most instructions executed in 1 machine cycle Minimum instruction execution time : 61 µs (@ 32.768 kHz system clock)

: 1 µs (@ 2 MHz system clock)

• Clock generation circuit Low-speed clock : Crystal oscillation or RC oscillation selected with mask option

(30 kHz to 80 kHz)

High-speed clock: Ceramic oscillation or RC oscillation selected with software

(2 MHz max)

• Pro g r am memory s p ace 32 K words Basic instruction length is 16 bits/1word.

• Data memory space 2048 nibbles

• External data memory space 64 Kbytes (expandable furthermore by using the I/O ports)

• Stack level Call stack level : 16 levels Register stack level : 16 levels

1/38

Semiconductor

• Ports Input ports:

Selectable as input pull-up resistor/input pull-down resistor/high impedance input.

Output ports:

Selectable as P-channel open drain output/N-channel open drain output/high-impedance output/CMOS output.

I/O ports:

Selectable as input pull-up resistor/input pull-down resistor/high impedance input. Selectable as P-channel open drain output/N-channel open drain output/high-impedance output/

CMOS output. Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports:

Input port : 2 ports × 4 bits

Output port : 6 ports × 4 bits

Input-output port : 6 ports × 4 bits

• Melody output Melody frequency : 529 Hz to 2979 Hz Tone length : 63 varieties Tempo : 15 varieties Melody data : Stored in program memory Buzzer driver signal output : 4 kHz

FEDL63295A-02

ML63295A

• LCD dri ve r Number of segments : 3072 Max. (96 SEG. × 32 COM.) Duty : Selectable as 1/2, 1/4, 1/6, 1/8, 1/ 1 0, 1/12, 1/14, 1/16, 1/ 18, 1/20,

1/22, 1/24, 1/26, 1/28, 1/30, or 1/32 duty Bias : Selectable as 1/5 or 1/6 bias (regulator built-in) Frame frequency : ex. 64 Hz (at 1/32 duty), 128 Hz (at 1/16 duty), 256 Hz (at 1/8

duty), 512 Hz (at 1/4 duty), 1024 Hz (at 1/2 duty) Contrast : 16 levels adjustable Display modes : Selectable as all-ON mode/all-OFF mode/power down

mode/normal display mode

• Multiplier/divider circuit

Multiplier : (8 bits) × (8 bits) → Product (16 bits) Divider : (16 bits)/(8 bits) → Quotient (16 bits), Remainder (8 bits)

• System reset function System reset through RESET pin System reset by power-on detection System reset by low-speed oscillation halt

• Battery check Low-voltage supply check The value of the judgment voltage is selected by the software (by setting the LD1 and LD0 bits of BLDCON).

LD1 LD0 Judgment voltage (V) Remarks

1 0 4.5 ±0.1 Ta = 25°C 1 1 5.1 ±0.1 Ta = 25°C

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Semiconductor

• Timers and Counter 8-bit timer : 2

Selectable as auto-reload mode/clock frequency measurement

mode Watchdog timer : 1 100 Hz timer : 1

Measurable in steps of 1/100 sec. 15-bit time-base counter : 1

1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read

• Serial port Mode : Selectable as UART mode, synchronous mode UART communication speed : 1200 bps, 2400 bps, 4800 bps, 9600 bps Clock freq uency in synchronous mode : Inter nal clock mode (32.7 68 kHz), External clock fr equency Data length : 5 to 8 bits

• Shift regis ter Shift clock : 1 × or 1/2 × system clock, external clock Data length : 8 bits

FEDL63295A-02

ML63295A

• Interrupt factors External interrupt : 5 Internal interrupt : 12

• Operating temperature : –20 to +70°C

• Power supply voltage : 3.5 to 7.2 V

• Package:

Chip (212 pads) : (Product name: ML63295A-xxxWA) 240-pin plastic QFP (QFP240-P-3232-0.50-BK4) : (Product name: ML63295A-xxxGA)

….under consideration

xxx indicates a code number.

3/38

FEDL63295A-02

Semiconductor

ML63295A

BLOCK DIAGRAM

Asterisks (*) indicate the port secondary functions. Signal n ames enclosed by chain lines ( ) in dicate in terf ace signals of the V supply system.

power supply system. Signal names enclosed by indicates signals of the V

DDI

DDE

power

TIMING

CONT.

RSP

STACK CAL.S:16-level REG.S:16-level

RESET

TST1 TST2

XT0 XT1

OSC0 OSC1

DDX1

DDX2

DDX3

DDX4

C1 C2

DD1

DD2

DD3

DD4

DD5

DD6

DDL

DDE

CPU core

CBR EBR

ALU

INSTRUCTION

DECODER

RST

TST

OSC

BIAS

VRV

H X

nX-4/250

L Y

INT

100HzTC

INT

A G Z

MIE

RAM

2048N

INT

MULDIV

TBC

BLD

WDT

BUS

CONT.

DATA BUS

INT

ROM

32 KW

EXTMEM

64 KB

TIMER

8 bit (2ch)

SIO

SFT

MELODY

INPUT

PORT

OUTPUT

I/O

PORT

LCD

DSPR

D0-7* A0-15*

RD* WR*

T2CK* T3CK*

RXC* TXC* RXD* TXD*

SCLK* SIN* SOUT*

MD MDB

P0.0-P0.3 P1.0-P1.3

P2.0-P2.3 P3.0-P3.3 P4.0-P4.3 P5.0-P5.3 P6.0-P6.3 P7.0-P7.3

P8.0-P8.3 P9.0-P9.3 PA.0-PA.3 PB.0-PB.3 PC.0-PC.3 PE.0-PE.3

COM1-COM32 SEG0-SEG95

DDI

4/38

Semiconductor

PIN CONFIGURATION (TOP VIEW)

(NC)

170

OSC1

OSC0

169

168

167

166

DDLVDDVDDE

165

VDDV

164

(NC)

163

162

(NC) (NC) (NC) PE.3 PE.2 PE.1 PE.0 PC.3 PC.2 PC.1 PC.0 PB.3 PB.2 PB.1 PB.0 PA.3 PA.2 PA.1 PA.0

P9.3 P9.2 P9.1 P9.0 P8.3 P8.2 P8.1 P8.0 P7.3 P7.2 P7.1 P7.0 P6.3 P6.2 P6.1 P6.0 P5.3 P5.2 P5.1 P5.0 P4.3 P4.2 P4.1 P4.0 P3.3 P3.2 P3.1 P3.0 P2.3 P2.2 P2.1 P2.0 P1.3 P1.2 P1.1 P1.0

P0.3 (NC) (NC)

(NC)

DDI

MDB

178

177

179

180 (NC) 181(NC) 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240

12345678910111213141516171819202122232425

(NC)

176

175

XT1

XT0

RESET

173

174

TST1

TST2

172

171

(NC)

161

160

159

158

DDX4

157

(NC)

156

155

DDX1VDDX2VDDX3

154

153

272829

(NC)

152

151

DD5VDD6

150

DD4

149

DD3

(NC)

147

148

333435

146

DD1VDD2

VSSV

145

144

363738

COM32

COM31

COM30

142

141

143

3940414243

COM27

COM28

COM29

140

COM23

COM24

COM25

139

COM26

138

137

COM20

COM21

COM22

134

135

133

132

131

136

454647484950515253545556575859

COM18

COM19

COM17

130

129

128

SEG94

SEG95

127

126

FEDL63295A-02

ML63295A

SEG93

SEG90

SEG91

SEG92

(NC)

125

124

123

122

121

120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100

99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

(NC) (NC) (NC) SEG89 SEG88 SEG87 SEG86 SEG85 SEG84 SEG83 SEG82 SEG81 SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 SEG73 SEG72 SEG71 SEG70 SEG69 SEG68 SEG67 SEG66 SEG65 SEG64 SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 (NC) (NC) (NC)

P0.2

P0.1

P0.0

(NC)

COM1

COM2

COM3

COM4

COM5

COM6

COM7

COM9

COM8

COM10

COM11

COM12

COM13

COM14

SEG0

COM15

COM16

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

SEG15

SEG16

SEG17

SEG18

240-Pin Plastic QFP

(GA:QFP240-P-3232-0.50-BK4)

Note: Pins marked as (NC) are no-connection pins which are left open.

SEG21

SEG19

SEG20

SEG24

SEG22

SEG23

SEG25

SEG26

SEG27

SEG28

SEG29

SEG30

SEG31

SEG32

SEG33

(NC)

SEG34

SEG35

(NC)

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Semiconductor

PAD CONFIGURATION

Pad Layout

SEG84

160 SEG86

159 SEG85

158

SEG82

SEG83

156

157

SEG87

163 SEG89

162 SEG88

161

155 SEG81

154 SEG80

153 SEG79

SEG76

152 SEG78

151 SEG77

150

SEG74

SEG73

149 SEG75

148

147

SEG72

SEG71

SEG70

146

145

144

143 SEG69

142 SEG68

141 SEG67

140 SEG66

139 SEG65

138 SEG64

137 SEG63

136 SEG62

135 SEG61

134 SEG60

133 SEG59

SEG57 131

132 SEG58

130 SEG56

SEG55

129

128 SEG54

127 SEG53

126 SEG52

125 SEG51

124 SEG50

123 SEG49

122 SEG48

121 SEG47

120 SEG46

119 SEG45

SEG44

SEG43

SEG42

118

117

116

FEDL63295A-02

115 SEG41

114 SEG40

113 SEG39

112 SEG38

111 SEG37

110 SEG36

ML63295A

SEG90 SEG91 SEG92 SEG93 SEG94

SEG95 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32

DD1 DD2

V V

DD3

DD4

DD5

DD6 DDX1 DDX2

DDX3 DDX4

C1 197

VDD199

DDL

DDE

OSC1203

TST1 205 TST2 206

XT1

RESET

MD 210

MDB

DDI

164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193V 194V 195 196V

198C2 200

201 202V

204OSC0

207 208XT0 209

211 212

( 0,0 )

109 SEG35 108 SEG34 107 SEG33 106 SEG32 105

SEG31

104 SEG30

SEG29

103 102

SEG28 SEG27101 SEG26100

SEG25 98 SEG24 97 SEG23 96 SEG22 95 SEG21 94 SEG20 93 SEG19 92 SEG18 91 SEG17 90 SEG16 89 SEG15

SEG14

88 87

ML63295A

SEG13 86 SEG12 85 SEG11 84

SEG10 83 SEG9 82 SEG8 81 SEG7 80 SEG6 79 SEG5 78 SEG4 77 SEG3 76 SEG2 75 SEG1 74 SEG0 73 COM16 72 COM15 71 COM14 70 COM13 69 COM12 68 COM11 67 COM10 66 COM9 65 COM8 64 COM7 63 COM6 62 COM5 61 COM4 60 COM3 59 COM2 58 COM1 57 V

56 P0.0 55 P0.1 54 P0.2

1PE.3

PA.0 16

PA.1 15

PA.2 14

PA.3 13

PB.0 12

PB.1 11

PB.2 10

PE.0 4

PE.1 3

PE.2 2

PB.3 9

PC.0 8

PC.1 7

PC.2 6

PC.3 5

Chip size : 8.25 mm × 8.20 mm Chip thickness : 350 Coordinate origin : center of chip

Pad hole size : 100 µm × 100 µm Pad size : 110 µm × 110 µm Minimum pad pitch : 120

Note: The chip substrate voltage is VSS.

P9.3 17

P7.0 28

P6.2 30

P6.1 31

P6.3 29

P7.1 27

P7.2 26

P7.3 25

P8.0 24

P8.1 23

P8.2 22

P8.3 21

P9.0 20

P9.1 19

P9.2 18

µm (280 µm: available as required)

µm

P0.3 53

P1.0 52

P1.1 51

P1.2 50

P1.3 49

P2.0 48

P2.1 47

P2.2 46

P2.3 45

P3.0 44

P3.1 43

P3.2 42

P3.3 41

P4.0 40

P4.1 39

P4.2 38

P4.3 37

P5.0 36

P5.1 35

P5.2 34

P5.3 33

P6.0 32

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Semiconductor

Pad Coordinates

FEDL63295A-02

ML63295A

Pad No. Pad Name X (µm) Y (µm)

1 PE.3 –3138 –3905 2 PE.2 –3018 –3905 3 PE.1 –2898 –3905 4 PE.0 –2778 –3905 5 PC.3 –2658 –3905 6 PC.2 –2538 –3905 7 PC.1 –2418 –3905 8 PC.0 –2298 –3905

9 PB.3 –2178 –3905 10 PB.2 –2058 –3905 11 PB.1 –1938 –3905 12 PB.0 –1818 –3905 13 PA.3 –1698 –3905 14 PA.2 –1578 –3905 15 PA.1 –1458 –3905 16 PA.0 –1338 –3905 17 P9.3 –1218 –3905 18 P9.2 –1098 –3905 19 P9.1 –978 –3905 20 P9.0 –858 –3905 21 P8.3 –738 –3905 22 P8.2 –618 –3905 23 P8.1 –498 –3905 24 P8.0 –378 –3905 25 P7.3 –258 –3905 26 P7.2 –138 –3905 27 P7.1 –18 –3905 28 P7.0 102 –3905 29 P6.3 222 –3905 30 P6.2 342 –3905 31 P6.1 462 –3905 32 P6.0 582 –3905 33 P5.3 702 –3905 34 P5.2 822 –3905 35 P5.1 942 –3905 36 P5.0 1062 –3905 37 P4.3 1182 –3905 38 P4.2 1302 –3905 39 P4.1 1422 –3905

Center of chip: X

Pad No. Pad Name X (µm) Y (µm)

40 P4.0 1542 –3905 41 P3.3 1662 –3905 42 P3.2 1782 –3905 43 P3.1 1902 –3905 44 P3.0 2022 –3905 45 P2.3 2142 –3905 46 P2.2 2262 –3905 47 P2.1 2382 –3905 48 P2.0 2502 –3905 49 P1.3 2622 –3905 50 P1.2 2742 –3905 51 P1.1 2862 –3905 52 P1.0 2982 –3905 53 P0.3 3102 –3905 54 P0.2 3965 –3281 55 P0.1 3965 –3161 56 P0.0 3965 –3041 57 V 58 COM1 3965 –2766 59 COM2 3965 –2646 60 COM3 3965 –2526 61 COM4 3965 –2406 62 COM5 3965 –2286 63 COM6 3965 –2166 64 COM7 3965 –2046 65 COM8 3965 –1926 66 COM9 3965 –1806 67 COM10 3965 –1686 68 COM11 3965 –1566 69 COM12 3965 –1446 70 COM13 3965 –1326 71 COM14 3965 –1206 72 COM15 3965 –1086 73 COM16 3965 –966 74 SEG0 3965 –846 75 SEG1 3965 –726 76 SEG2 3965 –606 77 SEG3 3965 –486 78 SEG4 3965 –366

3965 –2907

= 0, Y = 0

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Semiconductor

FEDL63295A-02

ML63295A

Center of chip: X = 0, Y = 0

Pad No. Pad Name X (µm) Y (µm)

79 SEG5 3965 –246 80 SEG6 3965 –126 81 SEG7 3965 –6 82 SEG8 3965 114 83 SEG9 3965 234 84 SEG10 3965 354 85 SEG11 3965 474 86 SEG12 3965 594 87 SEG13 3965 714 88 SEG14 3965 834 89 SEG15 3965 954 90 SEG16 3965 1074 91 SEG17 3965 1194 92 SEG18 3965 1314 93 SEG19 3965 1434 94 SEG20 3965 1554 95 SEG21 3965 1674 96 SEG22 3965 1794 97 SEG23 3965 1914 98 SEG24 3965 2034 99 SEG25 3965 2154

100 SEG26 3965 2274 101 SEG27 3965 2394 102 SEG28 3965 2514 103 SEG29 3965 2634 104 SEG30 3965 2754 105 SEG31 3965 2874 106 SEG32 3965 2994 107 SEG33 3965 3114 108 SEG34 3965 3234 109 SEG35 3965 3354 110 SEG36 3185 3905 111 SEG37 3065 3905 112 SEG38 2945 3905 113 SEG39 2825 3905 114 SEG40 2705 3905 115 SEG41 2585 3905 116 SEG42 2465 3905 117 SEG43 2345 3905

Pad No. Pad Name X (µm) Y (µm)

118 SEG44 2225 3905 119 SEG45 2105 3905 120 SEG46 1985 3905 121 SEG47 1865 3905 122 SEG48 1745 3905 123 SEG49 1625 3905 124 SEG50 1505 3905 125 SEG51 1385 3905 126 SEG52 1265 3905 127 SEG53 1145 3905 128 SEG54 1025 3905 129 SEG55 905 3905 130 SEG56 785 3905 131 SEG57 665 3905 132 SEG58 545 3905 133 SEG59 425 3905 134 SEG60 305 3905 135 SEG61 185 3905 136 SEG62 65 3905 137 SEG63 –55 3905 138 SEG64 –175 3905 139 SEG65 –295 3905 140 SEG66 –415 3905 141 SEG67 –535 3905 142 SEG68 –655 3905 143 SEG69 –775 3905 144 SEG70 –895 3905 145 SEG71 –1015 3905 146 SEG72 –1135 3905 147 SEG73 –1255 3905 148 SEG74 –1375 3905 149 SEG75 –1495 3905 150 SEG76 –1615 3905 151 SEG77 –1735 3905 152 SEG78 –1855 3905 153 SEG79 –1975 3905 154 SEG80 –2095 3905 155 SEG81 –2215 3905 156 SEG82 –2335 3905

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Semiconductor

FEDL63295A-02

ML63295A

Center of chip: X = 0, Y = 0

Pad No. Pad Name X (µm) Y (µm)

157 SEG83 –2455 3905 158 SEG84 –2575 3905 159 SEG85 –2695 3905 160 SEG86 –2815 3905 161 SEG87 –2935 3905 162 SEG88 –3055 3905 163 SEG89 –3175 3905 164 SEG90 –3965 3432 165 SEG91 –3965 3312 166 SEG92 –3965 3192 167 SEG93 –3965 3072 168 SEG94 –3965 2952 169 SEG95 –3965 2832 170 COM17 –3965 2712 171 COM18 –3965 2592 172 COM19 –3965 2472 173 COM20 –3965 2352 174 COM21 –3965 2232 175 COM22 –3965 2112 176 COM23 –3965 1992 177 COM24 –3965 1872 178 COM25 –3965 1752 179 COM26 –3965 1632 180 COM27 –3965 1512 181 COM28 –3965 1392 182 COM29 –3965 1272 183 COM30 –3965 1152 184 COM31 –3965 1032

Pad No. Pad Name X (µm) Y (µm)

185 COM32 –3965 912 186 V 187 V 188 V 189 V 190 V 191 V 192 V 193 V 194 V 195 V 196 V

DD1

DD2

DD3

DD4

DD5

DD6

DDX1

DDX2

DDX3

DDX4

–3965 730 –3965 580 –3965 430 –3965 280 –3965 130 –3965 –20 –3965 –170 –3965 –320 –3965 –470 –3965 –620

–3965 –770 197 C1 –3965 –920 198 C2 –3965 –1070 199 V 200 V 201 V 202 V

DDL

DDE

–3965 –1220

–3965 –1370

–3965 –1520

–3965 –1670 203 OSC1 –3965 –1924 204 OSC0 –3965 –2074 205 TST1 –3965 –2268 206 TST2 –3965 –2388 207 XT1 –3965 –2593 208 XT0 –3965 –2743 209 RESET –3965 –2912 210 MD –3965 –3120 211 MDB –3965 –3240 212 V

DDI

–3965 –3392

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FEDL63295A-02

Semiconductor

ML63295A

PIN DESCRIPTIONS

The basic functions of each pin of the ML63295A are described in Table 1. A symbol with a slash “/” denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, “—” denotes a power supply pin, “I” an input pin, “O” an output pin, and “I/O” an input-output pin.

Table 1 Pin Descriptions (Basic Functions)

Function Symbol Pin No. Pad No. Type Description

Power Supply

Oscillation

V V V V V V

DD1

DD2

DD4

DD5

DD6

DDX1

DD3

DDX4

164, 166 199, 201 — Positive power supply pin

6, 144 57, 186 — Negative power supply pin

145 187 146 188 149 190 150 191 151 192 153 193 — Positive power supply for low-speed oscillation.

147 189 157 196

C1 158 197

C2 159 198

V V

DDX2

DDX3

DDI

DDL

DDE

154 194 155 195

179 212 —

165 200 —

167 202 —

XT0 174 208 I

XT1 173 207 O

Power supply pins for LCD bias voltage (internally generated):

Capacitors (1.0 µF) should be connected between

—

these pins and V

Power supply pins for LCD bias v oltage generation: Capacitors (1.0 µF) should be connected between

—

these pins and V Capacitor connection pins for LCD bias voltage

—

generation:

A capacitor (1.0 µF) should be connected between C1 and C2, and between V

—

DDX2

and V

Positive power supply pin for external interface (Power supply for input, output, and input-output

ports) Positive power supply pin for internal logic

(internally generated): A capacitor (0.1 µF) should be connected between this pin and VSS.

Constant voltage output pin: A capacitor (1.0 µF) should be connected between this pin and V

Low-speed clock oscillation pin s: An option for using crystal oscillation or RC oscillation is chosen by the mask option. If the crystal oscillation is chosen, a crystal should be connected between XT 0 and XT1, and capa citor (C

) should be connected between XT0 and VSS.

If the RC oscillation is chosen, external oscillation resistor (R

) should be connected between XT0

OSL

and XT1.

DDX3

10/38

Semiconductor

Table 1 Pin Descriptions (Basic Functions) (continued)

Function Symbol Pin No. Pad No. Type Description

OSC0 169 204 I

Oscillation

OSC1 168 203 O

TST1 171 205 I

Test

TST2 172 206 I

Reset RESET 175 209 I

Melody

MD 177 210 O

MDB 178 211 O

High-speed clock oscillation pins: A ceramic resonator and capacitors (CL0, CL1) or external oscillation resistor (R connected to these pins.

Input pins for testing. A pull-down resistor is int ernally co nnected to t hese pins.

System reset input pin. Setting this pin to “H” level puts this device into a reset state. Then, setting this pin to “L” level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin.

Melody output pin (non-inverted output) Melody output pin (inverted output)

FEDL63295A-02

) should be

OSH

ML63295A

11/38

Semiconductor

Table 1 Pin Descriptions (Basic Functions) (continued)

Function Symbol Pin No. Pad No. Type Description

Port

P0.0/INT5 5 56 P0.1/INT5 4 55 P0.2/INT5 3 54 P0.3/INT5 237 53 P1.0/INT5 236 52 P1.1/INT5 235 51 P1.2/INT5 234 50 P1.3/INT5 233 49

P2.0 232 48 P2.1 231 47 P2.2 230 46 P2.3 229 45 P3.0 228 44 P3.1 227 43 P3.2 226 42

P3.3 225 41 P4.0/A0 224 40 P4.1/A1 223 39 P4.2/A2 222 38 P4.3/A3 221 37 P5.0/A4 220 36 P5.1/A5 219 35 P5.2/A6 218 34 P5.3/A7 217 33 P6.0/A8 216 32 P6.1/A9 215 31

P6.2/A10 214 30 P6.3/A11 213 29 P7.0/A12 212 28 P7.1/A13 211 27 P7.2/A14 210 26 P7.3/A15 209 25

P8.0/RD 208 24

P8.1/WR 207 23

P8.2 206 22

P8.3/INT4 205 21

P9.0/D0 204 20 P9.1/D1 203 19 P9.2/D2 202 18 P9.3/D3 201 17

I/O

4-bit input ports: Pull-up resistor input, pull-down resistor input,

or high-impedance input is selectable for each bit.

4-bit output ports: P-channel open drain output, N-channel open

drain output, CMOS output, or high-impedance output is selectable for each bit.

4-bit input-output ports: In input mode, pull-up resistor input, pull-down

resistor input, or high-impedance input is selectable for each bit.

In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or high-impedance output is selectable for each bit.

FEDL63295A-02

ML63295A

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