NXP Semiconductors PBLS4004D User Manual

PBLS4004D

40 V PNP BISS loadswitch

Rev. 03 — 6 January 2009 Product data sheet

1. Product profile

1.1 General description

PNP low V

Breakthrough In Small Signal (BISS) transistor and NPN Resistor-

CEsat

Equipped Transistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD)
plastic package.

1.2 Features

n Low V
n Low threshold voltage (< 1 V) compared to MOSFET
n Low drive power required
n Space-saving solution
n Reduction of component count

(BISS) and resistor-equipped transistor in one package

CEsat

1.3 Applications

n Supply line switches
n Battery charger switches
n High-side switches for LEDs, drivers and backlights
n Portable equipment

1.4 Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

TR1; PNP low V

V

CEO

I

C

R

CEsat

TR2; NPN resistor-equipped transistor

V

CEO

I

O

R1 bias resistor 1 (input) 15.4 22 28.6 kΩ
R2/R1 bias resistor ratio 0.8 1 1.2

collector-emitter voltage open base - - −40 V
collector current
collector-emitter saturation

resistance

collector-emitter voltage open base - - 50 V
output current - - 100 mA

CEsat

transistor

IC= −500 mA;
I

= −50 mA

B

[1]

--−1A

[2]

- 240 340 mΩ

[1] Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint.
[2] Pulse test: tp≤ 300 µs; δ≤0.02.

NXP Semiconductors

2. Pinning information

Table 2. Pinning

Pin Description Simplified outline Graphic symbol

1 emitter TR1
2 base TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 collector TR1

3. Ordering information

Table 3. Ordering information

Type number Package

PBLS4004D SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457

PBLS4004D

40 V PNP BISS loadswitch

4

56

132

Name Description Version

65 4

R2

R1

TR1

1

23

TR2

sym036

4. Marking

Table 4. Marking codes

Type number Marking code

PBLS4004D R4

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

TR1; PNP low V

V

CBO

V

CEO

V

EBO

I

C

I

CM

I

B

I

BM

transistor

CEsat

collector-base voltage open emitter - −40 V
collector-emitter voltage open base - −40 V
emitter-base voltage open collector - −5V
collector current

[1]

- −0.7 A

[2]

- −0.85 A

[3]

- −1A
peak collector current single pulse; tp≤ 1ms - −2A
base current - −0.3 A
peak base current single pulse; tp≤ 1ms - −1A

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 2 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

Table 5. Limiting values

…continued

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

P

tot

total power dissipation T

amb

≤ 25 °C

[1]

- 250 mW

[2]

- 350 mW

[3]

- 400 mW

TR2; NPN resistor-equipped transistor

V
V
V
V

CBO
CEO
EBO
I

collector-base voltage open emitter - 50 V
collector-emitter voltage open base - 50 V
emitter-base voltage open collector - 10 V
input voltage

positive - +40 V
negative - −10 V

I

O

I

CM

P

tot

output current - 100 mA
peak collector current single pulse; tp≤ 1 ms - 100 mA
total power dissipation T

≤ 25 °C - 200 mW

amb

Per device

P

tot

T

j

T

amb

T

stg

total power dissipation T

junction temperature - 150 °C
ambient temperature −65 +150 °C
storage temperature −65 +150 °C

amb

≤ 25 °C

[1]

- 400 mW

[2]

- 530 mW

[3]

- 600 mW

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 3 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
(3) FR4 PCB, standard footprint

Fig 1. Power derating curves

6. Thermal characteristics

0.8

P

tot

(W)

(1)

0.6

(2)

(3)

0.4

0.2

0

0 16012040 80

006aaa461

T

(°C)

amb

2

Table 6. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per device

R

th(j-a)

thermal resistance from
junction to ambient

Per TR1; PNP low V

R

th(j-sp)

thermal resistance from

CEsat

in free air

transistor

[1]

- - 312 K/W

[2]

- - 236 K/W

[3]

- - 210 K/W

- - 105 K/W

junction to solder point

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 4 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

006aaa462

2

10

tp (s)

3

10

Z

th(j-a)

(K/W)

10

3

10

δ = 1

0.75

0.5

0.33

2

10

0.2

0.1

0.05

0.02

10

0.01

0

1

−1

−5

10

−4

10

−3

10

−2

−1

10

1

1010

FR4 PCB, standard footprint

Fig 2. TR1 (PNP): Transient thermal impedance from junctionto ambient as a function of pulse duration; typical

values

006aaa463

Z

th(j-a)

(K/W)

3

10

δ = 1

0.75

0.5

2

0.33

10

0.2

0.1

0.05

10

0.02

0.01

0

1

−5

10

−4

10

−3

10

FR4 PCB, mounting pad for collector 1 cm

−2

2

−1

10

1

1010

2

10

tp (s)

3

10

Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical

values

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 5 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

3

10

Z

th(j-a)

δ = 1

(K/W)

0.75

0.5

2

10

0.33

0.2

0.1

0.05

10

0.02

0.01

0

1

−5

10

Ceramic PCB, Al2O3, standard footprint

−4

10

−3

10

−2

−1

10

1

1010

006aaa464

2

10

tp (s)

3

10

Fig 4. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical

values

7. Characteristics

Table 7. Characteristics

T

=25°C unless otherwise specified.

amb

Symbol Parameter Conditions Min Typ Max Unit

TR1; PNP low V

I

CBO

collector-base cut-off
current

I

CES

collector-emitter
cut-off current

I

EBO

emitter-base cut-off
current

h

V

FE

CEsat

DC current gain VCE= −5 V; IC= −1 mA 300 - -

collector-emitter
saturation voltage

R

CEsat

collector-emitter
saturation resistance

V

BEsat

base-emitter
saturation voltage

V

BEon

base-emitter
turn-on voltage

CEsat

transistor

VCB= −40 V; IE=0A - - −0.1 µA

= −40 V; IE=0A;

V

CB

T

= 150 °C

j

-- −50 µA

VCE= −30 V; VBE=0V - - −0.1 µA

VEB= −5 V; IC=0A - - −0.1 µA

= −5 V; IC= −100 mA

V

CE

= −5 V; IC= −500 mA

V

CE

= −5 V; IC= −1A

V

CE

[1]

300 - 800

[1]

215 - -

[1]

150 - -

IC= −100 mA; IB= −1mA - −80 −140 mV

= −500 mA; IB= −50 mA

I

C

= −1 A; IB= −100 mA

I

C

IC= −500 mA; IB= −50 mA

IC= −1 A; IB= −50 mA

VCE= −5 V; IC= −1A

[1]

- −120 −170 mV

[1]

- −220 −310 mV

[1]

- 240 340 mΩ

[1]

-- −1.1 V

[1]

-- −1V

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 6 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

Table 7. Characteristics

T

=25°C unless otherwise specified.

amb

…continued

Symbol Parameter Conditions Min Typ Max Unit

f

T

transition frequency IC= −50 mA; VCE= −10 V;

150 - - MHz

f = 100 MHz

C

c

collector capacitance VCB= −10 V; IE=ie=0A;

- - 12 pF

f=1MHz

TR2; NPN resistor-equipped transistor

I

CBO

collector-base cut-off

VCB=50V; IE= 0 A - - 100 nA

current

I

CEO

I

EBO

collector-emitter
cut-off current

emitter-base cut-off

VCE=30V; IB=0A - - 1 µA

=30V; IB=0A;

V

CE

T

= 150 °C

j

-- 50µA

VEB=5V; IC= 0 A - - 180 µA

current
h
V

FE

CEsat

DC current gain VCE=5V; IC= 5 mA 60 - -

collector-emitter

IC= 10 mA; IB= 0.5 mA - - 150 mV

saturation voltage
V

I(off)

V

I(on)

off-state input voltage VCE=5V; IC= 100 µA - 1.1 0.8 V

on-state input voltage VCE= 0.3 V; IC= 5 mA 2.5 1.7 - V
R1 bias resistor 1 (input) 15.4 22 28.6 kΩ
R2/R1 bias resistor ratio 0.8 1 1.2
C

c

collector capacitance VCB=10V; IE=ie=0A;

- - 2.5 pF

f=1MHz

[1] Pulse test: tp≤ 300 µs; δ≤0.02.

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 7 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

1200

h

FE

800

400

0

−10

(1)

(2)

(3)

−1

−1 −10

−10

006aaa465

(mA)

C

−10

4

−10

3

I

2

VCE= −5V
(1) T
(2) T
(3) T

amb
amb
amb

= 100 °C
=25°C
= −55 °C

Fig 5. TR1 (PNP): DC current gain as a function of

collector current; typical values

006aaa467

V

(V)

−1.0

BE

−0.8

−0.6

(1)

(2)

−2.4

I

C

(A)

−1.6

−0.8

0

0 −5−4−2 −3−1

T

=25°C

amb

006aaa469

IB (mA) = −24

VCE (V)

−21.6

−19.2

−16.8

−14.4

−12

−9.6

−7.2

−4.8

−2.4

Fig 6. TR1 (PNP): Collector current as a function of

collector-emitter voltage; typical values

006aaa468

V

−1.3

BEsat

(V)

−0.9

(1)

(2)

−0.4

−0.2

−10

−1

(3)

−1 −10

−10

(mA)

C

−10

4

−10

3

I

2

VCE= −5V
(1) T
(2) T
(3) T

amb
amb
amb

= −55 °C
=25°C
= 100 °C

Fig 7. TR1 (PNP): Base-emitter voltage as a function

of collector current; typical values

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

−0.5

−0.1

−1

−10

IC/IB=20

(1) T

amb

(2) T

amb

(3) T

amb

Fig 8. TR1 (PNP): Base-emitter saturation voltage as

a function of collector current; typical values

(3)

−1 −10

−10

= −55 °C
=25°C
= 100 °C

(mA)

C

−10

4

−10

3

I

2

Product data sheet Rev. 03 — 6 January 2009 8 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

−10

006aaa466

3

−10

IC (mA)

V

−10

−10

CEsat

(V)

−1

−1

−2

−10

−1

−1 −10

−10

(1)
(2)

(3)

2

IC/IB=20
(1) T
(2) T
(3) T

amb
amb
amb

= 100 °C
=25°C
= −55 °C

Fig 9. TR1 (PNP): Collector-emitter saturation

voltage as a function of collector current;

typical values

−10

006aaa471

3

−10

IC (mA)

4

−10

V

CEsat

(V)

−1

−1

−10

−2

−10

−3

4

−10

−10

−1

T

amb

(1)

(2)

(3)

−1 −10

−10

=25°C

2

(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10

Fig 10. TR1 (PNP): Collector-emitter saturation

voltage as a function of collector current;
typical values

006aaa470

−10

3

IC (mA)

−10

2

R

10

CEsat

(Ω)

10

10

10

−1

−10

3

2

1

−1

−1 −10

−10

(1)
(2)

(3)

IC/IB=20
(1) T
(2) T
(3) T

amb
amb
amb

= 100 °C
=25°C
= −55 °C

Fig 11. TR1 (PNP): Collector-emitter saturation

resistance as a function of collector current;

typical values

3

10

R

CEsat

(Ω)

2

10

10

1

−1

4

10

−1

−10

T

amb

(1)

(2)

(3)

−1 −10

−10

=25°C

2

006aaa472

3

−10
IC (mA)

−10

4

(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10

Fig 12. TR1 (PNP): Collector-emitter saturation

resistance as a function of collector current;
typical values

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 9 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

3

10

h

FE

2

10

10

1

−1

10

(1)
(2)
(3)

006aaa038

2

101

IC (mA)

10

VCE=5V
(1) T
(2) T
(3) T

amb
amb
amb

= 150 °C
=25°C
= −40 °C

Fig 13. TR2 (NPN): DC current gain as a function of

collector current; typical values

−1

10

V

CEsat

(V)

−2

10

110

(1)
(2)

(3)

10

006aaa039

IC (mA)

IC/IB=20
(1) T
(2) T
(3) T

amb
amb
amb

= 100 °C
=25°C
= −40 °C

Fig 14. TR2 (NPN): Collector-emitter saturation

voltage as a function of collector current;

typical values

2

006aaa040

101

IC (mA)

10

V

I(on)

(V)

10

10

(1)
(2)

1

−1

−1

10

(3)

VCE= 0.3 V
(1) T
(2) T
(3) T

amb
amb
amb

= −40 °C
=25°C
= 100 °C

Fig 15. TR2 (NPN): On-state input voltage as a

function of collector current; typical values

10

V

I(off)

(V)

(1)

1

−1

2

10

(2)
(3)

−2

10

−1

006aaa041

1

110

IC (mA)

10

VCE=5V
(1) T
(2) T
(3) T

amb
amb
amb

= −40 °C
=25°C
= 100 °C

Fig 16. TR2 (NPN): Off-state input voltage as a

function of collector current; typical values

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 10 of 15

NXP Semiconductors

8. Package outline

PBLS4004D

40 V PNP BISS loadswitch

Fig 17. Package outline SOT457 (SC-74)

9. Packing information

Table 8. Packing methods

The indicated -xxx are the last three digits of the 12NC ordering code.

Type number Package Description Packing quantity

PBLS4004D SOT457 4 mm pitch, 8 mm tape and reel; T1

3.0

2.5

3.1

2.7

4

1.7

1.3

56

pin 1 index

132

0.95

1.9

4 mm pitch, 8 mm tape and reel; T2

0.40

0.25

0.6

0.2

1.1

0.9

0.26

0.10

[1]

04-11-08Dimensions in mm

3000 10000

[2]

-115 -135

[3]

-125 -165

[1] For further information and the availability of packing methods, seeSection 13.
[2] T1: normal taping
[3] T2: reverse taping

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 11 of 15

NXP Semiconductors

10. Soldering

PBLS4004D

40 V PNP BISS loadswitch

3.45

1.95

0.95

2.8253.3

0.95

0.7

(6×)

0.8

(6×)

2.4

0.45
(6×)

Fig 18. Reflow soldering footprint SOT457 (SC-74)

5.3

1.475

5.05

1.475

0.55
(6×)

1.5

(4×)

0.45
(2×)

solder lands

solder resist

solder paste

occupied area

Dimensions in mm

sot457_fr

solder lands

solder resist

occupied area

Dimensions in mm

preferred transport

direction during soldering

1.45
(6×)

2.85

sot457_fw

Fig 19. Wave soldering footprint SOT457 (SC-74)

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 12 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

11. Revision history

Table 9. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PBLS4004D_3 20090106 Product data sheet - PBLS4004D_2
Modifications:

PBLS4004D_2 20050719 Product data sheet - PBLS4004D_1
PBLS4004D_1 20041109 Objective data sheet - -

• The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Figure 5, 9 and 10: amended

• Section 12 “Legal information”: updated

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 13 of 15

NXP Semiconductors

12. Legal information

12.1 Data sheet status

PBLS4004D

40 V PNP BISS loadswitch

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s)described in this document may have changed since this document waspublished and may differin case of multiple devices.The latest product status

information is available on the Internet at URL

[1][2]

Product status

12.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall haveno liability fortheconsequencesof
use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title.Ashort data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.

12.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or
warranties, expressedorimplied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.

Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental

[3]

http://www.nxp.com.

Definition

damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at

http://www.nxp.com/profile/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyanceor implication of any license under any copyrights, patents
or other industrial or intellectual property rights.

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.

12.4 Trademarks

Notice: All referencedbrands, product names, service names and trademarks
are the property of their respective owners.

13. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 14 of 15

NXP Semiconductors

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

9 Packing information. . . . . . . . . . . . . . . . . . . . . 11

10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

13 Contact information. . . . . . . . . . . . . . . . . . . . . 14

14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

PBLS4004D

40 V PNP BISS loadswitch

Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.

© NXP B.V. 2009. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]

Date of release: 6 January 2009

Document identifier: PBLS4004D_3