NXP Semiconductors PBLS4004D User Manual

152.81 Kb
Loading...

PBLS4004D

40 V PNP BISS loadswitch

Rev. 03 — 6 January 2009

Product data sheet

1.Product profile

1.1General description

PNP low VCEsat Breakthrough In Small Signal (BISS) transistor and NPN ResistorEquipped Transistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD) plastic package.

1.2 Features

nLow VCEsat (BISS) and resistor-equipped transistor in one package

nLow threshold voltage (< 1 V) compared to MOSFET

nLow drive power required

nSpace-saving solution

nReduction of component count

1.3Applications

nSupply line switches

nBattery charger switches

nHigh-side switches for LEDs, drivers and backlights

nPortable equipment

1.4Quick reference data

Table 1.

Quick reference data

 

 

 

 

 

 

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

TR1; PNP low VCEsat transistor

 

 

 

 

 

 

VCEO

collector-emitter voltage

open base

-

-

40

V

IC

collector current

[1]

-

-

1

A

 

 

RCEsat

collector-emitter saturation

IC = 500 mA;

[2]

-

240

340

mΩ

 

 

resistance

IB = 50 mA

 

 

 

 

TR2; NPN resistor-equipped transistor

 

 

 

 

 

 

 

 

 

 

 

 

 

VCEO

collector-emitter voltage

open base

-

-

50

V

IO

output current

 

 

-

-

100

mA

R1

bias resistor 1 (input)

 

 

15.4

22

28.6

kΩ

 

 

 

 

 

 

 

 

R2/R1

bias resistor ratio

 

 

0.8

1

1.2

 

 

 

 

 

 

 

 

 

[1]Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint.

[2]Pulse test: tp 300 μs; δ ≤ 0.02.

NXP Semiconductors

PBLS4004D

 

40 V PNP BISS loadswitch

2. Pinning information

Table 2.

Pinning

 

 

Pin

Description

Simplified outline

Graphic symbol

1

emitter TR1

 

 

2

base TR1

3

output (collector) TR2

 

 

4

GND (emitter) TR2

 

 

5

input (base) TR2

 

 

6

collector TR1

 

 

 

 

6

 

5

 

 

4

6

 

5

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R1

 

 

 

 

R2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

2

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TR1

 

 

 

 

 

 

TR2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

2

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

sym036

3. Ordering information

Table 3. Ordering information

Type number

Package

 

 

 

Name

Description

Version

PBLS4004D

SC-74

plastic surface-mounted package (TSOP6); 6 leads

SOT457

 

 

 

 

4. Marking

Table 4. Marking codes

Type number

Marking code

PBLS4004D

R4

 

 

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

TR1; PNP low VCEsat transistor

 

 

 

 

 

 

VCBO

collector-base voltage

open emitter

-

40

V

VCEO

collector-emitter voltage

open base

-

40

V

VEBO

emitter-base voltage

open collector

-

5

V

IC

collector current

[1]

-

0.7

A

 

 

 

 

 

[2]

-

0.85

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[3]

-

1

A

 

 

 

 

 

 

 

 

 

 

 

ICM

peak collector current

single pulse; tp 1 ms

-

2

A

IB

base current

 

 

 

-

0.3

A

IBM

peak base current

single pulse; tp 1 ms

-

1

A

PBLS4004D_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 6 January 2009

2 of 15

NXP Semiconductors

 

 

 

 

PBLS4004D

 

 

 

 

 

40 V PNP BISS loadswitch

 

Table 5.

Limiting values …continued

 

 

 

 

 

 

 

In accordance with the Absolute Maximum Rating System (IEC 60134).

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

Conditions

 

Min

Max

Unit

 

Ptot

total power dissipation

Tamb 25 °C

[1]

-

250

mW

 

 

 

 

 

 

[2]

-

350

mW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[3]

-

400

mW

 

 

 

 

 

 

 

 

 

 

 

 

 

TR2; NPN resistor-equipped transistor

 

 

 

 

 

 

 

 

 

 

 

 

 

VCBO

collector-base voltage

open emitter

 

-

50

V

 

VCEO

collector-emitter voltage

open base

 

-

50

V

 

VEBO

emitter-base voltage

open collector

 

-

10

V

 

VI

input voltage

 

 

 

 

 

 

 

 

positive

 

 

 

-

+40

V

 

 

 

 

 

 

 

 

 

 

 

negative

 

 

 

-

10

V

 

 

 

 

 

 

 

 

 

 

IO

output current

 

 

 

-

100

mA

 

ICM

peak collector current

single pulse; tp 1 ms

 

-

100

mA

 

Ptot

total power dissipation

Tamb 25 °C

 

-

200

mW

 

Per device

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ptot

total power dissipation

Tamb 25 °C

[1]

-

400

mW

 

 

 

 

 

 

[2]

-

530

mW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[3]

-

600

mW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Tj

junction temperature

 

 

 

-

150

°C

 

Tamb

ambient temperature

 

 

 

65

+150

°C

 

Tstg

storage temperature

 

 

 

65

+150

°C

[1]Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[2]Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.

[3]Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 6 January 2009

3 of 15

NXP Semiconductors

PBLS4004D

 

40 V PNP BISS loadswitch

0.8

 

 

 

006aaa461

 

 

 

 

Ptot

 

 

 

 

(W)

 

 

 

 

0.6

(1)

 

 

 

 

 

 

 

 

(2)

 

 

 

0.4

(3)

 

 

 

 

 

 

 

0.2

 

 

 

 

0

 

 

 

 

0

40

80

120

160

 

 

 

Tamb (°C)

(1)Ceramic PCB, Al2O3, standard footprint

(2)FR4 PCB, mounting pad for collector 1 cm2

(3)FR4 PCB, standard footprint

Fig 1. Power derating curves

6. Thermal characteristics

Table 6.

Thermal characteristics

 

 

 

 

 

 

 

Symbol

Parameter

Conditions

 

Min

Typ

Max

Unit

Per device

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rth(j-a)

thermal resistance from

in free air

[1]

-

-

312

K/W

 

 

junction to ambient

 

 

 

 

 

 

 

 

 

 

[2]

-

-

236

K/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[3]

-

-

210

K/W

 

 

 

 

 

 

 

 

 

 

 

 

 

Per TR1; PNP low VCEsat transistor

 

 

 

 

 

 

 

Rth(j-sp)

thermal resistance from

 

 

 

-

-

105

K/W

 

junction to solder point

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[1]Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[2]Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.

[3]Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 6 January 2009

4 of 15

NXP Semiconductors

PBLS4004D

 

40 V PNP BISS loadswitch

103

 

 

 

 

 

 

 

 

006aaa462

 

 

 

 

 

 

 

 

 

Zth(j-a)

δ = 1

 

 

 

 

 

 

 

 

0.75

 

 

 

 

 

 

 

 

(K/W)

 

 

 

 

 

 

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

102

0.33

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

 

0.1

 

 

 

 

 

 

 

 

 

0.05

 

 

 

 

 

 

 

 

10

0.02

 

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

101

 

104

103

102

101

 

 

102

103

105

1

10

 

 

 

 

 

 

 

 

 

tp (s)

 

FR4 PCB, standard footprint

 

 

 

 

 

 

Fig 2.

TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical

 

values

 

 

 

 

 

 

 

 

103

 

 

 

 

 

 

 

 

006aaa463

 

 

 

 

 

 

 

 

 

Zth(j-a)

δ = 1

 

 

 

 

 

 

 

 

(K/W)

0.75

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.5

 

 

 

 

 

 

 

 

102

0.33

 

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

 

0.1

 

 

 

 

 

 

 

 

 

0.05

 

 

 

 

 

 

 

 

10

0.02

 

 

 

 

 

 

 

 

 

0.01

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

105

104

103

102

101

1

10

102

103

 

 

 

 

 

 

 

 

 

tp (s)

 

FR4 PCB, mounting pad for collector 1 cm2

 

 

 

 

 

Fig 3.

TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical

 

values

 

 

 

 

 

 

 

 

PBLS4004D_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 6 January 2009

5 of 15

+ 10 hidden pages