NXP Semiconductors PBLS4004D User Manual

PBLS4004D

40 V PNP BISS loadswitch

Rev. 03 — 6 January 2009 Product data sheet

1. Product profile

1.1 General description

PNP low V

Breakthrough In Small Signal (BISS) transistor and NPN Resistor-

CEsat

Equipped Transistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD)
plastic package.

1.2 Features

n Low V
n Low threshold voltage (< 1 V) compared to MOSFET
n Low drive power required
n Space-saving solution
n Reduction of component count

(BISS) and resistor-equipped transistor in one package

CEsat

1.3 Applications

n Supply line switches
n Battery charger switches
n High-side switches for LEDs, drivers and backlights
n Portable equipment

1.4 Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

TR1; PNP low V

V

CEO

I

C

R

CEsat

TR2; NPN resistor-equipped transistor

V

CEO

I

O

R1 bias resistor 1 (input) 15.4 22 28.6 kΩ
R2/R1 bias resistor ratio 0.8 1 1.2

collector-emitter voltage open base - - −40 V
collector current
collector-emitter saturation

resistance

collector-emitter voltage open base - - 50 V
output current - - 100 mA

CEsat

transistor

IC= −500 mA;
I

= −50 mA

B

[1]

--−1A

[2]

- 240 340 mΩ

[1] Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint.
[2] Pulse test: tp≤ 300 µs; δ≤0.02.

NXP Semiconductors

2. Pinning information

Table 2. Pinning

Pin Description Simplified outline Graphic symbol

1 emitter TR1
2 base TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 collector TR1

3. Ordering information

Table 3. Ordering information

Type number Package

PBLS4004D SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457

PBLS4004D

40 V PNP BISS loadswitch

4

56

132

Name Description Version

65 4

R2

R1

TR1

1

23

TR2

sym036

4. Marking

Table 4. Marking codes

Type number Marking code

PBLS4004D R4

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

TR1; PNP low V

V

CBO

V

CEO

V

EBO

I

C

I

CM

I

B

I

BM

transistor

CEsat

collector-base voltage open emitter - −40 V
collector-emitter voltage open base - −40 V
emitter-base voltage open collector - −5V
collector current

[1]

- −0.7 A

[2]

- −0.85 A

[3]

- −1A
peak collector current single pulse; tp≤ 1ms - −2A
base current - −0.3 A
peak base current single pulse; tp≤ 1ms - −1A

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 2 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

Table 5. Limiting values

…continued

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

P

tot

total power dissipation T

amb

≤ 25 °C

[1]

- 250 mW

[2]

- 350 mW

[3]

- 400 mW

TR2; NPN resistor-equipped transistor

V
V
V
V

CBO
CEO
EBO
I

collector-base voltage open emitter - 50 V
collector-emitter voltage open base - 50 V
emitter-base voltage open collector - 10 V
input voltage

positive - +40 V
negative - −10 V

I

O

I

CM

P

tot

output current - 100 mA
peak collector current single pulse; tp≤ 1 ms - 100 mA
total power dissipation T

≤ 25 °C - 200 mW

amb

Per device

P

tot

T

j

T

amb

T

stg

total power dissipation T

junction temperature - 150 °C
ambient temperature −65 +150 °C
storage temperature −65 +150 °C

amb

≤ 25 °C

[1]

- 400 mW

[2]

- 530 mW

[3]

- 600 mW

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 3 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
(3) FR4 PCB, standard footprint

Fig 1. Power derating curves

6. Thermal characteristics

0.8

P

tot

(W)

(1)

0.6

(2)

(3)

0.4

0.2

0

0 16012040 80

006aaa461

T

(°C)

amb

2

Table 6. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per device

R

th(j-a)

thermal resistance from
junction to ambient

Per TR1; PNP low V

R

th(j-sp)

thermal resistance from

CEsat

in free air

transistor

[1]

- - 312 K/W

[2]

- - 236 K/W

[3]

- - 210 K/W

- - 105 K/W

junction to solder point

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 4 of 15

NXP Semiconductors

PBLS4004D

40 V PNP BISS loadswitch

006aaa462

2

10

tp (s)

3

10

Z

th(j-a)

(K/W)

10

3

10

δ = 1

0.75

0.5

0.33

2

10

0.2

0.1

0.05

0.02

10

0.01

0

1

−1

−5

10

−4

10

−3

10

−2

−1

10

1

1010

FR4 PCB, standard footprint

Fig 2. TR1 (PNP): Transient thermal impedance from junctionto ambient as a function of pulse duration; typical

values

006aaa463

Z

th(j-a)

(K/W)

3

10

δ = 1

0.75

0.5

2

0.33

10

0.2

0.1

0.05

10

0.02

0.01

0

1

−5

10

−4

10

−3

10

FR4 PCB, mounting pad for collector 1 cm

−2

2

−1

10

1

1010

2

10

tp (s)

3

10

Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical

values

PBLS4004D_3 © NXP B.V. 2009. All rights reserved.

Product data sheet Rev. 03 — 6 January 2009 5 of 15