NXP Semiconductors Lite5200B User Manual

Lite5200B User’s Manual

Devices Supported:

MPC5200B

LITE5200BUM

Rev. 0

10/2005

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© Freescale Semiconductor, Inc. 2005. All rights reserved.

LITE5200BUM
Rev. 0
10/2005

Contents

Paragraph
Number

Table of Contents

Title

Page

Number

Chapter 1

Introduction

1.1 Overview.......................................................................................................................... 1-1

Chapter 2

Kit Contents

2.1 Kit Contents ..................................................................................................................... 2-1

Chapter 3

Getting Started

3.1 Steps to Getting Started ................................................................................................... 3-1

Chapter 4

Hardware Description

4.1 Block Diagram ................................................................................................................ 4-1

4.2 Peripheral Connection ..................................................................................................... 4-1

4.3 Power Connections ......................................................................................................... 4-2

4.3.1 DC Power Jack- J35 .................................................................................................... 4-2

4.3.2 ATX Power Connector - J36 ...................................................................................... 4-2

4.3.3 Banana Jacks - J32 J28 J27 J26 J25 ............................................................................ 4-2

4.3.4 PCI +/- 12 Volt Supply Jacks - J5 J8 .......................................................................... 4-3

4.4 Memory Configuration ................................................................................................... 4-3

4.4.1 Flash Memory ............................................................................................................. 4-4

4.4.2 DRAM ........................................................................................................................ 4-4

4.4.3 EEPROM ....................................................................................................................4-4

4.5 Connector Descriptions ................................................................................................... 4-4

4.5.1 ATA ............................................................................................................................ 4-4

4.5.2 CAN Interface .............................................................................................................4-5

4.5.3 Debug Connector (JTAG/COP)- CN1 ........................................................................ 4-6

4.5.4 Ethernet - J6 ................................................................................................................ 4-6

4.5.5 I2C J29 J31 .................................................................................................................. 4-7

4.5.6 General Purpose LEDs - D2 D3 D37 D38 D39 D40 .................................................. 4-8

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Contents

Paragraph
Number

Title

Page

Number

4.5.7 General Purpose Headers - J16 J17 J18 J19 J20 J21 J22 J23 ..................................... 4-8

4.5.8 PCI - J13 J14 .............................................................................................................4-11

4.5.9 UART - J3 .................................................................................................................4-13

4.5.10 USB - J4 .................................................................................................................... 4-14

4.6 Switches ........................................................................................................................ 4-15

4.6.1 Boot Configuration - SW1 ........................................................................................ 4-15

4.6.2 POR - SW2 ............................................................................................................... 4-16

4.6.3 PLL Control - SW3 ................................................................................................... 4-17

4.6.4 Low Power Mode ...................................................................................................... 4-17

Chapter 5

Boot Monitor

5.1 Basic Configuration: ....................................................................................................... 5-1

5.2 Memory Map ..................................................................................................................5-1

5.3 Accessing Memory Using U-Boot .................................................................................. 5-2

5.3.1 MD .............................................................................................................................. 5-2

5.3.2 MW ............................................................................................................................. 5-3

5.4 Environmental Variables ................................................................................................ 5-3

5.4.1 printenv ....................................................................................................................... 5-3

5.4.2 setenv .......................................................................................................................... 5-4

5.4.3 saveenv ........................................................................................................................ 5-4

5.5 Configuring Ethernet ...................................................................................................... 5-5

5.5.1 Configuring a MAC Address ...................................................................................... 5-5

5.5.2 Configuring IP Address .............................................................................................. 5-5

5.6 Downloading An Image .................................................................................................. 5-6

5.6.1 TFTP Download ......................................................................................................... 5-7

5.6.2 Serial Download ......................................................................................................... 5-8

5.7 Executing an Image ........................................................................................................ 5-8

5.8 Writing an Image to Flash .............................................................................................. 5-9

5.9 Erasing Flash ................................................................................................................... 5-9

5.9.1 Flash Configuration .................................................................................................. 5-10

iv Freescale Semiconductor

LITE5200B User’s Manual, Rev. 0

Contents

Paragraph
Number

Title

Page

Number

Chapter 6

Flash Recovery

6.1 Restoring to Original Factory State ................................................................................. 6-1

Chapter 7

UBoot

7.1 AUTOSCR – Run Script from Memory ......................................................................... 7-1

7.2 BASE – Print or set address offset. ................................................................................. 7-3

7.3 BDINFO .......................................................................................................................... 7-4

7.4 BootD .............................................................................................................................. 7-5

7.5 BootM ............................................................................................................................. 7-6

7.6 BootP .............................................................................................................................. 7-7

7.7 CMP ................................................................................................................................ 7-8

7.8 CONINFO ....................................................................................................................... 7-9

7.9 CP .................................................................................................................................. 7-10

7.10 CRC32 .......................................................................................................................... 7-11

7.11 DHCP ............................................................................................................................ 7-12

7.12 DISKBOOT .................................................................................................................. 7-13

7.13 ECHO ............................................................................................................................ 7-14

7.14 EEPROM ...................................................................................................................... 7-15

7.15 ERASE .......................................................................................................................... 7-16

7.16 FATINFO ...................................................................................................................... 7-18

7.17 FATLOAD ....................................................................................................................7-19

7.18 FATLS .......................................................................................................................... 7-20

7.19 FLINFO ........................................................................................................................ 7-21

7.20 GO ................................................................................................................................. 7-22

7.21 HELP ............................................................................................................................ 7-23

7.22 CRC32 .......................................................................................................................... 7-25

7.23 IDE ................................................................................................................................ 7-27

7.24 ILOOP ........................................................................................................................... 7-28

7.25 IMD ............................................................................................................................... 7-29

7.26 IMINFO ........................................................................................................................ 7-30

7.27 IMLS ............................................................................................................................. 7-31

7.28 IMM .............................................................................................................................. 7-32

7.29 IMW .............................................................................................................................. 7-33

7.30 INM ............................................................................................................................... 7-34

7.31 ITEST ............................................................................................................................ 7-35

7.32 LOADB ......................................................................................................................... 7-37

7.33 LOADS ......................................................................................................................... 7-38

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Contents

Paragraph
Number

Title

Page

Number

7.34 Loop .............................................................................................................................. 7-39

7.35 MD ................................................................................................................................ 7-40

7.36 MM ............................................................................................................................... 7-41

7.37 MTEST ......................................................................................................................... 7-43

7.38 MW ............................................................................................................................... 7-44

7.39 NFS ............................................................................................................................... 7-45

7.40 NM ................................................................................................................................ 7-46

7.41 PING ............................................................................................................................. 7-47

7.42 PCI ................................................................................................................................ 7-48

7.43 PRINTENV ...................................................................................................................7-49

7.44 PROTECT ..................................................................................................................... 7-51

7.45 RARPBOOT ................................................................................................................. 7-54

7.46 REG INFO .................................................................................................................... 7-55

7.47 RESET .......................................................................................................................... 7-56

7.48 RUN .............................................................................................................................. 7-57

7.49 SAVEENV ....................................................................................................................7-58

7.50 SETENV ....................................................................................................................... 7-59

7.51 SLEEP ........................................................................................................................... 7-61

7.52 TFTPBoot ..................................................................................................................... 7-62

7.53 USB ............................................................................................................................... 7-63

7.54 USBBoot ....................................................................................................................... 7-64

7.55 VERSION ..................................................................................................................... 7-65

vi Freescale Semiconductor

LITE5200B User’s Manual, Rev. 0

Chapter 1
Introduction

1.1 Overview

The MPC5200B is a low cost evaluation board (EVB) for the Freescale MPC5200B microcontroller. It is
intended for use by engineers and software developers to evaluate the features and performance of the
microcontroller.

The MPC5200B integrates the following hardware features with the MPC5200B microcontroller:

• 32 Megabyte Flash Memory

• 256 Megabyte 132Mhz DDR-SDRAM

• 10/100Base-TX Ethernet

• USB1.1

•Serial UART

•I2C (2 Headers)

•I2C EEPROM

• 4 General-Purpose LEDs

• PCI 3.3v (2 Standard Slots)

• CAN (2 DB9 Connectors)

• ATA-UDMA4

• PowerPC Debug connection (COP/JTAG)

• AT-Power Supply connection (Molex)

• Ultra-Low Power Mode Circuit

• Boot Flash Recovery Capability

• Power Bypass Capability

• Board Configuration Switches for:
— Clock Control

— Boot Vector Control
— Memory Configuration

The MPC5200B comes pre-loaded with the “U-Boot” open-source universal bootloader resident in local
flash memory allowing the user to download and execute application code. The boot flash recovery feature
is capable of restoring the U-Boot code should it accidentally be erased.

This manual describes the contents of this development kit, the features of the MPC5200B, the basics of
U-Boot, supported operating systems, and other important information regarding the evaluation board.

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Introduction

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LITE5200B User’s Manual, Rev. 0

Chapter 2
Development Kit Contents

2.1 Kit Contents

The following Items are included in the MPC5200B development kit:

• MPC5200B Hardrware

• User Document CD

Lite5200B Users Manual
Lite5200B Schematic
U-Boot Command Reference

• 5v DC Power Supply

• 9-Pin serial Cable

• U-Boot Apllication bootloader

• Included Software:

GreenHills RTOS Binary Image
Linux RTOS Binary Image
Wind River RTOS Binary Image
QNX RTOS Binary Image

Kit Contents

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LITE5200B User’s Manual, Rev. 0

Development Kit Contents

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LITE5200B User’s Manual, Rev. 0

Chapter 3
Getting Started

3.1 Steps to Getting Started

1. Make sure all Jumpers are set to the positions as indicated in Figure 3-1. No other Jumpers should
be placed on the board.

2. Connect your PC to the 9-pin connector labeled as “UART” ( J3 ) using the supplied serial cable.

3. Connect the 5V power supply supplied with the Lite5200B to the wall outlet.

4. Connect the 5V power supply cable to the J35 Power Connector on the board.

5. Start a terminal application such as HyperTerminal on your PC and set the serial settings to:

•Select Com Port

•Bits per second: 115200

•Handshake/Flow control: NONE

•Data Bits: 8

•Parity: None

•Stop Bits: 1

6. Press the Reset Button labeled “SW2 POR” on the Lite5200B EVB.

7. You should now see the Lite5200B EVB boot messages1 on the terminal window as described in

Figure 3-2

1. Please be aware that the message “Warning - bad CRC, using default environment” will be indicated when default environment is used.

Freescale Semiconductor 3-1

LITE5200B User’s Manual, Rev. 0

Getting Started

3-2 Freescale Semiconductor

Figure 3-1. Quick Start-Connectors

LITE5200B User’s Manual, Rev. 0

U-Boot 1.1.3 (Jul 11 2005 - 16:46:38)

CPU: MPC5200 v2.1 at 462 MHz
Bus 132 MHz, IPB 132 MHz, PCI 33 MHz
Board: Freescale MPC5200 (Lite5200B)
I2C: 85 kHz, ready
DRAM: 256 MB
FLASH: 32 MB
*** Warning - bad CRC, using default environment

PCI: Bus Dev VenId DevId Class Int
00 1a 1057 5809 0680 00
In: serial
Out: serial
Err: serial
Net: FEC ETHERNET
IDE: Bus 0: OK
Device 0: not available
Device 1: not available

Type "run flash_nfs" to mount root filesystem over NFS

Steps to Getting Started

Hit any key to stop autoboot: 0
=>

Figure 3-2. Power On Reset Splash Screen for U-Boot

8. Type ‘help’<RETURN> at the command prompt for an overview of the available U-Boot
commands

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Getting Started

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LITE5200B User’s Manual, Rev. 0

Chapter 4
Hardware Description

4.1 Block Diagram

Lite 5200B

PCI x 2

CAN x 2

USB

Figure 4-1. Block Diagram For Lite5200B

4.2 Peripheral Connection

DDR

256 MBYTE

MPC5200B

ATA

32 MBYTE

FLASH

ETHERNET

I

EEPROM

(I2C)

UART

2

C x 2

Functional MPC5200B Pin Group(s)

ATA ATA, EXT_AD[18:0]

CAN1 I2C

CAN2 TIMER[1:0]

DRAM SDRAM

EEPROM, I2C (J31), I2C
(J29)

Ethernet ETH[17:0]

1

Flash

LEDs IR_USB_CLK,IR_RX,IR_TX,IRDA_RX

Freescale Semiconductor 4-1

Table 4-1. Pin Configuration

I2C-1

LP_CS[1:0], EXT_AD[31:0]

LITE5200B User’s Manual, Rev. 0

Hardware Description

Table 4-1. Pin Configuration

Functional MPC5200B Pin Group(s)

Low Power PSC3_4

Misc Headers See Below

PCI-1, PCI-2 PCI, EXT_AD[31:0]

DDR SDRAM

UART PSC1

USB USB1

1

Non-Mux mode

2

Section 4.5.7, “General Purpose Headers – J16 J17 J18 J19 J20 J21 J22 J23,” on
page 4-8

2

4.3 Power Connections

Multiple power connection options are available on the Lite5200B evaluation system.

4.3.1 DC Power Jack – J35

The J35 DC power jack provides a 5V, fused, input which is capable of supplying the Lite5200B system.
5V is regulated into 4 separate power domains. Care should be taken to ensure that the supplied voltage
does not exceed 5V.

4.3.2 ATX Power Connector – J36

The J36 molex connector provides an interface to any standard commercial of the shelf power ATX
supply.

Table 2. ATX Power Connector – J36

Pin Name

1+12

2 GND

3 GND

4+5

Note: The connector on the board has pin 1 labeled as pin 4.
Please notice that pin 1 on the board has the square pad and
is nearest SW4. Ignore the pin label on the connector itself.

4.3.3 Banana Jacks – J32 J28 J27 J26 J25

Connectors J25, J26, and J28 are provided to allow voltage measurement for each power domains.
Supplies are marked on the board and correspond to the following:

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LITE5200B User’s Manual, Rev. 0

Table 4-3. Connectors – J32/J28/J27/J26/J25

Memory Configuration

Connector

1

The banana jacks are for monitoring the voltage of the various supplies on the
board. They should not be used for power measurement. Providing power to the
board through the banana jacks will create unsafe conditions since the 5V jack
is not fused and putting power into the 1.5V, 2.5V, and 3.3V jacks will cause a
conflict with the on board regulators

1

J32 GND GND

J25 Core Supply 1.5 v

J26 DDR Power Supply 2.5 v

J27 Regulated 5 v

J28 IO Supply 3.3 v

Description Voltage

4.3.4 PCI +/- 12 Volt Supply Jacks – J5 J8

These supplies provide +12v and -12v to the PCI transceiver IC. This will be required for any cards which
require a separate 12v supply1.

These banana jacks are used to supply +12V and -12V to the PCI connectors. If the ATX power connector
(J36) is used instead of the 5V power input (J35) then power must not be provided on J5.

Since most PCI cards do not require -12V there is usually no need to provide -12V on J8. Many PCI cards
to not require 12V in which case there is no need to provide +12V on J5 or the ATX power connector (36).

Table 4-4. Connectors – J5/J8

Connector Voltage

J5 +12 v

J8 -12 v

4.4 Memory Configuration

This section will describe the physical memories implemented in the Lite5200B. For further information
on logical memory organization please refer to Section 5.2, “Memory Map,” on page 5-1.

4.4.1 Flash Memory

4.4.1.1 Main Flash

The Lite5200B is provided with 32 Megabytes of 8-bit flash in a non-muxed configuration. The memory
uses 2 flash devices connected to CS0 & CS1. These devices are U12 and U16 with CS0 going to U12 and
CS1 going to U16.

1. This 12v supply does not correlate to bus voltage. It is supplied only as a separate power source required by high performance PCI devices.
Note: The MPC5200B does not support 5v PCI devices. Please see Section 4.5.8, “PCI – J13 J14,” on page 4-12.

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Hardware Description

4.4.1.2 Backup Flash

A flash recovery mechanism is provided with the Lite5200B. This backup flash allows the recovery of the
flash contents to their original factory contents. This is achieved by connecting a 2 mega-byte flash to CS0,
in addition to the primary 16 mega-byte flash accessible by the developer. If the jumper located at J10 is
moved to the B/U position the main flash is held in reset while CS0 will select the back-up flash device.
If a write occurs while CS0 is asserted and jumper J10 is set to Back Up, the supervisory circuit will place
the back-up flash in reset, and negate the reset to the main flash.

This hardware configuration allows the board to boot from the back-up flash which contains an image of
the original boot-loader which is then copied to DRAM for later programming into main flash.

4.4.2 DRAM

256 Megabytes of DDR DRAM is provided on the MPC5200B using 4 132mHz DDR DRAM chips.
These chips are configured so that two 16-bit memories form each 32-bit data word. This configuration is
duplicated on 2 chip selects.

4.4.3 EEPROM

A 256x8 EEPROM is connected to the MPC5200B via an I2C interface. This chip is placed for the intent
of storing board identification and ethernet MAC address.

Suggested storage of parameters is as follows:

Table 4-5. EEPROM Storage Guidelines

Byte Data Format

[15:0] Product ID ASCII

[16:22] MAC Address Binary

[255:23] Unused

4.5 Connector Descriptions

4.5.1 ATA

The J33 header provides a 40 pin, 3.3V, UDMA4, ATA interface to the MPC5200B through 22 ohm
termination resistors.

4-4 Freescale Semiconductor

LITE5200B User’s Manual, Rev. 0

Table 4-6. ATA – J33

Connector Descriptions

Header Pin Function

1 RESET ATA_5V_RESET 2 GND GND

3 DD7 ATA_5V_DD7 4 DD8 ATA_5V_DD8

5 DD6 ATA_5V_DD6 6 DD9 ATA_5V_DD9

7 DD5 ATA_5V_DD5 8 DD10 ATA_5V_DD10

9 DD4 ATA_5V_DD4 10 DD11 ATA_5V_DD11

11 DD3 ATA_5V_DD3 12 DD12 ATA_5V_DD12

13 DD2 ATA_5V_DD2 14 DD13 ATA_5V_DD13

15 DD1 ATA_5V_DD1 16 DD14 ATA_5V_DD14

17 DD0 ATA_5V_DD0 18 DD15 ATA_5V_DD15

19 GND GND 20 KEY NC

21 DMARQ ATA_5V_DMA_REQ 22 GND GND

23 DIOW

25 DIOR/HDMARD

27 IORDY/DDMAR

/STOP ATA_5V_IOW 24 GND GND

Y/HSTROBE

DY/DSTROBE

MPC5200B Pin

Connection

ATA_5V_IOR 26 GND GND

ATA_5V_IOCHRDY 28 CSEL GND

Header Pin Function

MPC5200B Pin

Connection

29 DMACK ATA_5V_DACK 30 GND GND

31 INTRQ ATA_5V_INT_REQ 32 IOCS16 5V

33 DA1 ATA_5V_DA1 34 PDIAG/CBLID NC

35 DA0 ATA_5V_DA0 36 DA2 ATA_5V_DA2

37 CS0 ATA_5V_CS0 38 CS1 ATA_5V_CS1

39 DASP LED

1

This pin is not connected to the MPC5200B

1

40 GND GND

4.5.2 CAN Interface

The 2 ISO/DIS 11898 CAN ports provide an isolated 12/24V interface to the MPC5200B through a 2-wire
CAN transceiver. The transceiver IC will convert the differential input to a serial protocol compatible for
communication with the MPC5200B at data-rates up to 1M bit.

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Hardware Description

Table 4-7. CAN Interface – J1/J2

Header Pin CAN Function

1NC

2 CANL

3 GND

4NC

5 AC GND

6NC

7 CANH

8NC

9NC

10 GND

11 GND

Note: This is a normal DB9 connector. Pins 10 and 11 are the shell of
the connector and are connected to ground through an inductor.

4.5.3 Debug Connector (JTAG/COP) – CN1

The CN1 connector is provided for interface to the MPC5200B through the JTAG connector.

Table 4-8. COP Connector – CN1

PIN NAME PIN NAME

1 COP_TDO 2 NC

3 COP_TDI 4 COP_TREST

5 NC 6 3.3 V

7 COP_TCK 8 NC

9 COP_TMS 10 NC

11 SRESET 12 GND

13 HRESET 14 NC

15 CHKSTOP 16 GND

4.5.4 Ethernet – J6

An 18-wire 10/100 Base-T ethernet connection is provided to the MPC5200B. The ethernet port is
decoupled through a physical layer ethernet transceiver for a network ready connection.

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LITE5200B User’s Manual, Rev. 0

Connector Descriptions

Table 4-9. Ethernet Connector – J6

Pin Function

1TD+

2TD-

3RD+

4RD-

5 AC GND

6 AC GND

7 AC GND

8 AC GND

4.5.4.1 Decoupling Ethernet – J9

If it is desired to use the ethernet pins of the MPC5200 for other than ethernet functions the buffer between
the ethernet transceiver and the 5200 must be disabled. This is done by installing a shorting jumper on
header J9. Note that the ETH_TXCLK and ETH_RXCLK signals are hardwired between the MPC5200
and the ethernet transceiver and cannot be disconnected.

In this configuration these pins may be accessible through a general purpose header.

Table 4-10. Ethernet Decoupling Jumper – J9

J9 10/100 BASE-T

ETHERNET

DECOUPLING

SWITCH

Ethernet transceiver disconnected

10/100 Base-T Setting

DEFAULT SETTING

4.5.4.2 Ethernet JTAG – J15

A header is provided on the J15 connector which interfaces to the ethernet transceiver IC. Please refer to
documentation on the LXT971ALE ethernet transceiver for more information.

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Hardware Description

Table 4-11. Ethernet JTAG Connector – J15

PIN Function

1TDI

2TDO

3TMS

4TCK

5TRST

4.5.5 I2C J29 J31

Connectors J29 & J31 provide access to the I2C interface on the MPC5200B. Both headers are connected
in parallel to each other and the EEPROM described in Section 4.4.3, “EEPROM,” on page 4-4.

Table 4-12. I2C Connector – J29/J31

PIN NAME

1 I2C_IO

2 I2C_CLK

33.3 V

4 GND

4.5.6 General Purpose LEDs – D2 D3 D37 D38 D39 D40

General purpose LEDs have been provided for debug and development purposes. The LEDs are driven by
an inverting buffers connected to the MCU pins described in the following table.

Table 4-13. General Purpose LEDs – D37/D38/D39/D40

LED MPC5200B Pin

D2 (TMR3) TIMER 3

D3 (TMR2) TIMER 2

D37 (LED 4) IR_USB_CLK

D38 (LED 3) IR_RX

D39 (LED 2) IR_TX

D40 (LED 1) IRDA_RX

4.5.7 General Purpose Headers – J16 J17 J18 J19 J20 J21 J22 J23

These headers are provided to allow customer development and analysis test points.

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LITE5200B User’s Manual, Rev. 0

Table 4-14. Ethernet Port Header – J16

Connector Descriptions

Pin

MPC5200B

Signal

Pin

MPC5200B

Signal

1 ETH_TXD[2] 2 ETH_CRS

3 ETH_TXD[3] 4 ETH_TXEN

5 ETH_TXERR 6 ETH_TXD[0]

7 ETH_MDC 8 ETH_RXDV

9 GND 10 GND

11 ETH_MDIO 12 ETH_RXCLK

13 ETH_RXD[1] 14 ETH_COL

15 ETH_RXD[2] 16 ETH_TXCLK

17 ETH_RXD[3] 18 ETH_RXD[0]

19 ETH_RXERR 20 ETH_TXD[1]

Note: ETH_TXCLK and ETH_RXCLK (J16 pins 12 and 16) cannot be
disconnected from the ethernet transceiver so whatever alternate function uses
these pins on header J16 should expect the added capacitive load of the ethernet
transceiver.

Table 4-15. USB And Timer Port Header – J17

PIN NAME PIN NAME

13.3 V2TIMER_2

3 TIMER_3 4 TIMER_4

5 TIMER_5 6 TIMER_6

7 TIMER_7 8 GND

9 USB1_OE 10 USB1_TXN

11 USB1_TXP 12 USB1_RXD

13 USB1_RXP 14 USB1_RXN

15 USB1_PORTPWR 16 USB1_SPEED

17 USB1_SUSPEND 18 USB1_OVRCUR

RENT

19 3.3 V 20 GND

Note: R67 must be installed to get the TIMER_3 function to work on pin 3 of J17.

Note: R66 must be installed to get the TIMER_2 function to work on pin 2 of J17.

Freescale Semiconductor 4-9

LITE5200B User’s Manual, Rev. 0

Hardware Description

Table 4-16. Address & Data Header – J18

PIN NAME PIN NAME

1 A20 2 GND

3 A21 4 GND

5 A22 6 GND

7 A23 8 GND

9 D0 10 GND

11 D1 12 GND

13 D2 14 GND

15 D3 16 GND

17 D4 18 GND

19 D5 20 GND

Table 4-17. Data & CS Header – J19

PIN NAME PIN NAME

1D62GND

3D74GND

5CS_26GND

7CS_38GND

9 RWB_CFG_3 10 GND

11 ALE_CFG_4 12 GND

13 TS_CFG_5 14 GND

15 ACK 16 GND

17 CS_1 18 GND

19 GND 20 GND

Table 4-18. PSC2 - IRQ - Reset Header – J20

PIN NAME PIN NAME

1 CON_IRQ_0 2 PSC2_0

3 CON_IRQ_1 4 PSC2_1

5 CON_IRQ_2 6 PSC2_2

7 CON_IRQ_3 8 PSC2_3

9 PORRESET 10 PSC2_4

11 HRESET 12 3.3 V

13 PCI_CLK_3 14 3.3 V

15 GND 16 5 V

17 GND 18 5 V

19 GND 20 GND

LITE5200B User’s Manual, Rev. 0

4-10 Freescale Semiconductor

Table 4-19. PSC3 / IrDA / GPIO Header – J21

PIN NAME PIN NAME

1 PSC3_0 2 IR_USB_CLK

3 PSC3_1 4 IR_RX

5 PSC3_2 6 IR_TX

7 PSC3_3 8 IRDA_RX

9 PSC3_4 10 3.3 V

11 PSC3_5 12 ID_CHIP

13 PSC3_6 14 NO CONNECT

15 PSC3_7 16 3.3 V

17 PSC3_8 18 GND

19 PSC3_9 20 GND

Table 4-20. Address Header – J22

PIN NAME PIN NAME

1 A10 2 GND

3 A11 4 GND

5 A12 6 GND

7 A13 8 GND

9 A14 10 GND

11 A15 12 GND

13 A16 14 GND

15 A17 16 GND

17 A18 18 GND

19 A19 20 GND

Connector Descriptions

Table 4-21. ADDRESS LINE A0 - A9 B2B HEADER – J23

PIN NAME PIN NAME

1A02GND

3A14GND

5A26GND

7A38GND

9 A4 10 GND

11 A5 12 GND

13 A6 14 GND

15 A7 16 GND

17 A8 18 GND

19 A9 20 GND

Freescale Semiconductor 4-11

LITE5200B User’s Manual, Rev. 0

Hardware Description

4.5.8 PCI – J13 J14

The MPC5200B supports a single 3.3v PCI device1. The Lite5200B supports two PCI devices by the
addition of external arbitration logic. See Section 4.5.8.1, “PCI Arbiter,” on page 4-13 for further
information.

Table 4-22. PCI 32-BIT 3.3VOLT CONNECTOR – J13/J14

PIN PIN NAME PIN PIN NAME

A1 TRST B1 -12V

A2 +12 B2 TCK

A3 TMS B3 GND0

A4 TDI B4 TDO

A5 +5 B5 +5V_1

A6 INTA B6 +5V_2

A7 INTC B7 INTB

A8 +5V_5 B8 INTD

A9 RESERVED3 B9 PRSNT1

A10 +3.3V (I/O) B10 RESERVED1

A11 RESERVED 4 B11 PRSNT2

A12 B12

A13 B13

A14 +3.3V (AUX) B14 RESERVED 2

A15 RST B15 GND1

A16 +3.3V (I/O)_3 B16 CLK

A17 GNT B17 GND2

A18 GND9 B18 REQ

A19 PME B19 3.3V (I/O) 1

A20 AD30 B20 AD31

A21 +3.3V (I/O)_7 B21 AD29

A22 AD28 B22 GND19

A23 AD26 B23 AD27

A24 GND10 B24 AD25

A25 AD24 B25 3.3V_1

A26 IDSEL B26 C/BE3

A27 +3.3V (I/O)_8 B27 AD23

A28 AD22 B28 GND20

A29 AD20 B29 AD21

A30 GND11 B30 AD19

A31 AD18 B31 3.3V_2

A32 AD16 B32 AD17

A33 +3.3V (I/O) 9 B33 C/BE2

A34 FRAME B34 GND3

1. Care must be taken to ensure that a 5v PCI card is not used with this board. Currently only 3.3v PCI devices are supported.

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LITE5200B User’s Manual, Rev. 0

Table 4-22. PCI 32-BIT 3.3VOLT CONNECTOR – J13/J14 (continued)

PIN PIN NAME PIN PIN NAME

A35 GND12 B35 IRDY

A36 TRDY B36 3.3V_3

A37 GND13 B37 DEVSEL

A38 STOP B38 GND4

A39 +3.3V (I/O) 10 B39 LOCK

A40 RESERVED 5 B40 PERR

A41 RESERVED 6 B41 3.3V_4

A42 GND14 B42 SERR

A43 PAR B43 3.3V_5

A44 AD15 B44 C/BE1

A45 +3.3V (I/O) 11 B45 AD14

A46 AD13 B46 GND5

A47 AD11 B47 AD12

A48 GND15 B48 AD10

A49 AD09 B49 M66EN

A50 GND16 B50 GND6

A51 GND17 B51 GND7

A52 C/BE0

BA53 +3.3V (I/O)_12 B53 AD07

A54 AD06 B54 3.3V_6

A55 AD04 B55 AD05

A56 GND18 B56 AD03

A57 AD02 B57 GND8

A58 AD00 B58 AD01

A59 +3.3V (I/O) 4 B59 3.3V_(I/O) 2

A60 REQ64 B60 ACK64

A61 +5V_6 B61 +5V_3

A62 +5V_7 B62 +5V_4

B52 AD08

Connector Descriptions

4.5.8.1 PCI Arbiter

The PCI arbiter on the Lite5200B utilizes the REQ line from each PCI slot to arbitrate the return GNT from
the MPC5200B. The arbitration logic utilizes a round robin approach in order to ensure that both PCI
devices may communicate with the MPC5200B. For further information on PLD arbitration logic please
refer to the application included in this kit.

Freescale Semiconductor 4-13

LITE5200B User’s Manual, Rev. 0

Hardware Description

PCI-1

GNT1

REQ0 REQ1

PCI_BUS_REQ

PCI-0

GNT0

Arbiter

PCI_BUS_GRANT

MPC5200B

Figure 4-2. PCI Arbitration

4.5.9 UART – J3

The 9 pin D-type connector on J3 provides a connection to PSC1 on the MPC5200B through a transceiver
IC.

Table 4-23. UART – J3

Pin Function

1NC

2RX

3TX

4NC

5 GND

6NC

7RTS

8CTS

9NC

Note: The case of connector J3 is grounded through an inductor.

4.5.10 USB – J4

A USB interface is provided on J4 which allows connection of a USB device to the MPC5200B USB1
through a USB transceiver IC.

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LITE5200B User’s Manual, Rev. 0

Switches

4.5.10.1 USB Decoupling – J12

If it is desired to use the USB pins of the MPC5200 for other than USB functions the buffer between the
USB transceiver and the MPC5200 must be disabled. This is done by installing a shorting jumper on
header J12. The USB pins of the 5200 are available on J17 as described in Section 4.5.7, “General Purpose
Headers – J16 J17 J18 J19 J20 J21 J22 J23,” on page 4-8.

Table 24. USB Decoupling JUMPER – J12

J12 USB Decoupling

4.6 Switches

USB Disconnected

Switch

USB active
DEFAULT SETTING

- Section 4.6.1, “Boot Configuration – SW1”

Section 4.6.2, “POR – SW2”

Section 4.6.3, “PLL Control – SW3”

Figure 4-3. Board Layout With Switches Highlighted

Freescale Semiconductor 4-15

Section 4.6.4, “Low Power Mode”

LITE5200B User’s Manual, Rev. 0

Hardware Description

4.6.1 Boot Configuration – SW1

XLB CLK SEL
SYS PLL CFG
2X FVCO
MOST GRAPHICS
LARGE FLASH
BOOT HIGH
WAITSTATES
BYTE LANE SWAP
WIDE BOOT DATA LANE
MUXED BOOT

Figure 4-4. Boot Configuration – SW1

10

PORCFG[26]
PORCFG[25]
PORCFG[24]
PORCFG[23]
PORCFG[16]
PORCFG[21]
PORCFG[20]
PORCFG[19]
PORCFG[18]
PORCFG[17]

4-16 Freescale Semiconductor

LITE5200B User’s Manual, Rev. 0