NXP Semiconductors JN5189M16, JN5189M1013 User Manual
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STATUS
JN-RM-2078
JN5189, 89T, 88, 88T modules development reference manual
Rev. 1.6 — April 15, 2019
Reference manual
dDocument information
Info
Content
Keywords
JN5189, 89T, 88, 88T, module
Abstract
Reference Manual for JN5189, 89T, 88, 88T modules and platform design.
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STATUS
NXP Semiconductors
JN-RM-2078
JN5189, 89T, 88, 88T modules development reference manual
JN-RM-2078
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Reference manual
Rev. 1.6 — April 15, 2019
2 of 33
Contact information
For more information, please visit: http://www.nxp.com
Revision history
Rev
Date
Description
1.0
20180201
Creation
1.1
20180307
Added picture of the JN5189-001-M16 module
1.2
20180525
Manufacturer address added
1.3
20180528
Update of IC chapter
1.4
20181004
Update of FCCID / IC ID
1.5
20180321
JN5188/88T added
Temperature range explained
O-QPSK modulation frequency band added
1.6
20190415
Add comments in chapter 8.2
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JN-RM-2078
JN5189, 89T, 88, 88T modules development reference manual
JN-RM-2078
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Reference manual
Rev. 1.6 — April 15, 2019
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1. Introduction
This manual describes the hardware for the reference designs for modules based around
the NXP JN5189 family of wireless microcontrollers. This family is composed by JN5189,
89T, 88, 88T modules. In this manual, JN5189 name can stand also for JN5189T,
JN5188 and JN5188T.
The NXP JN5189 modules are small, low-power and cost-effective evaluation and
development board or application prototyping and demonstration of the JN5189 device.
The JN5189 is an ultra-low-power, highly integrated single-chip device that enables
Standard IEEE 802.15.4 RF connectivity for portable, extremely low-power embedded
systems.
The JN5189 SoC integrates a radio transceiver operating in the 2.4 GHz ISM band
supporting O-QPSK modulation (2400MHz to 2483.5MHz), an ARM Cortex-M4
processor, up to 640 kB flash,152 kB SRAM and 128 kB ROM, 802.15.4 processor
hardware and peripherals optimized to meet the requirements of the target applications.
The design considerations presented in this manual are equally valid for bespoke
solutions where the JN5189 device is placed directly onto the product PCB.
Three modules models are available:
JN5189-001-M10
JN5189-001-M13
JN5189-001-M16
The models available are described in Table 1.
In order to complete a successful PCB design by your own the hardware guidelines
described in this reference manual must be followed as strictly as possible. Further
information on the JN5189 characteristics are available in the “JN5189 IEEE802.15.4
Wireless Microcontroller” datasheet.
1.1 Audience
This guide is intended for systems designers
1.2 Manufacturer address
NXP Semiconductors
Campus EffiScience, Esplanade Anton Philips
14906 Caen
1.3 Regulatory approvals
France
The JN5189-001-M10 and M13 are compliant with:
RED 2014/53/UE
CFR 47 FCC part 15
Industry Canada requirements
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JN-RM-2078
JN5189, 89T, 88, 88T modules development reference manual
JN-RM-2078
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© NXP Semiconductors N.V. 2016. All rights reserved.
Reference manual
Rev. 1.6 — April 15, 2019
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Part number
Description
Content
Reference
Manual
JN-RD-6054
JN5189
Module
Reference
Design
Package
OM15069
Standard Power
PCB Antenna
JN5189-001-M10
JN-RM-2078
OM15069
Standard Power
Fl connector
JN5189-001-M13
OM15072
High Power
Antenna diversity (PCB
antenna and Fl connector)
JN5189-001-M16
The high power JN5189-001-M16 is not approved for use in Europe. It is compliant with:
CFR 47 FCC part 15
Industry Canada requirements
2. Reference Design
The reference design package includes the following information for each module
variant:
Reference manual: JN-RM-2078
Schematics
Layout
Bill-of-Materials
Full design databases including schematics and layout source files are available on
request.
The following table provides a summary of the JN5189 Module Reference Design that is
available from the Wireless Connectivity area of the NXP web site.
Table 1. Modules references
Note: These reference designs are approved for the operating temperature range of
40 ºC to +105 ºC for JN5189T/JN5188T where NTAG is embedded and -40°C to
+125°C without embedded NTAG, as JN5188 and JN5189 modules. As reference, below
are the operating conditions from the datasheet.
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JN5189, 89T, 88, 88T modules development reference manual
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JN5189
Matching
µFl connector
JN5189-001-M10
JN5189
Matching
Printed antenna
JN5189-001-M13
Fig 1. JN5189-001-M10 & M13 block diagrams
JN5189SKY66403
Matching
JN5189-001-M16
Printed antenna
µFl connector
Fig 2. JN5189-001-M16 block diagram
Table 2. Operating conditions
3. Block diagram
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JN5189, 89T, 88, 88T modules development reference manual
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Reference manual
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32 MHz XTAL
DCDC external components
IF Printed antenna
µFl connector
0 ohm resistor used to
configure the module in
M10 or M13 variant
RFIO &
Matching Network
32 kHz XTAL
Fig 3. JN5189-001-M10 & M13
4. Marking
The label is fixed on the bottom face of the modules
5. Design considerations
To have successful wireless hardware development, the proper device footprint, RF
layout, circuit matching, antenna design, and RF measurement capability are essential.
RF circuit design, layout, and antenna design are specialties requiring investment in tools
and experience. With available hardware reference designs from NXP, RF design
considerations, and the guidelines contained in this application note, hardware engineers
can successfully design IEEE 802.15.4 radio boards with good performance levels. The
following figures show the JN5189 M10 & M13 reference modules. They contain the
JN5189 device and all necessary I/O connections.
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JN5189, 89T, 88, 88T modules development reference manual
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Reference manual
Rev. 1.6 — April 15, 2019
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DCDC external components
32 kHz XTAL
32 MHz XTAL
RFIO &
Matching Network
IF Printed antenna
µFl connector
FEM SKY66403
Fig 4. JN5189-001-M16
The device footprint and layout are critical and the RF performance is affected by the
design implementation. For these reasons, use of the NXP recommended RF hardware
reference designs are important for successful board performance. Additionally, the
reference platforms have been optimized for radio performance. Even small changes in
the location of components can mistune the circuit. If the recommended footprint and
design are followed exactly in the RF region of the board, sensitivity, output power,
harmonic and spurious radiation, and range will have a high likelihood of first time
success.
The following subsections describe important considerations when implementing a
wireless hardware design starting with the device footprint, PCB stack-up, RF circuit
implementation, and antenna selection. The following figure shows an example of a
typical layout with the critical RF section which must be copied exactly for optimal radio
performance. The less critical layout area can be modified without reducing radio
performance.
NOTE
Exact dimensions are not given in this document, but can be found in the manufacturing
files for the JN5189 modules
5.1 JN5189 device footprint
The performance of the wireless link is largely influenced by the device’s footprint. As a
result, a great deal of care has been put into creating a footprint so that receiver
sensitivity and output power are optimized to enable board matching and minimal
component count. NXP highly recommends copying the die flag exactly as it is shown in
the following figure; this includes via locations as well. Deviation from these parameters
can cause performance degradation.
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JN5189, 89T, 88, 88T modules development reference manual
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RFIO
GND vias
Die flag
Fig 5. Critical Layout of die flag area
Figure 5 shows the critical areas of the device die flag. These are the following:
• Ground vias and locations
• RF output and ground traces
• Die flag shape
5.2 PCB Stack-Up
Complexity is the main factor that will determine whether the design of an application
board can be two-layer, four-layer, or more. From an RF point of view a 4 layers PCB
is preferred to a two layers PCB.Nevertheless in a very simple application it should be
possible to use a 2 layers PCB.
The recommended board stack-up for either a four-layer or two-layer board design is
as follows:
• 4-layer stack-up:
— Top: RF routing of transmission lines
— L2: RF reference ground
— L3: DC power
— Bottom: signal routing
• Two-layer stack-up:
— Top: RF routing of transmission lines, signals, and ground
— Bottom: RF reference ground, signal routing, and general ground
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JN5189, 89T, 88, 88T modules development reference manual
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Fig 6. PCB stack-up
The JN5789-001-M10 and JN5189-001-M13 (OM15069) and JN5189-001-M16
(OM15062) modules are built on a standard 4–layer printed circuit board (PCB) with the
individual layers organized as shown in Figure 6.
Note: The NXP PCB layouts assume use of the layers defined above. If a different PCB
stack-up is used then NXP does not guarantee performance.
NXP strongly recommends the use of the above stack-up.
As shown in Figure 6, regarding transmission lines, it is important to copy not just the
physical layout of the circuit, but also the PCB stackup. Any small change in the
thickness of the dielectric substrate under the transmission line will have a significant
change in impedance; all this information can be found on the fabrication notes for
each board design. As an illustration, consider a 50 ohm microstrip trace that is 18 mils
wide over 10 mils of FR4. If that thickness of FR4 is changed from 10 to 6 mils, the
impedance will only be about 36 ohms.
In any case the width of the RF lines must be re-calculated according to the PCB
characteristics in order to ensure a 50 ohm characteristic impedance.
When the top layer dielectric becomes too thin, the layers will not act as a true
transmission line, even though all the dimensions are correct. There is not universal
industry agreement on which thickness at which this occurs, but NXP prefers to use a
top layer dielectric thickness of no less than 8-10 mils.
There is also a limit to the ability of PCB fabricators to control the minimum width of a
PCB trace and the minimum thickness of a dielectric layer. +/- 1 mil will have less
impact on an 18 mils wide trace and a 10 mil thick dielectric layer, than it will on a much
narrower trace and thinner top layer.
This can be an especially insidious problem. The design will appear to be optimized
with the limited quantity of prototype and initial production boards, in which the bare
PCB's were all fabricated in the same lot. However, when the product goes into mass
production there can be variations in PCB fabrication from lot-to-lot which can degrade
performance.
The use of a correct substrate like the FR4 with a dielectric constant of 4.4 will assist you
in achieving a good RF design.
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JN5189, 89T, 88, 88T modules development reference manual
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Reference manual
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While no special measures are required for the board design, it is recommended that
Class 1 tolerances be used.
5.3 RF circuit topology and matching
NXP always recommends that designers start by copying the existing NXP reference
design. This applies to both the circuit portion (schematic) of the design, and the PCB
layout. For all RF designs, particularly for designs at frequencies as high as 2.4 GHz,
the PCB traces are a part of the design itself. Even a very short trace has a small
amount of parasitic impedance (usually inductive), which has to be compensated for in
the remainder of the circuit.
What may seem like a minor change to the layout, or what would certainly be a minor
change at a lower frequency of operation, can actually be a significant change at 2.4
GHz. For example, we may consider that a metal trace on a PCB such as the JN5189001M1x modules is approximately 0.8 nH per mm. At lower frequencies, this would have
no impact, but at 2.4 GHz this would have a significant impact in any matching circuits.
The circuits used on the NXP reference designs are all tuned and optimized on the
actual layout of the reference design, such that the final component values take into
account the effects of the circuit board traces, and other parasitic effects introduced by
the PCB. This includes such issues as parasitic capacitance between components,
traces, and/or board copper layers, inductance of traces and ground vias, the non-ideal
effects of components, and nearby physical objects.
The layout of the RF portions of JN5189 based modules is critical. It is important that the
reference designs are strictly adhered to, otherwise the following may occur:
Reduction in RF output
Excessive spurious RF outputs leading to RF compliance issues
Unacceptable power slope across the full channel range
Poor range
Reduced Rx sensitivity
5.4 Transmission lines
Transmission lines have several shapes such as microstrip, coplanar waveguide,
and strip-line. For 802.15.4 applications built on FR4 substrates, the types of
transmission lines typically take the form of microstrip or coplanar waveguide
(CPW). These two structures are defined by the dielectric constant of the board
material, trace width, and the board thickness between the trace and the ground.
Additionally, for CPW, the transmission line is defined by the gap between the trace
and the top edge ground plane. These parameters are used to define the
characteristic impedance of the transmission line (trace) that is used to convey the
RF energy between the radio and the antenna.
JN5189 has a single ended RF output with a 3 components matching network
composed of a shunt capacitor, a series inductor then another shunt capacitor. In
addition a 0 ohm resistor has been placed between the RFIO port of the chip and
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