NXP Semiconductors FREESCALE MC13192 Reference Manual

MC13192 Evaluation Board

Reference Manual

Document Number: MC13192EVBRM

Rev. 1.2

09/2006

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Contents

About This Book

Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v

Chapter 1
Safety Information

Chapter 2
System Overview

2.1 Microcontroller Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.2 General-Purpose I/O and Peripheral Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.3 Power-Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.4 Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.5 Background Debug Module (BDM) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.7 Schematic and Bill of Materials (BOM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

Chapter 3
RF Front End

3.1 The Transmit (TX) Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3.2 Switch and Bandpass Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3.3 The Receive (RX) Chain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3.4 Low Noise Amplifier (LNA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

3.4.1 Enabling the LNA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

3.5 LNA Bias Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6

3.6 Reference oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7

3.7 Internal Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8

3.8 RF Modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8

3.8.1 LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8

3.8.2 Output Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

3.8.3 Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

3.8.4 TX Match . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

3.8.5 RX Match . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

3.8.6 Built in Antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

3.9 RF Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11

3.9.1 RX Sensitivity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11

3.9.2 TX Output Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11

Freescale Semiconductor i

MC13192EVB Reference Manual, Rev. 1.2

Chapter 4
PCB and MC13192EVB Interfaces

4.1 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

4.2 RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

ii Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

About This Book

This manual provides a detailed hardware description of the MC13192 Evaluation Board
(MC13192EVB). The MC13192EVB provides all the necessary components to evaluate and use the
MC13192.

The MC13192EVB is built around the Freescale MC13192 2.4 GHz transceiver. The Freescale
MC9S08GT60 microcontroller unit controls the MC13192.

The MC13192EVB is compliant to the following standards:

• FCC standard 47 CFR, part 15, section 15.247

• ETSI EN 300-328-1

• ETSI EN 300-328-2

• ETSI EN 300-220-1

Audience

This document is intended for software, hardware, and system engineers who are developing their products
or software applications making use of the MC13192 2.4 GHz transceiver to achieve wireless connectivity
capability. The MC13192 is compliant with the IEEE 802.15.4 and the ZigBee standards.

Organization

This document is organized into 4 chapters.

Chapter 1 Safety Information - This chapter provides operating guidelines for the

MC13192EVB.

Chapter 2 System Overview - Provides information about the micro controller part and its

surrounding.

Chapter 3 MC1321x RF Front End - Provides a detailed description of the RF front-end.

The chapter provides information about the MC1319x, 2.4 GHz transceiver, Tx
chain, Rx chain, LNA etc. The chapter also provides information about RF
measurements.

Chapter 4 PCB and MC13192EVB Interfaces - Highlights the available interfaces between

the evaluation board (EVB) and a personal computer (PC).

Revision History

The following table summarizes revisions to this document since the previous release (Rev. 1.1).

Revision History

Location Revision

Entire document. Update for BeeKit and S/W upgrades.

Freescale Semiconductor iii

MC13192EVB Reference Manual, Rev. 1.2

Conventions

This document uses the following notational conventions:

• Courier monospaced type indicate commands, command parameters, code examples, expressions,
datatypes, and directives.

• Italic type indicates replaceable command parameters.

• All source code examples are in C.

Definitions, Acronyms, and Abbreviations

The following list defines the acronyms and abbreviations used in this document.

ATD Analog To Digital

BDM Background Debug Module

CPU Central Processing Unit

EEPROM Electrical Erasable Programmable Read Only Memory

ESD Electro Static Discharge

EVB EValuation Board

GPIO General Purpose Input Output

ICG Internal Clock Generation

LDO Low Drop Output

LNA Low Noise Amplifier

MCU Micro Controller Unit

PA Power Amplifier

PC Personal Computer

PCB Printed Circuit Board

QFN Quad Flat Non-lead package

RAM Random Access Memory

RF Radio Frequency

Rx Receive

SCI Serial Communication Interface

SMA Sub Miniature version A

SPI Serial Peripheral Interface

Tx Transmit

iv Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

References

The following sources were referenced to produce this book:

[1] MC13192 Data Sheet, MC13192DS

[2] MC9S08GT60 Data Sheet, MC9S08GT60

[3] MBC13900 Data Sheet, MBC13900

Freescale Semiconductor v

MC13192EVB Reference Manual, Rev. 1.2

vi Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

Chapter 1
Safety Information

Any modifications to this product may violate the rules of the Federal Communications Commission and
make operation of the product unlawful.

47 C.F.R. Sec. 15.21

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant
to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference in a residential installation. This equipment generates, uses and can radiate radio frequency
energy and, if not installed and used in accordance with the instructions, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not occur in a particular
installation. If this equipment does cause harmful interference to radio or television reception, which can
be determined by turning the equipment off and on, the user is encouraged to try to correct the interference
by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is
connected.

• Consult the dealer or an experienced radio/TV technician for help.

47 C.F.R. Sec.15.105(b)

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment.
The antenna(s) used for this equipment must be installed to provide a separation distance of at least 8
inches (20cm) from all persons.

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:

1. This device may not cause harmful interference.

2. This device must accept any interference received, including interference that may cause undesired
operation.

3. This device is susceptible to electrostatic discharge (ESD) and surge phenomenon.

MC13192EVB Reference Manual, Rev. 1.2

Freescale Semiconductor 1-1

Safety Information

1-2 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

Chapter 2
System Overview

This chapter introduces the basic components, functionality, and power supply options of the
MC13192EVB. Also included in this chapter are the schematic and Bill of Materials (BOM) for the
MC13192EVB. For more information on applications used to evaluate the Freescale ZigBee/802.15.4
solution, refer to the ZigBee/802.15.4 Evaluation Kit Quick Start Guide, AN2772.

For information on how to setup the Freescale ZigBee/802.15.4 MAC primitives and the development
environment, refer to the 802.15.4 MAC/PHY Software Reference Manual, (802154MPSRM).

The primary voltage supply for the MC13192EVB is 3.0 V. This voltage is generated by the LDO (IC106
from National Semiconductors). The LDO can be supplied from either a USB port on a PC, or by a DC
voltage adapter. Input voltage from the DC voltage adaptor must be in the 3.5 to 12 VDC range.

The 3.0 V supply is split into various blocks such as, RF, LNA, BB, and others with 0 ohm resistors. This
allows users to measure current consumption of the various MC13192EVB blocks.

2.1 Microcontroller Unit

This section introduces the microcontroller unit (MCU) basic components and features.

The MC9S08GT60 is a member of the low-cost, high performance, HCS08 Family of 8-bit
microcontroller units. The MC9S08GT60 has 60 KB of on-chip programmable FLASH memory and 4 KB
of RAM available.

The MC9S08GT60 includes two independent serial communications interface (SCI) modules. These serial
communications interfaces are connected to respectively a RS-232 interface and an USB interface.

The MCU contains an analog to digital (ATD) converter module of 8 ports. The half of the pins is used for
communication to the RF part and the rest are available for easy use.

A serial peripheral interface (SPI) module handles the data communication between the MCU and the
transceiver.

All connections needed for fully controlling the MC13192, 2.4 GHz transceiver are provided by the
MC9S08GT60.

The MC9S08GT60 is housed in a 48-pin quad flat non-lead package (QFN).

MC13192EVB Reference Manual, Rev. 1.2

Freescale Semiconductor 2-1

System Overview

2.2 General-Purpose I/O and Peripheral Ports

Thirty eight pins are shared among general-purpose I/O (GPIO) and on-chip peripheral functions. The
MC9S08GTxx has six I/O ports, which include a total of up to 38 GPIO pins (one pin, PTG0, is output
only).

Many of these pins are shared with on-chip peripherals such as timer systems, external interrupts, or
keyboard interrupts. When these other modules are not controlling the port pins, they revert to GPIO
control.

Immediately after reset, all 38 of these pins are configured as high-impedance general-purpose inputs with
internal pull-up devices disabled.

The port allocation of the general-purpose I/O and on-chip peripheral functions on the EVB are listed in

Table 2-1.

Table 2-1. GPIO Port Allocation

MCU Port Functionality Input/Output

PTA0/KBIP0 SCI1, RS-232, (RTS) Input

PTA1/KBIP1 SCI1, RS-232, (CTS) Output

PTA2/KBIP2 Switch, SW1 Input

PTA3/KBIP3 Switch, SW2 Input

PTA4/KBIP4 Switch, SW3 Input

PTA5/KBIP5 Switch, SW4 Input

PTA6/KBIP6 SCI2, USB, (CTS) Output

PTA7/KBIP7 SCI2, USB, (RTS) Input

PTB0/AD0 LNA Control Output

PTB1/AD1 Pin Header, J107 Input/Output

PTB2/AD2 Pin Header, J107 Input/Output

PTB3/AD3 Pin Header, J107 Input/Output

PTB4/AD4 MC13192, GPIO1 Input

PTB5/AD5 MC13192, GPIO2 Input

PTB6/AD6 Antenna Control Output

PTB7/AD7 Pin Header, J107 Input/Output

PTC0/TxD2 SCI2, USB, (RXD) Output

PTC1/RxD2 SCI2, USB, (TXD) Input

PTC2/SDA MC13192, ATTNB Output

PTC3/SCL MC13192, RXTXEN Output

PTC4 MC13192, RSTB Output

PTC5 Pin Header, J107 Input/Output

2-2 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

Table 2-1. GPIO Port Allocation

MCU Port Functionality Input/Output

PTC6 Pin Header, J107 Input/Output

PTC7 Pin Header, J107 Input/Output

PTD0/TPM1CH0 LED, LED1 Output

PTD1/TPM1CH0 LED, LED2 Output

PTD2/TPM1CH0 Pin Header, J107 Input/Output

PTD3/TPM1CH0 LED, LED3 Output

PTD4/TPM1CH0 LED, LED4 Output

PTE0/TxD1 SCI1, RS-232, (TX) Output

PTE1/RxD1 SCI1, RS-232, (RX) Input

PTE2/SS MC13192, CEB Output

PTE3/MISO MC13192, MISO Input

PTE4/MOSI MC13192, MOSI Output

PTE5/SPSCK MC13192, SPICLK Output

System Overview

PTG0/BKGD/MS BDM Input/Output

PTG1/CRYSTAL Pin Header, J107 Input/Output

PTG2/EXTAL MC13192, CLK0 Input

PTG3 Pin Header, J107 Input/Output

2.3 Power-Saving Modes

The MC13192EVB has a power-saving mode which greatly reduces current consumption.

The power-saving mode on the MC13192 transceiver is the DOZE mode which has a typical current
consumption of 40 µA. The SPI is what controls entering and leaving DOZE mode on the MC13192.

The power-saving mode on the MC9S08GT60 is the STOP3 mode. The CPU, FLASH, and RAM are in
standby in the STOP3 mode. Also, all of the clocks in the MCU, including the oscillator itself are halted.
Exiting the STOP3 mode is accomplished by:

• Asserting RESET

• An asynchronous interrupt pin (IRQ or KBI)

• Through the real-time interrupt

2.4 Clock

The MC9S08GT60 contains an internal clock generation (ICG) module. An external square wave clock is
fed from the MC13192 transceiver into the ICG module at the EXTAL pin on Port G. The clock frequency
is 62.5 KHz.

Freescale Semiconductor 2-3

MC13192EVB Reference Manual, Rev. 1.2

System Overview

2.5 Background Debug Module (BDM) Interface

A Background Debug Module (BDM) interface is available on the MC13192EVB. The BDM interfaces
to the MCU which provides an interface for programming the on-chip FLASH. The BDM connector
provides the ability to connect a debug interface for development and accessing different memory data.
The BDM interface can also be used for traditional debugging. Debugging is accomplished using the
CodeWarrior IDE for HCS08.

2.6 Reset

RESET is a dedicated pin with a pull-up device built in. This pin is connected to the 6-pin BDM connector
so a development system can directly reset the MCU system. The MCU resets the EVB as part of its
start-up sequence when power is applied and the On/Off switch is set to on. If required, a manual external
reset can be executed by pressing the reset switch. In all cases, the reset sequence resets the MCU, which
in turn, resets the MC13192.

2-4 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

2.7 Schematic and Bill of Materials (BOM)

D

C

B

A

This section contains the 13192-EVB schematic and BOM.

J104

J104

1

253

ANT101

F_Antenna

ANT101

F_Antenna

R1130RR113

C103

10pF

C103

10pF

LDB212G4020C-001

LDB212G4020C-001

C102

10pF

C102

10pF

100_Ohm2

3

2

RIN_P

CEBi

SPICLKi

19

17

16

3V0_SW

TINJ_P

IC103

IC103

0R

C104

C104

6

VDD

50_Ohm4

50_Ohm3

4

3V0_BB

R117

R117

50_Ohm6

5

IN

OUT11OUT23GND

TINJ_M

2

10pF

10pF

4

VCONT

ATTNBi

14

13

470K

470K

R1180RNot Mounted

R1180RNot Mounted

C112

0.5pF

C112

0.5pF

L103

8.2nH

L103

8.2nH

µPG 2012TKE-2

µPG 2012TKE-2

C114

10pF

C114

10pF

Z102

Z102

VDDA

100_Ohm3

5

PAO_P

RSTBi12RXTXENi

TP106TP106

516

234

L102

8.2nH

L102

8.2nH

50_Ohm2CLKO

LDB212G4020C-001

LDB212G4020C-001

100_Ohm4

6

PAO_M

CLKOo

15

C128

10pF

Not Mounted

C128

10pF

Not Mounted

C115

10pF

C115

10pF

2

Q101

MBC13900

Q101

MBC13900

R140

220R

R140

VCC_LNA

220R

41,3

L105

1.5nH

L105

1.5nH

C105

1.0pF

C105

1.0pF

R112

82K

R112

82K

R119

R119

50_Ohm5

3V0_LNA

R1240RNot Mounted

R1240RNot Mounted

3V0_SW

1

2

3

L104

L104

5.6nH

5.6nH

R105

R105

47K Not Mounted

47K Not Mounted

LNACtrl

47K Not Mounted

47K Not Mounted

R106

R106

C132

C132

Q102

Q102

AntCtrl

100pF

100pF

MMBT3904

Not Mounted

MMBT3904

Not Mounted

470KNot Mounted

470KNot Mounted

R107

R107

470K

470K

Q103

Q103

3V0_LNA

Not Mounted

Not Mounted

MMBT3906

Not Mounted

MMBT3906

Not Mounted

VCC_LNA

R108

R108

C134

10pF

C134

10pF

Not Mounted

Not Mounted

150R

150R

AntCtrl

516

Z101

Z101

234

R109

Not Mounted

R109

Not Mounted

L101

L101

100_Ohm1

1

RIN_M

GPIO111GPIO210GPIO39GPIO48GPIO725GPIO523GPIO624IRQBo20MISOo18MOSIi

IC102

IC102

GPIO2

GPIO1

TP108TP108

TP107TP107

GPIO1

GPIO2

220R

220R

6.8nH

6.8nH

50_Ohm1

50_Ohm7

C130

10pF

C130

10pF

C107

6.8pF

C107

6.8pF

X101

X101

7

SM

XTAL126XTAL2

VBATT31VDDA32VDDD

VDDINT22VDDLO129VDDLO228VDDVCO30GND

21

VDDA

3V0_RF

4

SMA Receptacle, Female

SMA Receptacle, Female

C108

6.8pF

C108

6.8pF

16.000MHz

16.000MHz

27

MC13192

MC13192

33

C110

100nF

C110

100nF

C109

100nF

C109

100nF

C106

100nF

C106

100nF

C111

1µF

C111

1µF

HOLE101

HOLE101

np hole ø4.2mm

np hole ø4.2mm

3V0_SW

3V0_LNA

R1100RR110

0R

R1110RR111

S106

Switch

S106

Switch

Powered by

5VDC < > USB

0R

HOLE102

HOLE102

V_USB

3
2
1

np hole ø4.2mm

np hole ø4.2mm

3V0_BB

R1380RR138

0R

5

IC106

IC106

1

5V0 3V0

J105DCJ105

System Overview

Rev

Rev

Rev

of

of

of

11Friday, May 05, 2006 JJ/ALA/HBR

11Friday, May 05, 2006 JJ/ALA/HBR

HOLE104

np hole ø4.2mm

HOLE104

np hole ø4.2mm

HOLE103

np hole ø4.2mm

HOLE103

np hole ø4.2mm

2100 East Elliot Drive

Tempe, AZ, USA

2100 East Elliot Drive

Tempe, AZ, USA

2100 East Elliot Drive

Tempe, AZ, USA

C117

1µF

C117

0R

D105

Green LED

D105

Green LED

2

3

C116

C116

DC

V_RS232

R114

R114

12

GND

ON/OFF

LP2981IM5-3.0

LP2981IM5-3.0

1µF

1µF

27R

27R

C113

C113

J1062pNot Mounted

J1062pNot Mounted

TP105TP105

R135

R135

1µF

10µF

10µF

220R

220R

A102

A102

A101

Primus datum point (Compside)

A101

Primus datum point (Compside)

3V0_RF

R1260RR126

4

NC

OUT

IN

231

11Friday, May 05, 2006 JJ/ALA/HBR

www.freescale.com

www.freescale.com

www.freescale.com

2006

2006

2006

1

80000528000_R0204.DSN R02.04

80000528000_R0204.DSN R02.04

80000528000_R0204.DSN R02.04

ZigBee Evaluation Kit (DIG528-2): Main Schematic

ZigBee Evaluation Kit (DIG528-2): Main Schematic

ZigBee Evaluation Kit (DIG528-2): Main Schematic

A2

A2

A2

© Freescale Semiconductor

© Freescale Semiconductor

© Freescale Semiconductor

Title

Size Document Number

Date: Sheet

Title

Size Document Number

Date: Sheet

Title

Size Document Number

Date: Sheet

2

Correct pin descriptions on IC103, pins 1 and 2

(pin 1 from OUT2 to OUT1, pin 3 from OUT1 to OUT2)

Revision history:

R02.04

Secundary fiducial point (Compside)

Secundary fiducial point (Compside)

A103

Secundary fiducial point (Soldside)

A103

Secundary fiducial point (Soldside)

PCB101

PCB101

DIG528-2

DIG528-2

3

BARCODE101

Label 26*13mm Test BarCode

BARCODE101

Label 26*13mm Test BarCode

123456

BDM PORT

2*3p

2*3p

3V0_BB

3V0_BB

VDD19VDDAD

43

SW5

S105

S105

Switch SPST SMD

Switch SPST SMD

RESET Switch

C133

100nF

C133

100nF

49

33

34

EP

VREFL

VREFH

VSS117VSSAD

VSS2

MC9S08GT60

MC9S08GT60

44

18

C101

100nF

C101

100nF

123456789

10

J107

J107

10p

10p

B

25

24

TXD

3V3OUT

IC105

IC105

6

C124

33nF

C124

33nF

V_USB

Not Mounted

Not Mounted

V_USB

22

21

20

19RI18

RTS23CTS

DTR

RXD

DSR

AVCC30VCC3VCC26VCC_IO

R123

470R

R123

470R

C125

100nF

C125

100nF

C129

100nF

C129

100nF

R137

R137

DCD

3V0

V_USB

IC107

IC107

10K

10K

Not Mounted

Not Mounted

13

7

6

5

NA

NA

GND

4

2.2K

2.2K

R136

R136

31

1

2

TEST

EESK

EEDATA

C123

C123

C122

C122

8

VCC

CS1CLK2DI3DO

93LC46B

Not Mounted

93LC46B

Not Mounted

12

11

32

16

EECS

TXLED

RXLED

TXDEN

XTIN27XTOUT

28

X102

6.00MHz

X102

6.00MHz

123

1µF

1µF

100nF

100nF

V_USB

14

PWRCTL

A

15

4

PWREN

R122

R122

4

10

29

17

GND9GND

AGND

SLEEP

USBDM8USBDP

RSTOUT5RESET

FT232BM

FT232BM

7

1.5K

1.5K

R121

27R

R121

27R

R120

27R

R120

27R

C127

Not Mounted

15pF

C127

Not Mounted

15pF

DATA+

V_USB

J102

J102

DATA-

3

2

1

4

VUSB

DATA-

DATA+

GROUND

C126

C126

C131

C131

6

SHIELD5SHIELD

Not Mounted

15pF

Not Mounted

15pF

10nF

10nF

USB Serie-B Right Ang.

USB Serie-B Right Ang.

5

J101

8

9

48

PTC7

24

J101

3V0

1

47

46

45

PTG3

RESET

PTG1/XTAL

PTG2/EXTAL

PTG0/BKGD/MS

PTB0/AD025PTB1/AD126PTB2/AD227PTB3/AD328PTB4/AD429PTB5/AD530PTB6/AD631PTB7/AD7

32

AntCtrl

GPIO1

GPIO2

AntCtrl

GPIO1

GPIO2

LNACtrl

SS

MOSI

IRQ

SPICLK

MISO

13

15

10

11

PTE2/SS

PTE0/TxD1

PTE1/RxD1

PTE3/MISO14PTE4/MOSI

4

C120

100nF

C120

100nF

C121

100nF

C121

100nF

2

5

4

C1-

C1+

C2+

VCC

FORCEON14FORCEOFF20READY

IC104

IC104

1

19

R1150RR115

0R

V_RS232

R1160RR116

0R

5

6

C2-

T1IN13T2IN

V+3V-7GND18T1OUT17T2OUT8R1IN16R2IN

C118

100nF

C118

100nF

C119

100nF

C119

100nF

Tx

J103

J103

D

R1OUT15R2OUT

RTSRxCTS

12

10

INVALID

MAX3318E

MAX3318E

9

11

9p Female Ang

9p Female Ang

594837261

m1 m2

S101

S101

Switch SPST SMD

Switch SPST SMD

SW1

S102

S102

3V03V0 3V0 3V0

SW2

Switch SPST SMD

Switch SPST SMD

D101

Red LED

D101

Red LED

D102

Red LED

D102

Red LED

LED3 LED2 LED1LED4

D103

Red LED

D103

Red LED

D104

Red LED

D104

Red LED

PTA0/KBIP035PTA1/KBIP136PTA2/KBIP237PTA3/KBIP338PTA4/KBIP439PTA5/KBIP540PTA6/KBIP641PTA7/KBIP7

IC101

IC101

SW3

S103

S103

Switch SPST SMD

Switch SPST SMD

TP101TP101

TP102TP102TP104TP104

TP103TP103

S104

S104

R101

220R

R101

220R

R102

220R

R102

220R

R103

220R

R103

220R

R104

220R

R104

220R

12

16

IRQ

PTE5/SPSCK

42

SW4

Switch SPST SMD

Switch SPST SMD

C

RSTB

RXTXEN

ATTNB

2

5

3

4

PTC46PTC57PTC6

PTC3/SCL

PTC2/SDA

PTC0/TxD2

PTC1/RxD2

PTD0/TPM1CH020PTD1/TPM1CH121PTD3/TPM2CH023PTD4/TPM2CH1

PTD2/TPM1CH2

22

Figure 2-1. Schematic

Freescale Semiconductor 2-5

MC13192EVB Reference Manual, Rev. 1.2

System Overview

2-6 Freescale Semiconductor

Figure 2-2. Bill of Materials (1 of 2)

MC13192EVB Reference Manual, Rev. 1.2

System Overview

Freescale Semiconductor 2-7

Figure 2-3. Bill of Materials (2 of 2)

MC13192EVB Reference Manual, Rev. 1.2

System Overview

2-8 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

Chapter 3

r

RF Front End

The MC13192EVB is designed to show a high performance, small form factor solution interfacing to a
single antenna. A built in, high performance, PCB antenna enables the design to be evaluated as-is, while
an SMA connector allows for easy RF testing and evaluation of other antenna designs.

Other reference designs demonstrate low cost solutions, integrated antenna designs, and the lowest Bill of
Material (BOM) count possible.

Optional LNA

MC13191/13192

LNA

PA

PA bias

200:50
balun

200:50
balun

Switch

Band
Pass
filte

Figure 3-1. MC13191/MC13192 Simplified Block Diagram

Two baluns transform the balanced input and output to a 50 Ohm unbalanced signal. This allows for easy
RF measurements and interfacing to a lot of different antennas, including chip antennas.

An RX/TX switch is included to allow for a single antenna solution. This allows for the smallest design
possible, and the switch is usually cheaper than using two antennas. The switch can be left out if a dual
antenna design is possible.

A simple band pass filter is added to reduce harmonics and provide some RX filtering. It also provides
protection against ESD discharges.

A solder switch selects between the default built-in F-antenna or the SMA connector.

The F-antenna provides good broadband matching and good efficiency, especially compared to size and
cost. Stand offs at least 1 cm high should be mounted on the PCB if placed close to a metallic surface.
Otherwise RF performance will be degraded due to antenna detuning.

Provisions for an optional LNA have been added for those applications that require optimum range.

MC13192EVB Reference Manual, Rev. 1.2

Freescale Semiconductor 3-1

RF Front End

3.1 The Transmit (TX) Chain

The TX output is a differential open drain output, which should be loaded with a 200 Ohm differential to
provide 2 dBm output power (nominal). A 50:200 Ohm balun is used to load the output correctly.

A DC path from VDDA is necessary to supply the output stage and is provided via the center tap on the
balun. Output capacitance is 0.56 pF typical, which is tuned out by L102. This value includes a typical 0.2
pF layout and pad capacitance. L102 can be omitted, which results in approximately a 2 dB power loss.

The output impedance is somewhat higher than 200 Ohms, so applying a 50/400 Ohm balun yields slightly
higher output power. The TX power can be adjusted in 16 steps, from 0 to -20 dBm (typical) via software.

3.2 Switch and Bandpass Filter

The switch is a single control device which maintains acceptable performance down to a 1.8 V supply. It
is specified at 2.7 V, but has guaranteed performance with slightly relaxed specifications to below 2 V.
Insertion loss is 0.35 dB typical.

Three series capacitors are needed to maintain the switch bias. The switch typically draws 50 µA supply
current, which is not usually a concern. However, in a battery powered application, where 50 µA
consumption in power-saving mode will shorten the battery life, GPIO1 can be used to turn the switch on
and off. As the GPIO1 signal does not work in some of the test modes, the default is Switch On at all times.
Leaving out R111 and mounting a 0 Ohm resistor at R124 change the switch to GPIO1.

The harmonic content from TX passes the FCC and ETSI requirements, but performance can vary
significantly with differences in the actual layout, and in the components used (especially the baluns). A
small LC bandpass filter has been inserted to provide additional margin to the harmonic suppression
requirements. This filter also provides some rejection of unwanted out-of-band RX frequencies and some
ESD protection. The filter may be left out in some applications. Nominal TX output at the antenna or the
SMA connector is 0 dBm.

3.3 The Receive (RX) Chain

The RX input impedance is high impedance and differential. Typical values are 2-4 kOhm in parallel with

0.63 pF. The latter includes a typical 0.2 pF layout pad capacitance. The inputs may be DC connected
together, but should have no DC connection to other parts of the circuit.

A 50:200 Ohm balun is used to step up the impedance and provide a balanced output. R109 provides
termination and L101 tunes out the input and PCB capacitance. This combination provides a good return
loss, as seen in the measurements. Normally, return loss is of little concern and R109 can be left out. This
provides approximately 5 dB better receiver sensitivity as the balun output voltage approaches the
open-load value. Return loss is low, typically 3.5 dB, but acceptable. All sensitivity measurements have
been made with R109 left out. L101 can be left out, but this results in approximately 4.5-5 dB sensitivity
loss. A 50:400 Ohm balun provides slightly better performance, but is not a commonly available
component.

3-2 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

Figure 3-2. Receiver Performance Curves

Return loss without R109 and with L101 = 6.8 nH. Tuning is slightly on the low side on this particular
PCB, but adequate. C102 provides better balance and added static protection. The inputs will stand the
usual capacitive 150 pF discharge test, but it is more sensitive than the other pins. The balun also adds
protection. Tuning can be verified by measuring return loss at C103. The test level should be -25 dBm or
lower to avoid overload.

3.4 Low Noise Amplifier (LNA)

An optional LNA is included on the EVB. The LNA schematic is shown in Figure 3-3. An MBC13900
transistor is employed, which ensures good gain and a low noise figure with low collector current.

3V0_LNA

GPIO 1

R1 19
100K

No t Moun ted

L104

C1 32

5.6nH

100pF

Inp ut, 5 0 Oh m

C1 28

10pF

Figure 3-3. LNA Schematic

A collector current of 3.5-4 mA has been chosen. This value ensures optimum noise performance at 2.4
GHz and an associated gain of 12-14 dB. Design target is a gain of 10 dB. The input is optimized for the
best noise figure and the optimum source impedance is approximately 36+j21 Ohm. L104 shifts the 50

R1 12
100K

2

R1 08
150R

L105

1.5nH

41,3

MBC13900
Q101

R1 40
220R

C1 15

10pF

C1 05

1.0pF

Output, 50 Ohm

Freescale Semiconductor 3-3

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

Ohm impedance to this value, as shown in Figure 3-4. Output impedance is close to 64-j70 Ohm. L105
and C105 matches this to 50 Ohm. The transistor is normally stable at most loads, but the 220 Ohm
collector loading resistor ensures stability at all load angles.

If considerable feedback exists in the PCB layout, a smaller damping resistor may be necessary.

Figure 3-4. LNA Performance Curves

The LNA output return loss and LNA gain were measured in a 50 Ohm system. The gain, including losses
and output damping resistor, is very close to the design target of 10 dB.

As the MC13192 RX input impedance is not 50 Ohms, a compromise output match on the LNA is required
to obtain optimum gain. This matching is dependent on the actual PCB layout.

3.4.1 Enabling the LNA

Users can enable the optional LNA by moving C103 and adding C128. This task requires a good soldering
iron with a small tip, a pair of tweezers, and small diameter solder (0.4 to 0.5 mm). A microscope or lighted
magnifying glass may also be required because the components are 0402 (1 mm x 0.5 mm x 0.5 mm) case
size.

Orient the board so that the External Antenna connector (J104) is at the top of the board. Below this
connector is a white box that outlines the transceiver-plus-MCU reference design. The MC13192
transceiver is the smaller IC on the right. Just above the MC13192 transceiver are the input and output
baluns, Z101 and Z102. They are the vertically mounted, rectangular, white ceramic parts between the
transceiver and J104. The RX input balun, Z101, is on the right. Above the upper left corner of Z101 is a
vertically mounted chip cap. This chip cap is C103. This chip cap needs to be rotated 90 degrees and
installed on the upper pair of horizontal pads as C134. Install an additional 10 pF 0402 chip cap on the
other pair of horizontal pads as C128.

Figure 3-5 shows C103 in its factory default position for LNA disabled.

3-4 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

C103

Z101

Z102

Figure 3-5. Factory Default Capacitor Installation (LNA Disabled)

Figure 3-6 shows C128 and C134 installed to enable the LNA.

C134

C128

Z10 1

Z1 02

Figure 3-6. After Capacitor Modifications (LNA Enabled)

Freescale Semiconductor 3-5

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

3.5 LNA Bias Circuits

GPIO1

3V0_LNA

Input, 50 Ohm

R119
100K

No t Mou n ted

C132
100pF

C128

10pF

L104

5.6nH

R112
100K

2

R108
150R

L105

1.5nH

41,3

MBC13900
Q101

R140
220R

C115

10pF

C105

Output, 50 Ohm

1.0pF

Figure 3-7. Basic LNA Bias Circuit Schematic

The default LNA bias runs through R112 with a nominal bias of 3.75 mA. Some variation in bias is to be
expected with this simple circuit, but this is acceptable in many applications. The bias is expected to be
within the range of 2.4 - 4.8 mA, which gives a few dB's of gain variation. For measurement convenience,
the LNA is on at all times. Switching the base feed to GPIO1 turns the LNA off in standby and sleep mode.
This is done by removing R112 and adding R119. Because the GPIO1 does not work properly in some test
modes, the default configuration is with R112 mounted. In applications operating over a range of supply
voltages and extended temperature ranges, a more sophisticated bias arrangement is needed. Also, in
battery applications, the LNA should only be turned on when necessary.

3-6 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

Biasing options

R112 22K

LNACtrl

R105 22K Not Mounted

GPIO1

R119 22K Not Mounted

AntCtrl

R106 470K

Inp ut, 5 0 Oh m

Q103
MMBT3 906

R107 470K

Q102
MMBT3 904

C1 32

100pF

C1 28

10pF

L104

5.6nH

VCC_LNA 2-3.6V

R1 08
150R

L105

1.5nH

41,3

MBC13900

2

Q101

R1 40
220R

Bias control

C1 15

10pF

C1 05

1.0pF

LNA

Output, 50 Ohm

Figure 3-8. Optional Bias Control Schematic

Adding the circuit around Q102 and Q103 stabilizes the bias. R112 should be changed to 22 kOhm. As the
collector current ramps up, the voltage drop across R108 reaches 0.6 V and Q103 turns on. This causes
Q102 to shunt away excess base bias and stabilizes the collector current at 3.7 mA. Slight temperature
dependence is still present due to the temperature drift of the B-E path of Q103. By employing an NTC
resistor as part of R108, this drift can be compensated for. Adding R106 turns off the LNA in TX mode.

Switching the base feed to GPIO1 turns the LNA off in standby and sleep mode. This is accomplished by
removing R112 and adding R119. Because the GPIO1 does not work properly in some test modes, the
default configuration has R112 mounted.

3.6 Reference oscillator

Figure 3-9. Simplified Oscillator Schematic

MC13192EVB Reference Manual, Rev. 1.2

Freescale Semiconductor 3-7

RF Front End

This inverter type reference oscillator requires two external load capacitors to resonate the crystal. Because
the oscillator runs with a very low current draw (11 µA), crystals with a load capacitance of 6-8 pF are
recommended to ensure proper oscillation. The crystal should also have a low Co value.

A built-in switched capacitor bank allows fine tuning of the reference frequency. Each oscillator pin is
connected to a 0-5 pF capacitor bank. The default start up value is 2.5 pF at each pin. The pull ability of
the crystal determines the actual tuning range, but values of +/-20 to 50 ppm are typical.

The external capacitors together with the PCB capacitance and the internal switched capacitor bank makes
up the load capacitance of the crystal. The values of the external capacitors are:

Cext = 2(Cl -Cpcb-2.5pF)

A typical starting value would be 2Cl -8pF.

With the recommended ZD00882 crystal from KDS, typical external capacitors are 8.2 pF each, but may
require fine tuning depending on the actual PCB layout. The typical range of load capacitors for the crystal
(6-10 pF) are also efficient as 2.4 GHz coupling and decoupling capacitors, so the same value may be used
both for crystal loading and coupling/decoupling, saving components in the BOM.

To meet the requirements of the ZigBee specification, the oscillator should be within 40 ppm of 16 MHz.
This applies for initial spread, temperature drift, and aging. Crystal performance (temperature drift and
initial tolerance) are the main contributors to this tolerance.

3.7 Internal Power Supplies

VBATT and VDDINT are the battery supply to MC13192 and should be connected together. A decoupling
capacitor (1 µF recommended) should be placed close to the chip.

VDDA, VDDLO1, and VDDLO2 must be connected together and decoupled with a 100 nF capacitor to
ensure stability of the internal regulator. Bias for the power amplifier PA should also be connected to this
supply. VDDD and VDDVCO should each be decoupled with a 100 nF capacitor to ensure stability of the
internal regulators.

The capacitor values are not especially critical. 10% X5R/X7R capacitors are recommended. For room
temperature operation only, Y5V capacitors may be employed. For low-cost applications, the capacitors
may be reduced to 10 nF without stability loss, but decoupling will be less efficient.

3.8 RF Modifications

The MC13192EVB demonstrates that with high-performance solutions and some experimentation, the
performance requirements of several applications can be satisfied with a less complex front-end. This
section provides some general suggestions as to what modifications can be made and the resultant
performance changes.

3.8.1 LNA

Most applications will have more than adequate range without an LNA and not using an LNA leaves out
a considerable number of components and saves some current usage. Also, the board space used by the
LNA could be used for improving antenna efficiency.

3-8 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

3.8.2 Output Filter

L103 and C112 can be left out in many applications, but spurious performance should be tested. If the
antenna does not have a DC connection to ground, C104 can be left out.

3.8.3 Switch

In the case of a dual antenna approach, C103, C104, and the switch can be left out. However, when using
chip antennas, it is often less expensive to use the switch and one antenna.

3.8.4 TX Match

L102 can be left out which results in a power loss of approximately 2dB. However, if the layout is
optimized for low capacitance, the power loss may even be less. C130 can usually be replaced with a 100
nF capacitor without any performance loss. Then C106 can be left out because C130 will provide adequate
decoupling.

Z102 can be replaced by a discrete balun, but a discrete balun is sensitive to load impedance and PCB
spread, and it takes up more board space than the ceramic types. As the total cost is often the same (or even
more) than the ceramic balun, it is not recommended to use a discrete balun.

3.8.5 RX Match

R109 can be left out in most cases which results in better sensitivity. L101 can be left out, but it will result
in a 4.5-5 dB sensitivity loss. A PCB hairpin can replace L101. C102 can be left out with little performance
loss in many applications. Z101 is the same as in the TX chain.

Refer to AN2731 for more information on balanced antenna designs which interface directly to the
MC13192.

3.8.6 Built in Antenna

The built in F-antenna is a simple PCB antenna which provides good performance at low cost. It is also
reasonably small in size. The antenna exhibits adequate broadband matching and good efficiency. The
radiation pattern is relatively omni-directional.

Freescale Semiconductor 3-9

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

Figure 3-10. Antenna Return Loss Performance Curve

EVK horisontal PCB radiation pattern:

5
0

-5

-10

-15

-20

-25

-30

Vert. polarisation (dBi) Hor. polarisation (dBi)

EVK vertical PCB radiation pattern:

Vert. polarisation (dBi) Hor. polarisation (dBi)

Figure 3-11. Typical Radiation Patterns

It is possible to evaluate other antenna designs by using the SMA connector.

5
0

-5

-10

-15

-20

-25

-30

3-10 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

3.9 RF Measurements

The measurements presented here are typical values as measured on the MC13192EVB. These values do
not represent guaranteed performance.

3.9.1 RX Sensitivity

The input level is adjusted until 100 mV RMS appears on GPIO4. Actual sensitivity at 1% Packet Error
Rate (PER) is reached at approximately 20 mV PP at GPIO4, so a correction factor of 23 dB is employed.

Table 3-1. Receive Sensitivity

L101 Sensitivity (100mV RMS at GPIO4) Sensitivity (approximately 1% PER)

nH 2405 MHz 2445 MHz 2480 MHz 2405 MHz 2445 MHz 2480 MHz

5.6 nH -71 dBm -71 dBm -72 dBm -94 dBm -94 dBm -95 dBm

6.8 nH -73 dBm -73 dBm -73 dBm -96 dBm -96 dBm -96 dBm

A 6.8 nH coil provides the best and most uniform sensitivity in this layout.

3.9.2 TX Output Power

Table 3-2. Transmit Output Power

L102 Output Power (At Maximum)

nH 2405 MHz 2445 MHz 2480 MHz

6.8 nH 1.5 dBm 1.7 dBm 2.1 dBm

8.2 nH 2.4 dBm 2.2 dBm 1.5 dBm

10 nH 1.5 dBm 1.0 dBm 0.5 dBm

A 7.5 nH coil would be optimum in this layout to provide high output power and flat frequency response.

Freescale Semiconductor 3-11

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

EVB Power / ha rmonics

10

0

0123456789abcde f

-10

-20

-30

dBm

-40

-50

-60

-70

Power setting (Hex)

Fund.

2.nd

3.rd

Spec

Figure 3-12. Power Output and Harmonics Versus Power Setting

Po ( dB m)

5

0

0123456789abcde f

-5

-10

-15

-20

-25

Po ( dB m)

Figure 3-13. Output Power Versus Power Setting

MC13192EVB Reference Manual, Rev. 1.2

3-12 Freescale Semiconductor

I ( mA )

40

38

36

34

32

30

28

26

24

22

20

0123456789abcde f

I ( mA )

RF Front End

Figure 3-14. Current Consumption Versus Power Setting

Freescale Semiconductor 3-13

MC13192EVB Reference Manual, Rev. 1.2

RF Front End

3-14 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2

Chapter 4
PCB and MC13192EVB Interfaces

The EVB can communicate with the Test Tools either through the USB or RS-232 port.

4.1 USB Interface

The MCU does not contain a dedicated USB port. To support USB, an all in one IC is used. This IC
interfaces between the UART and the USB port on a personal computer (PC). The FTDI company
manufactures an IC (FT232BM) IC105 on the MC13192EVB, which fulfils this requirement and requires
just a few external components. A simple setup requires only 11 components and that includes the USB-b
connector. R120 and R121 act as the driver output impedance of 27 Ohms on the USBDP and the USBDM
pins. R122 (1.5 kohm) controls the power state of the USB port (suspend and other states).

IC105 is clocked by its own oscillator. A 6 MHz ceramic resonator is used which is multiplied up to 8 times
depending on the usage internal in IC105. A ceramic resonator was selected. IC105 is wired to
microcontroller SCI2, with 4 connections:

1. TXD

2. RXD

3. /RTS

4. /CTS

IC105 is supplied from the USB port. The voltage level on the UART of IC105 must comply with the
voltage level of the MC9S08GT60. This is accomplished by supplying VCC_IO with 3.0 V. The USB port
from either a PC or HUB must be able to supply the MC13192EVB including IC105. The EVB can be
supplied from either the USB or the DC adapter. The design supports an external EEPROM. When using
the EEPROM, a chosen vendor ID can be displayed in the system tool.

4.2 RS-232 Interface

The RS-232 can be used as an alternative interface to the MC13192EVB. A level shifter made by Maxim,
(MAX3318E) is used as the interface between the MC9S08GT60 and the PC. The Maxim IC only requires
four capacitors to generate the RS-232 compliant signal levels.

IC104 is wired to the MCU at SCI1, with 4 connections:

1. TXD

2. RXD

3. /RTS

4. /CTS

IC104 is supplied with 3.0 V from the on board LDO, IC106.

MC13192EVB Reference Manual, Rev. 1.2

Freescale Semiconductor 4-1

PCB and MC13192EVB Interfaces

4-2 Freescale Semiconductor

MC13192EVB Reference Manual, Rev. 1.2