NXP Semiconductors Freescale 56F800 User Manual

56F800
16-bit Digital Signal Controllers

freescale.com

56F800 Demonstration Board

User Manual

DSP56F800DBUM
Rev. 0
09/2005

TABLE OF CONTENTS

Freescale Semiconductor i
Preliminary

Preface

Chapter 1
Introduction

1.1 56F800 Demonstration Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.2 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

Chapter 2
Technical Summary

2.1 OPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.1.1 HOST_ENABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.1.2 CUT_AWAY Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.2 PORTS AND CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2.1 PWR Jack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2.2 POWER PORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2.3 GPIO / SERIAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2.4 TIMER / PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.2.5 ADC Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.2.6 COM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.2.7 JTAG / OnCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.2.8 P1 - HOST JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.3 USER FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.3.1 MICROPHONE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.3.2 POTENTIOMETER (POT) - R12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

2.4 Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

Appendix A
56F800 Demonstration Board Schematics

56F800 Demonstration Board User’s Manual, Rev. 0

ii Freescale Semiconductor

LIST OF FIGURES

Freescale Semiconductor iii

1-1 56F800 Demonstration Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

2-1 Power Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

A-1 56F800 Demonstration Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2

56F800 Demonstration Board User’s Manual, Rev. 0

iv Freescale Semiconductor

TABLE OF CONTENTS

Freescale Semiconductor i
Preliminary

2-1 CUT_AWAY Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

2-2 Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

56F800 Demonstration Board User’s Manual, Rev. 0

ii Freescale Semiconductor

Preface, Rev. 0

Freescale Semiconductor 3

Preface

This reference manual describes in detail the hardware on the 56F800 Demonstration
Board.

Audience

This document is intended for application developers who are creating software for
devices using the Freescale 56F800 Demonstration Board.

Organization

This manual is organized into two chapters and one appendix.

•

Chapter 1, Introduction - provides an overview of the Demonstration Board and its

features.

•

Chapter 2, Technical Summary - describes the 56F800 Demonstration Board in

detail.

•

Appendix A, 56F800 Demonstration Board Schematics - contains the schematics of

the 56F800 Demonstration Board.

Suggested Reading

Related documentation for the 56F800 family of digital signal controllers may be found at:

http://www.freescale.com/dsc

56F800 Demonstration Board User’s Manual, Rev. 0

4 Freescale Semiconductor

Notation Conventions

This manual uses the following notational conventions:

Typeface, Symbol or

Ter m

Meaning Examples

Typeface, Symbol or

Term

Courier
Monospaced Type

Code examples //Process command

for line flash

Courier
Monospaced Type

Italic Directory names,

project names,
calls,
functions,
statements,
procedures,
routines,
arguments,
file names,
applications,
variables,
directives,
code snippets
APIs
in text

...and contains these core
directories:
applications contains
applications software...

...CodeWarrior project,
3des.mcp is...

...the pConfig argument....

...defined in the C header

file, aec.h....

Italic

Bold Reference sources,

paths,
emphasis

...refer to the Ta rget -

ing DSP56F80x Plat­form

manual....

...see: C:\Program

Files\Embedded
SDK\help\tutorials

Bold

Blue Text Linkable ...refer to Chapter 7,

License....

Blue Text

Number Any number is consid-

ered a positive value,
unless preceded by a
minus symbol to sig­nify a negative value

3V

-10

DES

-1

Number

ALL CAPITAL LET­TERS

# defines/
defined constants

# define
INCLUDE_STACK_CH
ECK

ALL CAPITAL LETTERS

Brackets [...] Function keys ...by pressing function

key [F7]

Brackets [...]

Preface, Rev. 0

Freescale Semiconductor 5

Cautionary Notes

1. Electrostatic Discharge (ESD) prevention measures should be applied whenever
handling this product. ESD damage is not a warranty repair item.

2. EMC Information on the 56F800 Demonstration Board:

a. This product as shipped from the factory with associated power supplies and

cables, has been tested and meets with requirements of CE and the FCC as a
CLASS A product.

b. This product is designed and intended for use as a development platform for

hardware or software in an educational or professional laboratory.

c. In a domestic environment this product may cause radio interference in which

case the user may be required to take adequate prevention measures.

d. Attaching additional wiring to this product or modifying the products operation

from the factory default as shipped may effect its performance and also cause
interference with other apparatus in the immediate vicinity. If such interference
is detected, suitable mitigating measures should be taken.

Terminology

This development board applies option selection jumpers. Terminology for application of
the option jumpers is as follows:

Jumper on, in, or installed = jumper is a plastic shunt that fits across 2 pins and the shunt is
installed so that the 2 pins are connected with the shunt.

Jumper off, out, or idle = jumper or shunt is installed so that only 1 pin holds the shunt, no
2 pins are connected, or jumper is removed. It is recommended that the jumpers be idled
by installing on 1 pin so they will not be lost.

This development board applies CUT_AWAY option selections. These option selections
apply surface mount resistor locations with a printed circuit board trace connecting both
component pads. This type connection places an equivalent 0-ohm type resistor in series
with the I/O signal and the user component or I/O connector on the board. These
connections maybe cut with a razor blade or similar type knife between the component
pads to isolate the default connection provided. Reconnection of the cut-away type pads
can be made by either installing a 0 ohm 0805 size surface mount resistor or a small wire
jumper on the component pads.

56F800 Demonstration Board User’s Manual, Rev. 0

6 Freescale Semiconductor

Definitions, Acronyms, and Abbreviations

Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.

References

The following sources were referenced to produce this manual:

DSP56800 Family Manual

DSP56F80x User’s Manual

Technical Data, 56F801 16-Bit Digital Signal Controller

ADC

Analog-to-Digital Converter

CTS

Clear To Send

ESD

Electrostatic Discharge

GPIO

General Purpose Input and Output Port

JTAG

Joint Test Action Group. A bus protocol/interface used for test and
debug.

OnCE

TM

On-Chip Emulation, a debug bus and port created by Freescale to enable
designers to create a low-cost hardware interface for a professional
quality debug environment.

PC

Personal Computer

POT

Potentiometer

PWM

Pulse Width Modulation

RTS

Request To Send

Introduction, Rev. 0

Freescale Semiconductor 1

Chapter 1
Introduction

The 56F800 Demonstration Board is used to demonstrate the abilities of the 56F800
family and to provide a hardware tool allowing the development of applications that use
the 56F800 devices.

1.1 56F800 Demonstration Board Features

• 56F801FA60 (60 MHz version)

• RESET Switch

• IRQ Switch

• GPIO / SERIAL Port (10 pin) *

• TIMER / PWM Port (10 Pin) *

• ADC Port (10 Pin) *

• JTAG / OnCE Port (14 pin) *

• Host JTAG Port (P1- DB25P)

• COM1 Port - SCI to RS232 (DB9S) *

• PWR Jack supply connector

• Power Port *

• Power Indicator

• 10 User Indicators

• User Potentiometer (R12)

• Microphone with amplifier

• Crystal Reference (Y1) *

* All components may not be installed at the factory. The user may install the components
to apply associated feature.

The 56F800 Demonstration Board is detailed in Figure 1-1.

56F800 Demonstration Board User’s Manual, Rev. 0

2 Freescale Semiconductor

Figure 1-1. 56F800 Demonstration Board

2

R2

L1

C3

+

C8

1

D3

U3

74ACT05

1

R12

JTAG

1

Y1

C5

U5

74LCX125

U4

74ACT125

JP1

U2

74ACT05

IRQ

1

D11

PWR

TIMER -PORT

1

U6

74ACT00

15

96

COM1

GND

VDDA+3.3V

+VIN

MICRO
PHONE

U7

ON_OFF

VR1

U1

DSP56F801

3

4

56

7

GND

C1

C2

R3 R5

R4 R6

R7

R8

R9

R10

R11

R13

R14

C6

R1

R16

R17

R23

R24

R25

R27

R26

R28

R22

R21

R15

R19

R20

C9

C11

C15C14

C16

C17

C18

R34

C12R30

R29

R31
R32

C13
R33

C10C7

4

6

9

RTSCTS

GND

P1

13

25

1

14

D5D6D7

D8D9D10

D1

RESET

D2

POWER

D4

C4

U8

SP3232

RESET

ANALOG -PORT

1

GPIO -PORT

1

VR2

SILKSREEN LAYER

REV.A

AXM-0311

DEMO

DSP56F801

DSP56F801DEMO AXM-0311 REV.A

AXIOM MANUFACTURING

4.200

"

3.000

"

0.000

"

0.000

"

SPECIFICATIONS

Introduction, Rev. 0

Freescale Semiconductor 3

1.2 SPECIFICATIONS

• +9V DC input voltage typical, 200ma

• Input voltage range: +7 to +15V DC

• On board regulated +5V DC and +3.3V DC supplies

• Board size: 3 x 4.2 inches

56F800 Demonstration Board User’s Manual, Rev. 0

4 Freescale Semiconductor

Technical Summary, Rev. 0

Freescale Semiconductor 1

Chapter 2
Technical Summary

This chapter describes the 56F800 Demonstration Board’s available options.

2.1 OPTIONS

2.1.1 HOST_ENABLE

The HOST_ENABLE option jumper is installed by default and enables the Host JTAG
interface on the board. With the option jumper installed, the 56F801 device will reset into
Debug mode and await Host commands on the Host JTAG port (P1). Removing the
HOST_ENABLE option jumper will allow the 56F801 device to reset normally and
execute program code contained in the device’s Flash memory.

• HOST_ENABLE = INSTALLED: Debug Mode; host JTAG port is active

• HOST_ENABLE = OPEN or IDLE: Normal Mode; executes user code in Flash

2.1.2 CUT_AWAY Options

CUT_AWAY options allow the user to disconnect dedicated 56F801 I/O port resources
from development board connectors or peripherals. The CUT_AWAY options also allow
for re-establishing the connection by installing surface-mount 0805-size 0 ohm resistors or
mod wire with the use of a soldering iron. Normal operation of the 56F800 Demonstration
Board generally does not require any manipulation of the CUT_AWAY options.

Table 2-1. CUT_AWAY Options

CUT_AWAY # Description 56F801 Signal Connection Signal

1 ADC reference supply V

REF

V

DDA

2 User POT (R12) to ADC ANA6 R12 wiper

3 Crystal oscillator isolation XTAL / GPIOB3 GPIO / SERIAL pin 4

56F800 Demonstration Board User’s Manual, Rev. 0

2 Freescale Semiconductor

2.2 PORTS AND CONNECTORS

2.2.1 PWR Jack

This connector provides power input to the board by default. The PWR jack accepts a
standard 2.0 ~ 2.1mm center-barrel plug connector (positive voltage center) to provide the
+VIN supply of +9V DC at 200ma.

2.2.2 POWER PORT

Provides access to the +9V DC input, GND (power ground), +5V DC and +3.3V DC
power supplies. The +9V DC input should only be applied by PWR jack or Power Port,
but not both, or a supply conflict may occur and the 56F800 Demonstration Board could
be damaged. Power Port accepts a 3.5mm pin space terminal block.

Figure 2-1. Power Port

4 Crystal oscillator isolation EXTAL / GPIOB2 GPIO / SERIAL pin 3

5 COM1 serial port TXD0 / GPIO0 U8 pin 11 (COM1 TXD)

6 COM1 serial port RXDO / GPIOB1 U8 pin 12 (COM1 RXD)

7 Microphone to ADC ANA2 U7 pin 4 (Microphone output)

Table 2-1. CUT_AWAY Options (Continued)

CUT_AWAY # Description 56F801 Signal Connection Signal

+3.3V DC

GND

+5V DC

+9V DC

PORTS AND CONNECTORS

Technical Summary, Rev. 0

Freescale Semiconductor 3

2.2.3 GPIO / SERIAL

2.2.4 TIMER / PWM

2.2.5 ADC Port

2.2.6 COM1

RTS and CTS flow control connection pads are provided on the 56F800 Demonstration Board to
apply unassigned 56F801 I/O to support flow control on COM1. The RTS pad provides RS-232
level output conversion to COM1 port pin 8. The CTS pad provides RS-232-converted input
from COM1 pin 7.

The 1, 4, 6, and 9 pins provide RS-232 status. The 1, 4, and 6 pins are connected on the bottom
of the development board to provide NULL status to the host. The user may isolate pins and
provide the status connections to the host by applying I/O signals and RS-232 level conversion.

TXD0 / GPIOB0

GPIOB2

MISO / GPIOB6

IREQA*

SCLK / GPIOB4

GPIOB1 / RXD0
GPIOB3

GPIOB7 / SS*

RESET*

GPIOB5 / MOSI

1
3

7
9

5

2
4

7
10

6

GPIO B port provides alternate functions
as SCI (COM1 and indications) and SPI
ports. IREQ and RESET signals are also

provided on this connector.

TD0 / GPIOA0
TD2 / GPIOA2

PWMA2

PWMA0

PWMA4

GPIOA1 / TD1
FAU LTA0

PWMA3

PWMA1

PWMA5

1
3

7
9

5

2
4

7
10

6

GPIOA0 - 2 port provides alternate
functions of Timer TD0 - 2 I/O.
Note that most of these ports provide a
user indication.

ANA6
ANA4

ANA0

VREF

ANA2

ANA7
ANA5

ANA1

GND

ANA3

1
3

7
9

5

2
4

7
10

6

Analog inputs. Note that ANA2 and
ANA6 provide Microphone and User
POT R12 input, respectively.

1

TXD0

4

GND

RXD0

6

RTS

9

CTS

1
2

4
5

3

6

8
9

7

The COM1 port has a female DB9 connector that
interfaces to the 56F801 internal SCI0 serial port via
the U8 RS-232 transceiver. It uses a simple 2-wire
asynchronous serial interface and is translated to
RS-232 signaling levels.

1,4,6 connected (host null)

56F800 Demonstration Board User’s Manual, Rev. 0

4 Freescale Semiconductor

2.2.7 JTAG / OnCE

The JTAG 14-pin connector is compatible with the Freescale OnCE development port. This
connector allows the connection of a OnCE-style background debug cable for software
development, programming and debugging in real time.

Note: HOST_ENABLE option must be open or idle to apply this connector.

2.2.8 P1 - HOST JTAG

The P1 - Host JTAG connector provides development port interface to a hosting Personal
Computer’s LPT or Printer port. The HOST_ENABLE option jumper must be installed for this
port to operate.

Note: HOST_ENABLE option must be installed to apply this connector.

2.3 USER FEATURES

Several circuits are provided for demonstration of 56F800 applications.

TDI

TDO

RESET in

TCK

GND
GND

(key)

TMS

GND

1
3

7
9

5

2
4

7
10

6

JTAG / OnCE BDM connection.

111312

14

+3.3V DC

DE*

TRST* in

Reset in

TCK

TDI

TMS

Pin 8 tie

GND

GND

1
2

4
5

3

14
15

17
18

16

P1 - HOST JTAG connector is a DB25
pin connector. Signals are organized for
direct connection to an IBM-compatible
PC with a straight-through DB25 cable.

Pin 7 / DE* signal, if supported, can be
enabled by installing R23 (51 ohms)

6719

20

TRST*

DE* (Note R23)

GND

GND
21
22

24
25

23

13

Pin 15 tie

TDO

P-CON

GND
GND

GND

GND

GND

8
9

11
12

10

Indicators

Technical Summary, Rev. 0

Freescale Semiconductor 5

2.3.1 MICROPHONE

A microphone with audio amplifier is provided on the 56F800 Demonstration Board for user
applications. The amplifier provides low-pass filtering starting at ~4000Hz for speech input.
The audio signal from the microphone amplifier is provided to the ADC ANA2 input channel via
CUT_AWAY option #7.

2.3.2 POTENTIOMETER (POT) - R12

The user POT R12 provides a 0 to +3.3V adjustable analog input to the 56F801’s ADC ANA6
channel. R12 can be removed from the ANA6 channel by CUT_AWAY option #2.

2.4 Indicators

User indicactions are provided that are active with a high level on the associated 56F801 device’s
I/O port. Table 2-2 details the indicators.

Table 2-2. Indicators

Indicator 56F800 Signal Color

D1 PWMA0 Green

D2 PWMA1 Green

D3 PWMA2 Green

D4 PWMA3 Green

D5 PWMA4 Yellow

D6 PWMA5 Yellow

D7 GPIOB1 / RXD0 Yellow

D8 GPIOB0 / TXD0 Yellow

D9 GPIOA1 / TD1 Red

D10 GPIOA2 / TD2 Red

56F800 Demonstration Board User’s Manual, Rev. 0

6 Freescale Semiconductor

56F800 Demonstration Board Schematics, Rev. 0

Freescale Semiconductor

1

Appendix A
56F800 Demonstration Board
Schematics

DSP56F801EVM Hardware User’s Manual, Rev. 0

2 Freescale Semiconductor

Figure A-1. 56F800 Demonstration Board

INDEX

Freescale Semiconductor Index - i

A

ADC vi, 2-1, 2-4
Analog-to-Digital Converter

ADC vi

C

CE v
Clear To Send

CTS vi
COM1 serial port 2-1
Crystal oscillator isolation 2-1
CTS vi

, 2-3

CUT_AWAY v

, 2-4, 2-5

D

DS25 2-4
DSP56F801 Digital Signal Processor User’s Manual vi

E

Electrostatic Discharge

ESD v

, vi

EMC v
ESD v

, vi

F

FCC v

G

General Purpose Input/Output Port

GPIO vi
GPIO vi

H

HOST_ENABLE 2-4

I

I/O connector v
I/O signal v

J

Joint Test Action Group

JTAG vi

JTAG vi

M

Microphone 2-2, 2-3

O

OnCE vi
On-Chip Emulation

OnCE vi

P

PC vi
Personal Computer

PC vi

POT vi

, 2-1, 2-3

Potentiometer

POT vi

Pulse Width Modulation

PWM vi

PWM vi

R

R23 2-4
RS-232 2-3
RTS 2-3

T

Technical Data, 56F801 16-Bit Hybrid Controller vi

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Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express
or implied copyright licenses granted hereunder to design or fabricate any
integrated circuits or integrated circuits based on the information in this
document.

Freescale Semiconductor reserves the right to make changes without further
notice to any products herein. Freescale Semiconductor makes no warranty,
representation or guarantee regarding the suitability of its products for any par­ticular purpose, nor does Freescale Semiconductor assume any liability arising
out of the application or use of any product or circuit, and specifically disclaims
any and all liability, including without limitation consequential or incidental dam­ages. “Typical” parameters that may be provided in Freescale Semiconductor
data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters, including
“Typicals”, must be validated for each customer application by customer’s tech­nical experts. Freescale Semiconductor does not convey any license under its
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for surgical implant into the body, or other applications intended to support or
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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other
product or service names are the property of their respective owners.
This product incorporates SuperFlash® technology licensed from SST.

© Freescale Semiconductor, Inc. 2005. All rights reserved.

DSP56F800DBUM
Rev. 0

9/2005