NXP PCF 8563 T/F4 Datasheet

Page 1

PCF8563

Real time clock/calendar

Rev. 04 — 12 March 2004 Product data

1. General description

The PCF8563 is a CMOS real time clock/calendar optimized for low power consumption. A programmableclockoutput,interruptoutputandvoltage-low detector are also provided. All address and data are transferred serially via a two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte.

2. Features

■ Provides year, month, day, weekday, hours, minutes and seconds based on

32.768 kHz quartz crystal

■ Century ﬂag

■ Clock operating voltage: 1.8 V to 5.5 V

■ Low backup current; typical 0.25 µA at VDD= 3.0 V and T

■ 400 kHz two-wire I2C-bus interface (at VDD= 1.8 V to 5.5 V)

■ Programmable clock output for peripheral devices (32.768 kHz, 1024 Hz,

32 Hz and 1 Hz)

■ Alarm and timer functions

■ Integrated oscillator capacitor

■ Internal power-on reset

■ I2C-bus slave address: read A3H and write A2H

■ Open-drain interrupt pin.

amb

=25°C

3. Applications

■ Mobile telephones

■ Portable instruments

■ Fax machines

■ Battery powered products.

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Philips Semiconductors

PCF8563

Real time clock/calendar

4. Quick reference data

Table 1: Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

supply voltage operating; I2C-bus inactive; T

operating; I T

amb

C-bus active; f

= −40 °C to +125 °C

supply current timer and clock output disabled;

= 400 kHz

SCL

timer and clock output disabled; f

= 100 kHz

SCL

timer and clock output disabled; f

= 0 Hz; T

SCL

= 5 V - - 550 nA

= 2 V - - 450 nA

amb

stg

ambient temperature operating −40 - +85 °C storage temperature −65 - +150 °C

amb

=25°C

=25°C 1.0 - 5.5 V

amb

= 400 kHz;

SCL

1.8 - 5.5 V

- - 800 µA

- - 200 µA

5. Ordering information

Table 2: Ordering information

Type number Package

Name Description Version

PCF8563P DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1 PCF8563T SO8 plastic dual in-line package; 8 leads; body width 3.9 mm SOT96-1 PCF8563TS TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1

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Philips Semiconductors

6. Block diagram

PCF8563

Real time clock/calendar

CLKOUT

INT

1 2 3 4 8

6 5

OSCILLATOR

OSCI

OSCO

SCL

SDA

Fig 1. Block diagram.

7. Pinning information

32.768 kHz

VOLTAGE

DETECTOR

MONITOR

I2C-BUS

INTERFACE

POR

PCF8563

DIVIDER

CONTROL

LOGIC

ADDRESS

CONTROL/STATUS 1

1 Hz

CONTROL/STATUS 2 SECONDS/VL MINUTES HOURS DAYS WEEKDAYS MONTHS/CENTURY YEARS MINUTE ALARM HOUR ALARM DAY ALARM WEEKDAY ALARM CLKOUT CONTROL TIMER CONTROL TIMER

0 1 2 3 4 5 6 7 8 9 A B C D E F

MGM662

7.1 Pinning

OSCI

INT

1 2

PCF8563P

3 4

MCE403

CLKOUTOSCO

SCL

SDA

OSCI

INT

1 2 3 4

PCF8563T

MCE198

Fig 2. Pin conﬁguration DIP8. Fig 3. Pin conﬁguration SO8. Fig 4. Pin conﬁguration TSSOP8.

CLKOUTOSCO

SCL

SDA

OSCI

INT

1 2

PCF8563TS

3 4

MCE199

CLKOUTOSCO

SCL

SDA

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Philips Semiconductors

handbook, halfpage

OSCI

PCF8563

Real time clock/calendar

OSCO

Fig 5. Device diode protection diagram.

7.2 Pin description

Table 3: Pin description

Symbol Pin Description

OSCI 1 oscillator input OSCO 2 oscillator output INT 3 interrupt output (open-drain; active LOW) V

SDA 5 serial data input and output SCL 6 serial clock input CLKOUT 7 clock output, open-drain V

MGR886

INT

PCF8563

4 ground

8 positive supply voltage

CLKOUT

SCL

SDA

8. Functional description

The PCF8563 contains sixteen 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which provides the source clock for the Real Time Clock/calender (RTC), a programmable clock output, a timer, an alarm, a voltage-low detector and a 400 kHz I2C-bus interface.

All 16 registers are designed as addressable 8-bit parallel registers although not all bits are implemented. The ﬁrst two registers (memory address 00H and 01H) are used as control and/or status registers. The memory addresses 02H through 08H are used as counters for the clock function (seconds up to years counters). Address locations 09H through 0CH contain alarm registers which deﬁne the conditions for an alarm. Address 0DH controls the CLKOUT output frequency. 0EH and 0FH are the timer control and timer registers, respectively.

The seconds, minutes, hours, days, weekdays, months, years as well as the minute alarm, hour alarm, day alarm and weekday alarm registers are all coded in BCD format.

When one of the RTC registers is read the contents of all counters are frozen. Therefore, faulty reading of the clock/calendar during a carry condition is prevented.

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Philips Semiconductors

8.1 Alarm function modes

By clearing the MSB of one or more of the alarm registers (bit AE = alarm enable), the corresponding alarm condition(s) will be active. In this way an alarm can be generated from once per minute up to once per week. The alarm condition sets the Alarm Flag (AF). The asserted AF can be used to generateaninterrupt (INT).TheAF can only be cleared by software.

8.2 Timer

The 8-bit countdown timer at address 0FH is controlled by the timer control register at address 0EH. The timer control register determines one of 4 source clock frequencies for the timer (4096 Hz, 64 Hz, 1 Hz, or1⁄60Hz), and enables or disables the timer. The timer counts down from a software-loaded 8-bit binary value. At the end of every countdown, the timer sets the Timer Flag (TF). The TF may only be cleared by software.Theasserted TF can be used to generate an interrupt (INT). The interrupt may be generated as a pulsed signal every countdown period or as a permanently active signal which follows the condition of TF. Bit TI/TP is used to control this mode selection. When reading the timer, the current countdown value is returned.

PCF8563

Real time clock/calendar

8.3 Clock output

A programmable square wave is available at pin CLKOUT. Operation is controlled by the CLKOUT control register at address 0DH. Frequencies of 32.768 kHz (default), 1024 Hz, 32 Hz and 1 Hz can be generated for use as a system clock, microcontroller clock, input to a charge pump, or for calibration of the oscillator. CLKOUT is an open-drain output and enabled at power-on. If disabled it becomes high-impedance.

8.4 Reset

The PCF8563 includes an internal reset circuit which is active whenever the oscillator is stopped. In the reset state the I2C-bus logic is initialized and all registers, including the address pointer, are cleared with the exception of bits FE, VL, TD1, TD0, TESTC and AE which are set to logic 1.

8.5 Voltage-low detector

The PCF8563 has an on-chip voltage-low detector. When VDD drops below V bit VL in the seconds register is set to indicate that the integrity of the clock information is no longer guaranteed. The VL ﬂag can only be cleared by software.

Bit VL is intended to detect the situation when VDD is decreasing slowly, for example under battery operation. Should VDD reach V bit VL will be set. This will indicate that the time may be corrupted.

before power is re-asserted then

low

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Philips Semiconductors

PCF8563

Real time clock/calendar

handbook, halfpage

low

period of battery operation

VL set

MGR887

normal power operation

Fig 6. Voltage-low detection.

8.6 Register organization

Table 4: Binary formatted registers overview

Bit positions labelled as x are not implemented. Bit positions labelled with 0 should always be written with logic 0; if read they could be either logic 0 or logic 1.

Address Register name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

00H control/status 1 TEST1 0 STOP 0 TESTC 0 0 0 01H control/status 2 0 0 0 TI/TP AF TF AIE TIE 0DH CLKOUT control FE xxxxxFD1FD0 0EH timer control TE xxxxxTD1TD0 0FH timer <timer countdown value>

Table 5: BCD formatted registers overview

Bit positions labelled as x are not implemented.

Address Register name BCD format tens nibble BCD format units nibble

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

02H seconds VL <seconds 00 to 59 coded in BCD> 03H minutes x <minutes 00 to 59 coded in BCD> 04H hours x x <hours 00 to 23 coded in BCD> 05H days x x <days 01 to 31 coded in BCD> 06H weekdays xxxxx <weekdays 0 to 6> 07H months/century C x x <months 01 to 12 coded in BCD> 08H years <years 00 to 99 coded in BCD> 09H minute alarm AE <minute alarm 00 to 59 coded in BCD> 0AH hour alarm AE x <hour alarm 00 to 23 coded in BCD> 0BH day alarm AE x <day alarm 01 to 31 coded in BCD> 0CH weekday alarm AE xxxx <weekday alarm 0 to 6>

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PCF8563

Real time clock/calendar

8.6.1 Control/status 1 register

Table 6: Control/status 1 (address 00H) bits description

Bit Symbol Value Description

7 TEST1 0 normal mode

1 EXT_CLK test mode 6 0 default value is logic 0 5 STOP 0 RTC source clock runs

1 all RTC divider chain ﬂip-ﬂops are asynchronously set to logic 0; the RTC clock is

stopped (CLKOUT at 32.768 kHz is still available) 4 0 default value is logic 0 3 TESTC 0 Power-on reset override facility is disabled; set to logic0 for normal operation

1 Power-on reset override may be enabled

2 to 0 0 default value is logic 0

8.6.2 Control/status 2 register

Bits TF and AF: When an alarm occurs, AF is set to 1. Similarly, at the end of a timer countdown, TF is set to 1. These bits maintain their value until overwritten by software. If both timer and alarm interrupts are required in the application, the source of the interrupt can be determined by reading these bits. To prevent one ﬂag being overwritten while clearing another a logic AND is performed during a write access.

Bits TIE and AIE: These bits activate or deactivate the generation of an interrupt when TF or AF is asserted, respectively. The interrupt is the logical OR of these two conditions when both AIE and TIE are set.

Table 7: Control/status 2 (address 01H) bits description

Bit Symbol Value Description

7 to 5 0 default value is logic 0 4 TI/TP 0

3 AF 0 (read) alarm ﬂag inactive

1 (read) alarm ﬂag active 0 (write) alarm ﬂag is cleared 1 (write) alarm ﬂag remains unchanged

2 TF 0 (read) timer ﬂag inactive

1 (read) timer ﬂag active 0 (write) timer ﬂag is cleared 1 (write) timer ﬂag remains unchanged

1 AIE 0 alarm interrupt disabled

1 alarm interrupt enabled

0 TIE 0 timer interrupt disabled

1 timer interrupt enabled

INT is active when TF is active (subject to the status of TIE)

INT pulses active according to Table 8 (subject to the status of TIE); note that if

AF and AIE are active then

INT will be permanently active

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Philips Semiconductors

PCF8563

Real time clock/calendar

Table 8: INT operation (bit TI/TP = 1)

Source clock (Hz) INT period (s)

[2]

n=1

1 1 1 1

⁄

8192

⁄

128

⁄

4096 64 1

⁄

[1] TF and INT become active simultaneously. [2] n = loaded countdown value. Timer stopped when n = 0.

[1]

n>1

⁄

4096

⁄

8.6.3 Time and date registers

Table 9: Seconds/VL (address 02H) bits description

Bit Symbol Value Description

7 VL 0 clock integrity is guaranteed

1 integrity of the clock information is no longer guaranteed

6 to 0 seconds 00 to 59 this register holds the current seconds coded in BCD format; example: seconds

Table 10: Minutes (address 03H) bits description

Bit Symbol Value Description

6 to 0 minutes 00 to 59 this register holds the current minutes coded in BCD format

Table 11: Hours (address 04H) bits description

Bit Symbol Value Description

5 to 0 hours 00 to 23 this register holds the current hours coded in BCD format

Table 12: Days (address 05H) bits description

Bit Symbol Value Description

5 to 0 days

[1] The PCF8563 compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly

divisible by 4, including the year00.

[1]

01 to 31 this register holds the current day coded in BCD format

Table 13: Weekdays (address 06H) bits description

Bit Symbol Value Description

[1]

2 to 0 weekdays

[1] These bits may be re-assigned by the user.

0 to 6 this register holds the current weekday coded in BCD format, see Table 14

Table 14: Weekday assignments

Day Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Sunday xxxxx000 Monday xxxxx001 Tuesday xxxxx010 Wednesday xxxxx011

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Philips Semiconductors

PCF8563

Real time clock/calendar

Table 14: Weekday assignments

Day Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Thursday xxxxx100 Friday xxxxx101 Saturday xxxxx110

Table 15: Months/century (address 07H) bits description

Bit Symbol Value Description

7 century

4 to 0 month 01 to 12 this register holds the current month coded in BCD format, see Table 16

[1] These bits may be re-assigned by the user.

[1]

0 indicates the century is 20xx 1 indicates the century is 19xx

Table 16: Month assignments

Month Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

January Cxx00001 February Cxx00010 March C x x 00011 April Cxx00100 May Cxx00101 June Cxx00110 July Cxx00111 August C x x 01000 September C x x 01001 October C x x 10000 November C x x 10001 December C x x 10010

this bit is toggled when the years register overﬂows from 99 to 00

…continued

Table 17: Years (address 08H) bits description

Bit Symbol Value Description

7 to 0 years 00 to 99 this register holds the current year coded in BCD format

8.6.4 Alarm registers

When one or more of these registers are loaded with a valid minute, hour, day or weekday and its corresponding bit Alarm Enable (AE) is logic 0, then that information will be compared with the current minute, hour, day and weekday. When all enabled comparisons ﬁrst match, the Alarm Flag (AF) is set. AF will remain set until cleared by software. Once AF has been cleared it will only be set again when the time increments to match the alarm condition once more. Alarm registers which have their bit AE at logic 1 will be ignored.

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Philips Semiconductors

PCF8563

Real time clock/calendar

Table 18: Minute alarm (address 09H) bits description

Bit Symbol Value Description

7 AE 0 minute alarm is enabled

1 minute alarm is disabled

6 to 0 alarm minutes 00 to 59 this register holds the minute alarm information coded in BCD format

Table 19: Hour alarm (address 0AH) bits description

Bit Symbol Value Description

7 AE 0 hour alarm is enabled

1 hour alarm is disabled

5 to 0 alarm hours 00 to 23 this register holds the hour alarm information coded in BCD format

Table 20: Day alarm (address 0BH) bits description

Bit Symbol Value Description

7 AE 0 day alarm is enabled

1 day alarm is disabled

5 to 0 alarm days 01 to 31 this register holds the day alarm information coded in BCD format

Table 21: Weekday alarm (address 0CH) bits description

Bit Symbol Value Description

7 AE 0 weekday alarm is enabled

1 weekday alarm is disabled

2 to 0 alarm

weekdays

0 to 6 this register holds the weekday alarm information coded in BCD format

8.6.5 Clock output control register

Table 22: CLKOUT control (address 0DH) bits description

Bit Symbol Value Description

7 FE 0 the CLKOUT output is inhibited and CLKOUT output is set to high-impedance

1 the CLKOUT output is activated

1 to 0 FD1 and

FD0

Table 23: FD1 and FD0: CLKOUT frequency selection

FD1 FD0 CLKOUT frequency

0 0 32.768 kHz 0 1 1024 Hz 1032Hz 111Hz

these bits control the frequency output at pin CLKOUT; see Table 23

8.6.6 Countdown timer

The timer register is an 8-bit binary countdown timer. It is enabled and disabled via the timer control register bit TE. The source clock for the timer is also selected by the timer control register. Other timer properties such as interrupt generation are controlled via control/status 2 register.

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Philips Semiconductors

For accurate read back of the countdown value, the I2C-bus clock (SCL) must be operating at a frequency of at least twice the selected timer clock.

Table 24: Timer control (address 0EH) bits description

Bit Symbol Value Description

7 TE 0 timer is disabled

1 timer is enabled

1 to 0 TD1 and

TD0

Table 25: TD1 and TD0: Timer frequency selection

TD1 TD0 TIMER Source clock frequency

0 0 4096 Hz 0164Hz 101Hz 11

timer source clock frequency select; these bits determine the source clock for the

countdown timer, see Table 25; when not in use, TD1 and TD0 should be set to

⁄60Hz for power saving

⁄60Hz

PCF8563

Real time clock/calendar

Table 26: Timer (address 0FH) bits description

Bit Symbol Value Description

7 to 0 timer 00 to FF

countdown value = n;

8.7 EXT_CLK test mode

A test mode is available which allows for on-board testing. In such a mode it is possible to set up test conditions and control the operation of the RTC.

The test mode is entered by setting bit TEST1 in control/status1 register. Then pin CLKOUT becomes an input. The test mode replaces the internal 64 Hz signal with the signal applied to pin CLKOUT. Every 64 positive edges applied to pin CLKOUT will then generate an increment of one second.

The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a minimum period of 1000 ns. The internal 64 Hz clock, now sourced from CLKOUT, is divided downto 1 Hz by a 26divide chain called a pre-scaler. The pre-scaler can be set into a known state by using bit STOP. When bit STOP is set, the pre-scaler is reset to 0 (STOP must be cleared before the pre-scaler can operate again).

From a STOP condition, the ﬁrst 1 second increment will take place after 32 positive edges on CLKOUT. Thereafter, every 64 positive edges will cause a 1 second increment.

CountdownPeriod

-------------------------------------------------------------- -

SourceClockFrequency

Remark: Entry into EXT_CLK test mode is not synchronized to the internal 64 Hz clock. When entering the test mode, no assumption as to the state of the pre-scaler can be made.

Operation example:

1. Set EXT_CLK test mode (control/status 1, bit TEST1 = 1)

2. Set STOP (control/status 1, bit STOP = 1)

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Philips Semiconductors

3. Clear STOP (control/status 1, bit STOP = 0)

4. Set time registers to desired value

5. Apply 32 clock pulses to CLKOUT

6. Read time registers to see the ﬁrst change

7. Apply 64 clock pulses to CLKOUT

8. Read time registers to see the second change.

Repeat 7 and 8 for additional increments.

8.8 Power-On Reset (POR) override

The POR duration is directly related to the crystal oscillator start-up time. Due to the long start-up times experienced by these types of circuits, a mechanism has been built in to disable the POR and hence speed up on-board test of the device. The setting of this mode requires that the I2C-bus pins, SDA and SCL, be toggled in a speciﬁc order as shown in Figure 7. All timings are required minimums.

Once the override mode has been entered, the device immediately stops being reset and normal operation may commence i.e. entry into the EXT_CLK test mode via I2C-bus access. The override mode may be cleared by writing a logic 0 to TESTC. TESTC must be set to logic 1 before re-entry into the override mode is possible. Setting TESTC to logic 0 during normal operation has no effect except to prevent entry into the POR override mode.

PCF8563

Real time clock/calendar

handbook, full pagewidth

SDA

SCL

8 ms

power up

Fig 7. POR override sequence.

500 ns 2000 ns

9. Characteristics of the I2C-bus

The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy.

9.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as a control signal (see Figure 8).

override active

MGM664

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Philips Semiconductors

PCF8563

Real time clock/calendar

SDA

SCL

Fig 8. Bit transfer.

9.2 Start and stop conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is deﬁned as the START condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is deﬁned as the STOP condition (P); see Figure 9.

SDA

SCL

Fig 9. Deﬁnition of start and stop conditions.

START condition

9.3 System conﬁguration

data line

stable;

data valid

change

of data

allowed

MBC621

STOP condition

SDA

SCL

MBC622

A device generating a message is a transmitter, a device receiving a message is the receiver. The device that controls the message is the master and the devices which are controlled by the master are the slaves (see Figure 10).

SDA SCL

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER /

RECEIVER

MBA605

Fig 10. System conﬁguration.

9.4 Acknowledge

The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH-level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related

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Philips Semiconductors

clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter.

The device that acknowledges must pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clockedout of the slave.In this event the transmitter must leave the data line HIGH to enable the master to generate a stop condition.

DATA OUTPUT

BY TRANSMITTER

DATA OUTPUT

BY RECEIVER

PCF8563

Real time clock/calendar

not acknowledge

acknowledge

SCL FROM

MASTER

START

condition

Fig 11. Acknowledgement on the I2C-bus.

9.5 I2C-bus protocol

9.5.1 Addressing

Before any data is transmitted on the I2C-bus, the device which should respond is addressed ﬁrst. The addressing is always carried out with the ﬁrst byte transmitted after the start procedure.

The PCF8563 acts as a slavereceiver or slave transmitter. Therefore the clocksignal SCL is only an input signal, but the data signal SDA is a bidirectional line.

The PCF8563 slave address is shown in Figure 12.

1 0 1 0 0 0 1 R/W

group 1

group 2

MCE189

9821

clock pulse for

acknowledgement

MBC602

Fig 12. Slave address.

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9.5.2 Clock/calendar read/write cycles

The I2C-bus conﬁguration for the different PCF8563 read and write cycles is shownin

Figure 13, Figure 14 and Figure 15. The word address is a 4-bit value that deﬁnes

which register is to be accessed next.The upper four bits of the word address are not used.

PCF8563

Real time clock/calendar

acknowledgement

from slave

S 0ASLAVE ADDRESS WORD ADDRESS A ADATA P

R/W

acknowledgement

Fig 13. Master transmits to slave receiver (write mode).

acknowledgement

from slave

S 0ASLAVE ADDRESS WORD ADDRESS A A

R/W

acknowledgement

from slave

SLAVE ADDRESS

at this moment master transmitter

becomes master receiver and

PCA8565 slave receiver

becomes slave transmitter

from slave

n bytes

memory word address

acknowledgement

from slave

R/W

acknowledgement

from slave

auto increment

MBD822

acknowledgement

DATA

n bytes

auto increment

memory word address

from master

no acknowledgement

from master

1DATA

last byte

MCE172

auto increment

memory word address

Fig 14. Master reads after setting word address (write word address; read data).

handbook, full pagewidth

acknowledgement

from slave

SLAVE ADDRESS DATA

R/W

acknowledgement

from master

A1DATA

n bytes last byte

auto increment

word address

no acknowledgement

from master

auto increment

word address

MGL665

Fig 15. Master reads slave immediately after ﬁrst byte (read mode).

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Philips Semiconductors

10. Limiting values

Table 27: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Min Max Unit

tot

amb

stg

PCF8563

Real time clock/calendar

supply voltage −0.5 +6.5 V supply current −50 +50 mA input voltage on pins SCL and SDA −0.5 +6.5 V input voltage on pin OSCI −0.5 V output voltage on pins CLOCKOUT

INT

and

−0.5 +6.5 V

DC input current at any input −10 +10 mA DC output current at any output −10 +10 mA total power dissipation - 300 mW ambient temperature −40 +85 °C storage temperature −65 +150 °C

+ 0.5 V

11. Static characteristics

Table 28: Static characteristics

VDD= 1.8 V to 5.5 V; VSS=0V; T speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Supplies

DD(clock)

supply voltage interface inactive;

supply voltage for clock data integrity

DD1

DD2

supply current 1 interface active

supply current 2 interfaceinactive(f

=−40°C to +85°C; f

amb

interface active; f

= 400 kHz

SCL

amb

SCL

CLKOUT disabled; T

amb

VDD= 5.0 V - 275 550 nA V

interfaceinactive(f CLKOUT disabled; T

amb

VDD= 5.0 V - 500 750 nA V

= 32.768 kHz; quartz Rs=40kΩ; CL= 8 pF; unless otherwise

osc

[1]

1.0 - 5.5 V

=25°C

[1]

1.8 - 5.5 V

=25°CV

low

- 5.5 V

= 400 kHz - - 800 µA = 100 kHz - - 200 µA

SCL

= 0 Hz);

[2]

=25°C

= 3.0 V - 250 500 nA = 2.0 V - 225 450 nA

SCL

= 0 Hz);

[2]

= −40 to +85 °C

= 3.0 V - 400 650 nA = 2.0 V - 400 600 nA

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PCF8563

Real time clock/calendar

Table 28: Static characteristics

VDD= 1.8 V to 5.5 V; VSS=0V; T

…continued

=−40°C to +85°C; f

amb

= 32.768 kHz; quartz Rs=40kΩ; CL= 8 pF; unless otherwise

osc

speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

DD3

supply current 3 interfaceinactive(f

SCL

= 0 Hz);

[2]

CLKOUT enabled at 32kHz;

=25°C

amb

VDD= 5.0 V - 825 1600 nA

= 3.0 V - 550 1000 nA

= 2.0 V - 425 800 nA

interfaceinactive(f

SCL

= 0 Hz);

[2]

CLKOUT enabled at 32kHz;

= −40 to +85 °C

amb

VDD= 5.0 V - 950 1700 nA

= 3.0 V - 650 1100 nA

= 2.0 V - 500 900 nA

Inputs

LOW-level input voltage V

HIGH-level input voltage 0.7V input leakage current VI=VDD or V input capacitance

−10 +1µA

[3]

--7pF

- 0.3V

-VDDV

Outputs

OL(SDA)

SDA LOW-level output

VOL= 0.4 V; VDD=5V −3- - mA

current

OL(INT)

INT LOW-level output

VOL= 0.4 V; VDD=5V −1- - mA

current

OL(CLKOUT)

CLKOUT LOW-level

VOL= 0.4 V; VDD=5V −1- - mA

output current

OH(CLKOUT)

CLKOUT HIGH-level

VOH= 4.6 V; VDD=5V 1 - - mA

output current

output leakage current VO=VDD or V

−10 +1µA

Voltage detector

low

low voltage detection T

=25°C - 0.9 1.0 V

amb

[1] For reliable oscillator start-up at power-up: V [2] Timer source clock =1⁄60Hz, level of pins SCL and SDA is VDD or VSS. [3] Tested on sample basis.

9397 750 12999

Product data Rev. 04 — 12 March 2004 17 of 30

DD(min)power-up=VDD(min)

+ 0.3 V.

Page 18

Philips Semiconductors

PCF8563

Real time clock/calendar

12. Dynamic characteristics

Table 29: Dynamic characteristics

VDD= 1.8 V to 5.5 V; VSS=0V; T speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Oscillator

INT

integrated load capacitance

∆f

osc/fosc

oscillator stability ∆VDD= 200 mV; T

Quartz crystal parameters (f = 32.768 kHz)

series resistance - - 40 kΩ parallel load capacitance - 10 - pF trimmer capacitance 5 - 25 pF

CLKOUT output

CLKOUT

C-bus timing characteristics

SCL

HD;STA

SU;STA

CLKOUT duty cycle

SCL clock frequency START condition hold time 0.6 - - µs set-up time for a repeated

START condition

LOW

HIGH

SU;DAT

HD;DAT

SU;STO

SCL LOW time 1.3 - - µs SCL HIGH time 0.6 - - µs SCL and SDA rise time - - 0.3 µs SCL and SDA fall time - - 0.3 µs capacitive bus line load - - 400 pF data set-up time 100 - - ns data hold time 0 - - ns set-up time for STOP

condition

tolerable spike width on bus

=−40°C to +85°C; f

amb

[2][3]

= 32.768 kHz; quartz Rs=40kΩ; CL= 8 pF; unless otherwise

osc

15 25 35 pF

=25°C- 2× 10

amb

[1]

-50-%

[4]

- - 400 kHz

-7

0.6 - - µs

--50ns

[1] Unspeciﬁed for f [2] All timing values are valid within the operating supply voltage at ambient temperature and referenced to VILand VIHwith an input voltage

swing of VSS to VDD.

[3] A detailed description of the I2C-bus speciﬁcation, with applications, is given in brochure

may be ordered using the code 9398 393 40011.

[4] I2C-bus access time between two STARTs or between a START and a STOP condition to this device must be less than one second.

9397 750 12999

Product data Rev. 04 — 12 March 2004 18 of 30

CLKOUT

= 32.768 kHz.

The I2C-bus and how to use it

. This brochure

Page 19

Philips Semiconductors

SDA

PCF8563

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BUF

SCL

SDA

MGA728

Fig 16. I2C-bus timing waveforms.

(µA)

0.8

0.6

0.4

handbook, halfpage

HD;STA

MGR888

LOW

SU;STA

HD;DAT

handbook, halfpage

(µA)

0.8

0.6

0.4

HIGH

SU;DAT

SU;STO

MGR889

0.2

02 6

=25°C; Timer = 1 minute. T

amb

VDD (V)

0.2

02 6

=25°C; Timer = 1 minute.

amb

VDD (V)

Fig 17. IDD as a function of VDD; CLKOUT disabled. Fig 18. IDD as a function of VDD; CLKOUT = 32 kHz.

9397 750 12999

Product data Rev. 04 — 12 March 2004 19 of 30

Page 20

Philips Semiconductors

PCF8563

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handbook, halfpage

(µA)

0.8

0.6

0.4

0.2

−40 0 40 120

MGR890

T (°C)

VDD= 3 V; Timer = 1 minute. T

handbook, halfpage

frequency

deviation

(ppm)

−2

−4

02 6

=25°C; normalized to VDD=3V.

amb

MGR891

VDD (V)

Fig 19. IDD as a function of T; CLKOUT = 32 kHz. Fig 20. Frequency deviation as a function of VDD.

13. Application information

handbook, full pagewidth

Fig 21. Application diagram.

1 F

CLOCK CALENDAR

OSCI

PCF8563

OSCO

SCL

SDA

SDA SCL

C-bus)

SDA

SCL

MASTER

TRANSMITTER/

RECEIVER

R: pull-up resistor

R =

MGM665

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Product data Rev. 04 — 12 March 2004 20 of 30

Page 21

Philips Semiconductors

13.1 Quartz frequency adjustment

13.1.1 Method 1: ﬁxed OSCI capacitor

By evaluating the average capacitance necessary for the application layout, a ﬁxed capacitor can be used. The frequency is best measured via the 32.768 kHz signal available after power-on at pin CLKOUT. The frequency tolerance depends on the quartz crystal tolerance, the capacitor tolerance and the device-to-device tolerance (on average ±5 × 10−6). Average deviations of ±5 minutes per year can be easily achieved.

13.1.2 Method 2: OSCI trimmer

Using the 32.768 kHz signal availableafter power-on at pin CLKOUT, fast setting of a trimmer is possible.

13.1.3 Method 3: OSCO output

Direct measurement of OSCO out (accounting for test probe capacitance).

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9397 750 12999

Product data Rev. 04 — 12 March 2004 21 of 30

Page 22

Philips Semiconductors

14. Package outline

PCF8563

Real time clock/calendar

DIP8: plastic dual in-line package; 8 leads (300 mil)

seating plane

pin 1 index

w M

SOT97-1

(e )

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

min.

max.

050G01 MO-001 SC-504-8

1.73

1.14

0.068

0.021

0.045

0.015

IEC JEDEC JEITA

OUTLINE

VERSION

SOT97-1

max.

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

0.53

0.38

0 5 10 mm

scale

1.07

0.89

0.042

0.035

0.36

0.23

0.014

0.009

REFERENCES

(1) (1)

cD E e M

9.8

9.2

0.39

0.36

6.48

6.20

0.26

0.24

3.60

3.05

0.14

0.12

8.25

7.80

0.32

0.31

EUROPEAN

PROJECTION

10.0

0.39

0.33

8.3

max.

0.2542.54 7.62

1.154.2 0.51 3.2

0.010.1 0.3

0.0450.17 0.02 0.13

ISSUE DATE

99-12-27 03-02-13

(1)

Fig 22. Package outline SOT97-1.

9397 750 12999

Product data Rev. 04 — 12 March 2004 22 of 30

Page 23

Philips Semiconductors

PCF8563

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SO8: plastic small outline package; 8 leads; body width 3.9 mm

pin 1 index

w M

SOT96-1

detail X

v M

(A )

0 2.5 5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

OUTLINE VERSION

SOT96-1

max.

1.75

0.069

A1A2A

0.25

1.45

0.10

1.25

0.010

0.057

0.004

0.049

IEC JEDEC JEITA

076E03 MS-012

3bp

0.25

0.01

0.49

0.36

0.019

0.014

0.0100

0.0075

UNIT

inches

Notes

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

(1)E(2)

0.25

5.0

0.19

4.8

0.20

0.19

REFERENCES

eHELLpQZywv θ

4.0

3.8

0.16

0.15

1.27

0.05

6.2

5.8

0.244

0.228

1.05

1.0

0.4

0.039

0.016

0.7

0.6

0.028

0.024

0.25 0.10.25

0.010.010.041 0.004

EUROPEAN

PROJECTION

(1)

0.7

0.3

0.028

0.012

ISSUE DATE

99-12-27 03-02-18

Fig 23. Package outline SOT96-1.

9397 750 12999

Product data Rev. 04 — 12 March 2004 23 of 30

Page 24

Philips Semiconductors

PCF8563

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TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm

pin 1 index

w M

detail X

SOT505-1

v M

(A3)

2.5 5 mm0

scale

DIMENSIONS (mm are the original dimensions)

UNIT

max.

1.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE

VERSION

SOT505-1

0.15

0.05

A2A3b

0.95

0.25

0.80

IEC JEDEC JEITA

0.45

0.25

ceD

0.28

0.15

REFERENCES

(1)E(2)

3.1

2.9

3.1

2.9

0.65

5.1

4.7

0.7

0.4

wyv

0.1 0.10.10.94

EUROPEAN

PROJECTION

(1)

0.70

0.35

ISSUE DATE

6° 0°

99-04-09 03-02-18

Fig 24. Package outline SOT505-1.

9397 750 12999

Product data Rev. 04 — 12 March 2004 24 of 30

Page 25

Philips Semiconductors

15. Soldering

15.1 Introduction

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our

Packages

There is no soldering method that is ideal for all IC packages.Wavesoldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for ﬁne pitch SMDs. In these situations reﬂow soldering is recommended. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing.

15.2 Through-hole mount packages

15.2.1 Soldering by dipping or by solder wave

Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

PCF8563

Real time clock/calendar

Data Handbook IC26; Integrated Circuit

(document order number 9398 652 90011).

The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the

plastic body must not exceed the speciﬁed maximum storage temperature (T If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

15.2.2 Manual soldering

Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.

15.3 Surface mount packages

15.3.1 Reﬂow soldering

Reﬂow soldering requires solder paste (a suspension of ﬁne solder particles, ﬂux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.

Several methods exist for reﬂowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.

stg(max)

Typical reﬂow peak temperatures range from 215 to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:

• below 225 °C (SnPb process) or below 245 °C (Pb-free process)

– for all the BGA and SSOP-T packages

9397 750 12999

Product data Rev. 04 — 12 March 2004 25 of 30

Page 26

Philips Semiconductors

• below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with

Moisture sensitivity precautions, as indicated on packing, must be respected at all times.

15.3.2 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.

To overcome these problems the double-wave soldering method was speciﬁcally developed.

If wave soldering is used the following conditions must be observed for optimal results:

PCF8563

Real time clock/calendar

– for packages with a thickness ≥ 2.5 mm – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called

thick/large packages.

a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.

• Use a double-wave soldering method comprising a turbulent wave with high

upward pressure followed by a smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be

parallel to the transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the

transport direction of the printed-circuit board.

The footprint must incorporate solder thieves at the downstream end.

• For packages with leads on four sides, the footprint must be placed at a 45° angle

to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.

During placement and before soldering, the package must be ﬁxed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.

Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

A mildly-activated ﬂux will eliminate the need for removal of corrosive residues in most applications.

15.3.3 Manual soldering

Fix the component by ﬁrst soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the ﬂat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.

When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.

9397 750 12999

Product data Rev. 04 — 12 March 2004 26 of 30

Page 27

Philips Semiconductors

15.4 Package related soldering information

Table 30: Suitability of IC packages for wave, reﬂow and dipping soldering methods

Mounting Package

Through-hole mount

Through-holesurface mount

Surface mount BGA, LBGA, LFBGA,

[1]

Soldering method Wave Reﬂow

DBS, DIP, HDIP, RDBS,

suitable

[3]

SDIP, SIL

[4]

PMFP

not suitable not

not suitable suitable −

[5]

SQFP, SSOP-T

TFBGA, VFBGA DHVQFN, HBCC, HBGA,

not suitable

[6]

HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS

[7]

PLCC

, SO, SOJ suitable suitable − LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO,

not recommended

VSSOP

PCF8563

Real time clock/calendar

[2]

Dipping

− suitable

−

suitable

suitable −

[7][8]

suitable −

[9]

suitable −

[1] For more detailed information on the BGA packages refer to the

(AN01026); order a copy from your Philips Semiconductors sales ofﬁce.

[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the

maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the

Circuit Packages; Section: Packing Methods

[3] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the

printed-circuit board. [4] Hot bar soldering or manual soldering is suitable for PMFP packages. [5] These transparent plastic packages are extremely sensitive to reﬂow soldering conditions and must

on no account be processed through more than one soldering cycle or subjected to infrared reﬂow

soldering with peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reﬂow

oven. The package body peak temperature must be kept as low as possible. [6] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom

side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with

the heatsink on the top side, the solder might be deposited on the heatsink surface. [7] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave

direction. The package footprint must incorporate solder thieves downstream and at the side corners. [8] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it

is deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.65mm. [9] Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than

0.65 mm; it is deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

(LF)BGA Application Note

Data Handbook IC26; Integrated

9397 750 12999

Product data Rev. 04 — 12 March 2004 27 of 30

Page 28

Philips Semiconductors

16. Revision history

Table 31: Revision history

Rev Date CPCN Description

04 20040312 - Product data (9397 750 12999)

Modiﬁcations:

• Corrections in the unit column of Table 1.

03 20030414 - Product data (9397 750 11158) 02 19990416 - Product data (9397 750 04855)

PCF8563

Real time clock/calendar

9397 750 12999

Product data Rev. 04 — 12 March 2004 28 of 30

Page 29

Philips Semiconductors

17. Data sheet status

PCF8563

Real time clock/calendar

Level Data sheet status

I Objective data Development This data sheet contains data from the objective speciﬁcation for product development. Philips

II Preliminary data Qualiﬁcation This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

III Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

[1]

Product status

18. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.

[2][3]

Deﬁnition

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to improve the design and supply the best possible product.

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makesno representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speciﬁed.

20. Licenses

19. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors

Purchase of Philips I2C components

Purchase of Philips I under the Philips’ I

C system provided the system conforms to the I2C speciﬁcation deﬁned by Philips. This speciﬁcation can be ordered using the code 9398 393 40011.

C components conveys a license

C patent to use the components in the

Contact information

For additional information, please visit http://www.semiconductors.philips.com. For sales ofﬁce addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825

9397 750 12999

Product data Rev. 04 — 12 March 2004 29 of 30

Page 30

Philips Semiconductors

Contents

PCF8563

Real time clock/calendar

1 General description . . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Functional description . . . . . . . . . . . . . . . . . . . 4

8.1 Alarm function modes. . . . . . . . . . . . . . . . . . . . 5

8.2 Timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.3 Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.4 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.5 Voltage-low detector . . . . . . . . . . . . . . . . . . . . . 5

8.6 Register organization . . . . . . . . . . . . . . . . . . . . 6

8.6.1 Control/status 1 register . . . . . . . . . . . . . . . . . . 7

8.6.2 Control/status 2 register . . . . . . . . . . . . . . . . . . 7

8.6.3 Time and date registers . . . . . . . . . . . . . . . . . . 8

8.6.4 Alarm registers . . . . . . . . . . . . . . . . . . . . . . . . . 9

8.6.5 Clock output control register. . . . . . . . . . . . . . 10

8.6.6 Countdown timer. . . . . . . . . . . . . . . . . . . . . . . 10

8.7 EXT_CLK test mode. . . . . . . . . . . . . . . . . . . . 11

8.8 Power-On Reset (POR) override . . . . . . . . . . 12

9 Characteristics of the I

C-bus. . . . . . . . . . . . . 12

9.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

9.2 Start and stop conditions . . . . . . . . . . . . . . . . 13

9.3 System conﬁguration . . . . . . . . . . . . . . . . . . . 13

9.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 13

9.5 I

C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . 14

9.5.1 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

9.5.2 Clock/calendar read/write cycles . . . . . . . . . . 15

10 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 16

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 16

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 18

13 Application information. . . . . . . . . . . . . . . . . . 20

13.1 Quartz frequency adjustment . . . . . . . . . . . . . 21

13.1.1 Method 1: ﬁxed OSCI capacitor . . . . . . . . . . . 21

13.1.2 Method 2: OSCI trimmer. . . . . . . . . . . . . . . . . 21

13.1.3 Method 3: OSCO output . . . . . . . . . . . . . . . . . 21

14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 22

15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

15.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 25

15.2 Through-hole mount packages. . . . . . . . . . . . 25

15.2.1 Soldering by dipping or by solder wave . . . . . 25

15.2.2 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 25

15.3 Surface mount packages . . . . . . . . . . . . . . . . 25

15.3.1 Reﬂow soldering. . . . . . . . . . . . . . . . . . . . . . . 25

15.3.2 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 26

15.3.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 26

15.4 Package related soldering information. . . . . . 27

16 Revision history . . . . . . . . . . . . . . . . . . . . . . . 28

17 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 29

18 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

20 Licenses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Date of release: 12 March 2004 Document order number: 9397 750 12999

Page 31

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Datasheets for electronics components.

NXP PCF 8563 T/F4 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1. General description

2. Features

3. Applications

4. Quick reference data

5. Ordering information

6. Block diagram

7. Pinning information

7.1 Pinning

7.2 Pin description

8. Functional description

8.1 Alarm function modes

8.2 Timer

8.3 Clock output

8.4 Reset

8.5 Voltage-low detector

8.6 Register organization

8.7 EXT_CLK test mode

8.8 Power-On Reset (POR) override

9. Characteristics of the I2C-bus

9.1 Bit transfer

9.2 Start and stop conditions

9.4 Acknowledge

9.5 I2C-bus protocol

10. Limiting values

11. Static characteristics

12. Dynamic characteristics

13. Application information

13.1 Quartz frequency adjustment

14. Package outline

15. Soldering

15.1 Introduction

15.2 Through-hole mount packages

15.3 Surface mount packages

15.4 Package related soldering information

16. Revision history

17. Data sheet status

20. Licenses

19. Disclaimers