8-bit I2C-bus LED driver with programmable blink rates
Rev. 08 — 31 July 2008Product data sheet
1.General description
The PCA9551 LED blinker blinks LEDs in I2C-bus and SMBus applications where it is
necessary to limit bus traffic or free up the I2C-bus master's (MCU, MPU, DSP, chip set,
etc.) timer. The uniqueness of this device is the internal oscillator with two programmable
blink rates. To blink LEDs using normal I/O expanders like the PCF8574 or PCA9554, the
bus master must send repeated commands to turn the LED on and off. This greatly
increases the amount of traffic on the I2C-bus and uses up one of the master's timers.
The PCA9551 LED blinker instead requires only the initial set-up command to program
BLINK RATE 1 and BLINK RATE 2 (i.e., the frequency and duty cycle) for each individual
output. From then on, only one command from the bus master is required to turn each
individual open-drain output on, off, or to cycle at BLINK RATE 1 or BLINK RATE 2.
Maximum output sink current is 25 mA per bit and 100 mA per package.
Any bits not used for controlling the LEDs can be used for General Purpose parallel
Input/Output (GPIO) expansion.
2.Features
The active LOW hardware reset pin (RESET) and Power-On Reset (POR) initializes the
registers to their default state, all zeroes, causing the bits to be set HIGH (LED off).
Three hardwareaddress pins on the PCA9551 allow eight devicesto operateon the same
bus.
The newer Fast-mode Plus PCA9634 8-bit LED controller offers an individual PWM
dimming control for each channel for better color mixing capabilities with a global PWM for
dimming or blinking all channels at the same time. There are 126 possible address
combinations and the maximum output sink current is 25 mA per bit and 200 mA per
package.
n 8 LED drivers (on, off, flashing at a programmable rate)
n 2 selectable, fully programmable blink rates (frequency and duty cycle) between
0.148 Hz and 38 Hz (6.74 seconds and 0.026 seconds)
n Input/outputs not used as LED drivers can be used as regular GPIOs
n Internal oscillator requires no external components
n I2C-bus interface logic compatible with SMBus
n Internal power-on reset
n Noise filter on SCL/SDA inputs
n Active LOW reset input
n 8 open-drain outputs directly drive LEDs to 25 mA
n Edge rate control on outputs
NXP Semiconductors
PCA9551
8-bit I2C-bus LED driver with programmable blink rates
n No glitch on power-up
n Supports hot insertion
n Low standby current
n Operating power supply voltage range of 2.3 V to 5.5 V
n 0 Hz to 400 kHz clock frequency
n ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Packages offered: SO16, TSSOP16, HVQFN16
3.Ordering information
Table 1.Ordering information
T
=−40°C to +85°C.
amb
Type numberTopside
mark
PCA9551DPCA9551DSO16plastic small outline package; 16 leads; body width 3.9 mmSOT109-1
PCA9551PWPCA9551TSSOP16plastic thin shrink small outline package; 16 leads;
PCA9551BS9551HVQFN16plastic thermal enhanced very thin quad flat package;
8-bit I2C-bus LED driver with programmable blink rates
Table 2.Pin description
SymbolPinDescription
SO16, TSSOP16HVQFN16
LED71210LED driver 7
RESET1311reset input (active LOW)
SCL1412serial clock line
SDA1513serial data line
V
DD
[1] HVQFN16 package die supply ground is connected to both VSS pin and exposed center pad. VSS pin must
1614supply voltage
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
PCB in the thermal pad region.
6.Functional description
Refer to Figure 1 “Block diagram of PCA9551”.
6.1Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9551 is shown in Figure 5. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
…continued
slave address
1100A2 A1 A0 R/W
fixed
Fig 5.PCA9551 slave address
hardware
selectable
002aac505
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2Control register
Followingthe successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9551, which will be stored in the Control register.
000AI0B2 B1 B0
Auto-Increment flag
Reset state: 00h
Fig 6.Control register
register address
002aac506
The lowest 3 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment (AI) flag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When the Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the
sequence must start by reading a register different from ‘0' (B2 B1 B0 ≠ 000).
Only the 3 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
Remark: The default value ‘X’ is determined by the externally applied logic level (normally
logic 1) when used for directly driving LED with pull-up to VDD.
6.3.2PSC0 - Frequency Prescaler 0
PSC0 is used to program the period of the PWM output.
The period of BLINK0 = (PSC0 + 1) / 38.
Remark: Prescaler calculation is different between the PCA9551 and other PCA955x
LED blinkers.A divider ratio of 38 instead of 44 is used. This different divider ratio causes
the blinking frequency to be 13 % (1 − 38 / 44) lower when the same 8-bit word is used.
The programmed value of FrequencyPrescaler 0 must be adjusted to compensate for this
difference in applications where the PCA9551 is used in conjunction with other PCA955x
LED blinkers and the observed blinking frequencies need to be the same.
The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED off)
when the count is less than the value in PWM0 and HIGH when it is greater. If PWM0 is
programmed with 00h, then the PWM0 output is always LOW.
8-bit I2C-bus LED driver with programmable blink rates
PWM0
[5]
PWM0
[4]
PWM0
[3]
PWM0
[2]
PWM0
[1]
PWM0
[0]
6.3.4PSC1 - Frequency Prescaler 1
PSC1 is used to program the period of the PWM output.
The period of BLINK1 = (PSC1 + 1) / 38.
Remark: Prescaler calculation is different between the PCA9551 and other PCA955x
LED blinkers.A divider ratio of 38 instead of 44 is used. This different divider ratio causes
the blinking frequency to be 13 % (1 − 38 / 44) lower when the same 8-bit word is used.
The programmed value of FrequencyPrescaler 1 must be adjusted to compensate for this
difference in applications where the PCA9551 is used in conjunction with other PCA955x
LED blinkers and the observed blinking frequencies need to be the same.
Table 7.PSC1 - Frequency Prescaler 1 register description
The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED off)
when the count is less than the value in PWM1 and HIGH when it is greater. If PWM1 is
programmed with 00h, then the PWM1 output is always LOW (LED off).
LED pins not used to control LEDs can be used as general purpose I/Os (GPIOs).
For use as input, set LEDn to high-impedance (01) and then read the pin state via the
Input register.
For use as output, connect external pull-up resistor to the pin and size it according to the
DC recommended operating characteristics. LEDn output pin is HIGH when the output is
programmed as high-impedance, and LOW when the output is programmed LOW through
the ‘LED selector’ register. The output can be pulse-width controlled when PWM0 or
PWM1 are used.
6.5Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9551 in
a reset condition until VDDhas reached V
. At that point, the reset condition is released
POR
and the PCA9551 registers are initialized to their default states, all the outputs in the
OFF state. Thereafter, VDD must be lowered below 0.2 V to reset the device.
6.6External RESET
A reset can be accomplished by holding the RESET pin LOW for a minimum of t
PCA9551 registers and I2C-bus state machine will be held in their default states until the
RESET input is once again HIGH.
w(rst)
. The
This input requires a pull-up resistor to VDD if no active connection is used.
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
7.1Bit transfer
One data bit is transferredduring each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 7).
SDA
SCL
PCA9551
8-bit I2C-bus LED driver with programmable blink rates
Fig 7.Bit transfer
7.1.1START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 8).
SDA
SCL
S
START condition
Fig 8.Definition of START and STOP conditions
7.2System configuration
data line
stable;
data valid
change
of data
allowed
mba607
SDA
SCL
P
STOP condition
mba608
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 9).
8-bit I2C-bus LED driver with programmable blink rates
MASTER
TRANSMITTER/
RECEIVER
Fig 9.System configuration
7.3Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slavereceiver which is addressed must generate an acknowledgeafter the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
8-bit I2C-bus LED driver with programmable blink rates
8.Application design-in information
PCA9551
5 V
2
C-BUS/SMBus
I
MASTER
SDA
SCL
10 kΩ
10 kΩ10 kΩ
V
DD
PCA9551
SDA
SCL
RESET
A2
A1
A0
V
SS
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
002aac510
5 V
LED0 to LED5 are used as LED drivers.
LED6 and LED7 are used as regular GPIOs.
Fig 14. Typical application
8.1Minimizing IDD when the I/Os are used to control LEDs
GPIOs
When the I/Os are used to control LEDs, they are normally connected to VDD through a
resistor as shown in Figure 14. Since the LED acts as a diode, when the LED is off the
I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes
lower than VDD and is specified as ∆IDD in Table 12 “Static characteristics”.
Designs needing to minimize current consumption, such as battery power applications,
should consider maintaining the I/O pins greater than or equal to VDDwhen the LED is off.
Figure 15 shows a high value resistor in parallel with the LED. Figure 16 shows VDD less
than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O V
at or above VDD and prevents additional supply current consumption when the LED is off.
The following example will show how to set LED0 to LED3 on. It will then set LED4 and
LED5 to blink at 1 Hz at a 50 % duty cycle. LED6 and LED7 will be set to blink at 4 Hz and
at a 25 % duty cycle.
Table 10.Programming PCA9551
Program sequenceI2C-bus
STARTS
PCA9551 address with A0 to A2 = LOWC0h
PSC0 subaddress + Auto-Increment11h
Set prescaler PSC0 to achieve a period of 1 second:
Blink period1
PSC0 = 37
Set PWM0 duty cycle to 50 %:
256 PWM0–
--------------------------------
PWM0 = 128
Set prescaler PSC1 to achieve a period of 0.25 seconds:
Blink period0.25
PSC1 = 9
Set PWM1 output duty cycle to 25 %:
256 PWM1–
--------------------------------
PWM1 = 192
Set LED0 to LED3 on00h
Set LED4 and LED5 to PWM0, and LED6 or LED7 to PWM1FAh
STOPP
256
256
PSC0 1+
==
----------------------- -
38
0.5=
==
0.25=
PSC1 1+
----------------------- -
PCA9551
8-bit I2C-bus LED driver with programmable blink rates
25h
80h
09h
38
C0h
9.Limiting values
Table 11.Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
supply voltage−0.5+6.0V
voltage on an input/output pinVSS− 0.55.5V
output current on pin LEDn-±25mA
ground supply current-100mA
total power dissipation-400mW
storage temperature−65+150°C
ambient temperatureoperating−40+85°C
NXP Semiconductors
8-bit I2C-bus LED driver with programmable blink rates
[1] Typical limits at VDD= 3.3 V, T
[2] VDD must be lowered to 0.2 V in order to reset part.
[3] Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 100 mA.
8-bit I2C-bus LED driver with programmable blink rates
11. Dynamic characteristics
Table 13.Dynamic characteristics
SymbolParameterConditionsStandard-mode
f
SCL
t
BUF
SCL clock frequency01000400kHz
bus free time between a STOP and
START condition
t
HD;STA
t
SU;STA
hold time (repeated) START condition4.0-0.6-µs
set-up time for a repeated START
condition
t
SU;STO
t
HD;DAT
t
VD;ACK
t
VD;DAT
t
SU;DAT
t
LOW
t
HIGH
t
r
t
f
t
SP
set-up time for STOP condition4.0-0.6-µs
data hold time0-0-ns
data valid acknowledge time
data valid timeLOW-level
HIGH-level
[1]
[2]
[2]
data set-up time250-100-ns
LOW period of the SCL clock4.7-1.3-µs
HIGH period of the SCL clock4.0-0.6-µs
rise time of both SDA and SCL signals-100020 + 0.1C
fall time of both SDA and SCL signals-30020 + 0.1C
pulse width of spikes that must be
suppressed by the input filter
Port timing
t
v(Q)
t
su(D)
t
h(D)
data output valid time-200-200ns
data input set-up time100-100-ns
data input hold time1-1-µs
Reset timing
t
w(rst)
t
rec(rst)
t
rst
reset pulse width8-8-ns
reset recovery time0-0-ns
reset time
[4][5]
2
I
C-bus
MinMaxMinMax
4.7-1.3-µs
4.7-0.6-µs
-600-600ns
-600-600ns
-1500-600ns
-50-50ns
400-400-ns
PCA9551
Fast-mode I2C-busUnit
[3]
300ns
b
[3]
300ns
b
[1] t
[2] t
[3] Cb= total capacitance of one bus line in pF.
[4] Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions.
[5] Upon reset, the full delay will be the sum of t
8-bit I2C-bus LED driver with programmable blink rates
protocol
SCL
SDA
Fig 21. I2C-bus timing diagram
12. Test information
condition
t
SU;STA
t
BUF
START
(S)
t
HD;STA
bit 7
MSB
(A7)
t
LOWtHIGH
t
r
1
t
f
t
SU;DAT
Rise and fall times refer to VIL and VIH.
V
PULSE
GENERATOR
I
bit 6
(A6)
/f
SCL
t
V
DD
open
V
SS
condition
VD;ACK
STOP
(P)
t
SU;STO
002aab175
acknowledge
bit 0
(R/W)
t
HD;DAT
V
DD
V
DUT
R
T
O
t
VD;DAT
C
L
50 pF
(A)
R
L
500 Ω
002aab880
RL = load resistor for LEDn. RL for SDA and SCL > 1kΩ (3 mA or less current).
CL = load capacitance includes jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generators.
Inputs and outputs are protected against electrostatic discharge in normal handling.
However, to be completely safe you must take normal precautions appropriate to handling
integrated circuits.
15. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note
soldering description”
15.1Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
.
PCA9551
8-bit I2C-bus LED driver with programmable blink rates
AN10365 “Surface mount reflow
15.2Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• Process issues, such as application of adhesive and flux, clinching of leads, board
• Solder bath specifications, including temperature and impurities
15.4Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versusSnPb soldering; note that a lead-free reflow process usually leads to
• Solder paste printing issues including smearing, release, and adjusting the process
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
PCA9551
8-bit I2C-bus LED driver with programmable blink rates
transport, the solder wave parameters, and the time during which components are
exposed to the wave
higher minimum peak temperatures (see Figure 26) than a SnPb process, thus
reducing the process window
window for a mix of large and small components on one board
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough forthe solder to makereliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 14 and 15
Table 14.SnPb eutectic process (from J-STD-020C)
Package thickness (mm)Package reflow temperature (°C)
Volume (mm3)
< 350≥ 350
< 2.5235220
≥ 2.5220220
Table 15.Lead-free process (from J-STD-020C)
Package thickness (mm)Package reflow temperature (°C)
Volume (mm3)
< 350350 to 2000> 2000
< 1.6260260260
1.6 to 2.5260250245
> 2.5250245245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 26.
Fig 26. Temperature profiles for large and small components
8-bit I2C-bus LED driver with programmable blink rates
maximum peak temperature
temperature
MSL: Moisture Sensitivity Level
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
PCA9551
peak
temperature
time
001aac844
For further information on temperature profiles, refer to Application Note
“Surface mount reflow soldering description”
16. Abbreviations
Table 16.Abbreviations
AcronymDescription
CDMCharged-Device Model
DSPDigital Signal Processor
DUTDevice Under Test
ESDElectroStatic Discharge
GPIOGeneral Purpose Input/Output
HBMHuman Body Model
2
C-busInter-Integrated Circuit bus
I
I/OInput/Output
ICIntegrated Circuit
LEDLight Emitting Diode
MCUMicroController Unit
MMMachine Model
MPUMicroProcessor Unit
PORPower-On Reset
PWMPulse Width Modulation; Pulse Width Modulator
RCResistor-Capacitor network
SMBusSystem Management Bus
8-bit I2C-bus LED driver with programmable blink rates
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Objective [short] data sheetDevelopmentThis document contains data from the objective specification for product development.
Preliminary [short] data sheet QualificationThis document contains data from the preliminary specification.
Product [short] data sheetProductionThis document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product statusof device(s) described inthis document mayhave changedsince this documentwas published and may differin case of multiple devices.The latest productstatus
information is available on the Internet at URL
[1][2]
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