NXP PCA9538PW Datasheet

DB, DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

9

A0 A1

RESET

P0 P1 P2 P3

GND

V

CC

SDA SCL INT P7 P6 P5 P4

RGV PACKAGE

(TOP VIEW)

16

6 8

2

10

P7

P5

V

CC

4

3

1

75

12 11

9

131415

SDA

A0

A1

P6

INT

SCL

P3

GND

P4

RESET

P0 P1 P2

RGT PACKAGE

(TOP VIEW)

16

6 8

2

10

P7

P5

V

CC

4

3

1

75

12 11

9

131415

SDA

A0

A1

P6

INT

SCL

P3

GND

P4

RESET

P0 P1

P2

Product Folder

Sample & Buy

Technical Documents

Tools & Software

Support & Community

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

PCA9538 Remote 8-Bit I2C AND SMBus Low-power I/O Expander With Interrupt Output,

Reset, and Configuration Registers

1 Features 2 Description

1

• Low Standby Current Consumption of 1 μA Max

• I2C to Parallel Port Expander

• Open-Drain Active-Low Interrupt Output

• Active-Low Reset Input

• Operating Power-Supply Voltage Range of 2.3 V to 5.5 V

• 5-V Tolerant I/O Ports

• 400-kHz Fast I2C Bus

• Two Hardware Address Pins Allow up to Four Devices on the I2C/SMBus

• Input/Output Configuration Register

• Polarity Inversion Register

• Power-Up With All Channels Configured as Inputs

• No Glitch on Power Up

• Noise Filter on SCL/SDA Inputs

• Latched Outputs With High-Current Drive Maximum Capability for Directly Driving LEDs

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101)

This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V V operation. It provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL), serial data (SDA)].

The PCA9538 consists of one 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active high or active low) registers. At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.

The system master can reset the PCA9538 in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without powering down the part.

The PCA9538 open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.

CC

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

SSOP (16) 6.20 mm × 5.30 mm

TCA6424

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

TVSOP (16) 3.60 mm × 4.40 mm SOIC (16) 10.30 mm 7.50 mm TSSOP (16) 5.00 mm × 4.40 mm

(1)

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

www.ti.com

3 Revision History

Changes from Revision E (September 2008) to Revision F Page

• Added RESET Errata section............................................................................................................................................... 16

• Added Interrupt Errata section ............................................................................................................................................. 17

• Power-On Reset Errata section............................................................................................................................................ 26

Product Folder Links: PCA9538

DB, DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

9

A0 A1

RESET

P0 P1 P2 P3

GND

V

CC

SDA SCL INT P7 P6 P5 P4

RGV PACKAGE

(TOP VIEW)

16

6 8

2

10

P7

P5

V

CC

4

3

1

75

12 11

9

131415

SDA

A0

A1

P6

INT

SCL

P3

GND

P4

RESET

P0 P1 P2

RGT PACKAGE

(TOP VIEW)

16

6 8

2

10

P7

P5

V

CC

4

3

1

75

12 11

9

131415

SDA

A0

A1

P6

INT

SCL

P3

GND

P4

RESET

P0 P1

P2

PCA9538

www.ti.com

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

4 Description (Continued)

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9538 can remain a simple slave device.

The device outputs (latched) have high-current drive capability for directly driving LEDs. It has low current consumption.

Two hardware pins (A0 and A1) are used to program and vary the fixed I2C address and allow up to four devices to share the same I2C bus or SMBus.

5 Pin Configuration and Functions

NAME

A0 1 15 Address input. Connect directly to VCCor ground. A1 2 16 Address input. Connect directly to VCCor ground.

RESET 3 1

P0 4 2 P-port input/output. Push-pull design structure. P1 5 3 P-port input/output. Push-pull design structure. P2 6 4 P-port input/output. Push-pull design structure. P3 7 5 P-port input/output. Push-pull design structure.

GND 8 6 Ground

P4 9 7 P-port input/output. Push-pull design structure. P5 10 8 P-port input/output. Push-pull design structure. P6 11 9 P-port input/output. Push-pull design structure. P7 12 10 P-port input/output. Push-pull design structure.

INT 13 11 Interrupt output. Connect to VCCthrough a pullup resistor.

SCL 14 12 Serial clock bus. Connect to VCCthrough a pullup resistor. SDA 15 13 Serial data bus. Connect to VCCthrough a pullup resistor.

V

CC

Pin Functions

NO.

QSOP (DBQ),

SSOP (DB),

TSSOP (PW),

OR

TVSOP (DGV)

16 14 Supply voltage

QFN (RGT) OR

QFN (RGV)

Product Folder Links: PCA9538

Active-low reset input. Connect to VCCthrough a pullup resistor if no active connection is used.

DESCRIPTION

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

6 Specifications

www.ti.com

6.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

CC

V

I

V

O

I

IK

I

OK

I

IOK

I

OL

I

OH

I

CC

θ

JA

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD 51-7.

Supply voltage range –0.5 6 V Input voltage range Output voltage range

(2)

–0.5 6 V

–0.5 6 V Input clamp current VI< 0 –20 mA Output clamp current VO< 0 –20 mA Input/output clamp current VO< 0 or VO> V Continuous output low current VO= 0 to V Continuous output high current VO= 0 to V

CC CC

CC

±20 mA

50 mA

–50 mA Continuous current through GND –250 Continuous current through V

CC

160

DB package 82 DBQ package 90 DGV package 86

Package thermal impedance

(3)

DW package 46 °C/W PW package 88 RGT package TBD RGV package TBD

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

mA

6.2 Handling Ratings

MIN MAX UNIT

T

stg

V

Storage temperature range –65 150 °C

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

(1)

Electrostatic discharge V

(ESD)

pins Charged device model (CDM), per JEDEC specification

JESD22-C101, all pins

(2)

0 2000

0 1000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

CC

V

IH

V

IL

I

OH

I

OL

T

A

Supply voltage 2.3 5.5 V

High-level input voltage V

Low-level input voltage V

SCL, SDA 0.7 × V A0, A1, RESET, P7–P0 2 5.5 SCL, SDA –0.5 0.3 × V A0, A1, RESET, P7–P0 –0.5 0.8

CC

High-level output current P7–P0 –10 mA Low-level output current P7–P0 25 mA Operating free-air temperature –40 85 °C

5.5

CC

Product Folder Links: PCA9538

PCA9538

www.ti.com

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

6.4 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

V

Input diode clamp voltage II= –18 mA 2.3 V to 5.5 V –1.2 V

IK

V

Power-on reset voltage VI= VCCor GND, IO= 0 V

POR

CC

POR

MIN TYP

2.3 V 1.8 3 V 2.6

4.5 V 4.1

4.75 V 4.1

2.3 V 1.7 3 V 2.5

4.5 V 4

V

P-port high-level output voltage

OH

IOH= –8 mA

(2)

IOH= –10 mA

4.75 V 4

SDA VOL= 0.4 V 2.3 V to 5.5 V 3 8

2.3 V 8 10

VOL= 0.5 V

P port

(3)

I

OL

VOL= 0.7 V

3 V 8 14

4.5 V 8 17

4.75 V 8 35

2.3 V 10 13 3 V 10 19

4.5 V 10 24

4.75 V 10 45 INT VOL= 0.4 V 2.3 V to 5.5 V 3 10 SCL, SDA ±1

I

A0, A1, RESET ±1

I

P port VI= V

IH

I

P port VI= GND 2.3 V to 5.5 V –1 μA

IL

VI= VCCor GND 2.3 V to 5.5 V μA

CC

2.3 V to 5.5 V 1 μA

5.5 V 104 175

I

CC

Operating mode

VI= VCCor GND, IO= 0, I/O = inputs, f

= 400 kHz, No load

scl

VI= VCCor GND, IO= 0, I/O = inputs, f

= 100 kHz, No load

scl

3.6 V 50 90

2.7 V 20 65

5.5 V 60 150

3.6 V 15 40 μA

2.7 V 8 20

5.5 V 0.25 1

Standby mode 3.6 V 0.2 0.9

Additional current in standby

ΔI

CC

mode

C

SCL VI= VCCor GND 2.3 V to 5.5 V 4 5 pF

i

SDA 5.5 6.5

C

io

P port 8 9.5

VI= VCCor GND, IO= 0, I/O = inputs, f

One input at VCC– 0.6 V, Other inputs at VCCor GND

All LED I/Os at VI= 4.3 V, f

= 0 kHz

scl

= 0 kHz, No load

scl

2.7 V 0.1 0.8

2.3 V to 5.5 V 1.5

5.5 V 1

VIO= VCCor GND 2.3 V to 5.5 V pF

(1) All typical values are at nominal supply voltage (2.5-V, 3.3-V, or 5-V VCC) and TA= 25°C. (2) The total current sourced by all I/Os must be limited to 85 mA. (3) Each I/O must be externally limited to a maximum of 25 mA, and the P port (P7–P0) must be limited to a maximum current of 200 mA.

(1)

MAX UNIT

1.5 1.65 V

mA

V

Product Folder Links: PCA9538

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

6.5 I2C Interface Timing Requirements

over operating free-air temperature range (unless otherwise noted) (see Figure 14)

STANDARD MODE FAST MODE

I2C BUS I2C BUS

MIN MAX MIN MAX

f

I2C clock frequency 0 100 0 400 kHz

scl

t

I2C clock high time 4 0.6 μs

sch

t

I2C clock low time 4.7 1.3 μs

scl

t

I2C spike time 50 50 ns

sp

t

I2C serial-data setup time 250 100 ns

sds

t

I2C serial-data hold time 0 0 ns

sdh

t

I2C input rise time 1000 20 + 0.1C

icr

t

I2C input fall time 300 20 + 0.1C

icf

t

I2C output fall time 10-pF to 400-pF bus 300 20 + 0.1C

ocf

t

I2C bus free time between Stop and Start 4.7 1.3 μs

buf

t

I2C Start or repeated Start condition setup 4.7 0.6 μs

sts

t

I2C Start or repeated Start condition hold 4 0.6 μs

sth

t

I2C Stop condition setup 4 0.6 μs

sps

t

Valid data time SCL low to SDA output valid 300 50 ns

vd(data)

t

Valid data time of ACK condition 0.3 3.45 0.1 0.9 μs

vd(ack)

C

I2C bus capacitive load 400 400 ns

b

(1) Cb= Total capacitance of one bus in pF

ACK signal from SCL low to SDA (out) low

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UNIT

(1)

b

(1)

b

(1)

b

300 ns 300 ns 300 ns

6.6 RESET Timing Requirements

over operating free-air temperature range (unless otherwise noted)

STANDARD MODE FAST MODE

I2C BUS I2C BUS

MIN MAX MIN MAX

t

W

t

REC

t

RESET

PARAMETER UNIT

Reset pulse duration 4 4 ns Reset recovery time 0 0 ns Time to reset 400 400 ns

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted) (see Figure 15 and Figure 16)

PARAMETER UNIT

t

Interrupt valid time P port INT 4 4 μs

iv

t

Interrupt reset delay time SCL INT 4 4 μs

ir

t

Output data valid SCL P7–P0 200 200 ns

pv

t

Input data setup time P port SCL 100 100 ns

ps

t

Input data hold time P port SCL 1 1 μs

ph

FROM TO

(INPUT) (OUTPUT)

STANDARD MODE FAST MODE

I2C BUS I2C BUS MIN MAX MIN MAX

Product Folder Links: PCA9538

0

25

50

75

100

125

150

175

200

225

250

275

-40 -15 10 35 60 85

TA– Free-Air Temperature – °C

(VCC – V OH) – Out put High Volt age – mV

VCC= 5 V, IOL= 10 mA

VCC= 2.5 V, IOL= 10 mA

VCC= 5 V, IOL= 1 mA

VCC= 2.5 V, IOL= 1 mA

0

5

10

15

20

25

30

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

VOL– Outpu t Low Volt age – V

ISINK – I/O Sink Current – mA

TA= –40°C

VCC= 2.5 V

TA= 25°C

TA= 85°C

0

10

20

30

40

50

60

70

2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

VCC– Supply Voltage – V

ICC – Supply Current – µ A

f

SCL

= 400 kHz

I/Os unloaded

0

50

100

150

200

250

300

350

400

450

500

550

600

0 1 2 3 4 5 6 7 8

Number of I/Os Held L ow

ICC – Supply Current – µ A

TA= –40°C

VCC= 5 V

TA= 25°C

TA= 85°C

0

5

10

15

20

25

30

35

40

45

50

55

-40 -15 10 35 60 85

TA– Free-Air Temperature – °C

ICC – Supply Current – µ A

VCC= 2.5 V

VCC= 3.3 V

VCC= 5 V

f

SCL

= 400 kHz

I/Os unloaded

0

5

10

15

20

25

30

35

-40 -15 10 35 60 85

TA– Free-Air Temperature – °C

ICC – Supply Current – nA

VCC= 2.5 V

VCC= 3.3 V

VCC= 5 V

SCL = V

CC

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6.8 Typical Characteristics

TA= 25°C (unless otherwise noted)

Figure 1. Supply Current vs Temperature Figure 2. Quiescent Supply Current vs Temperature

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

Figure 3. Supply Current vs Supply Voltage

Figure 5. I/O Output Low Voltage vs Temperature

Figure 4. Supply Current vs Number Of I/Os Held Low

Figure 6. I/O Sink Current vs Output Low Voltage

Product Folder Links: PCA9538

0

5

10

15

20

25

30

35

40

45

50

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(VCC– VOH) – Outp ut High Voltag e – V

ISOURCE – I/O Source Current – mA

TA= –40°C

VCC= 3.3 V

TA= 25°C

TA= 85°C

0

5

10

15

20

25

30

35

40

45

50

55

60

65

70

75

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(VCC– VOH) – Outp ut High Voltag e – V

ISOURCE – I/O Source Current – mA

TA= –40°C

VCC= 5 V

TA= 25°C

TA= 85°C

0

25

50

75

100

125

150

175

200

225

250

275

-40 -15 10 35 60 85

TA– Free-Air Temperature – °C

(VCC – V OH) – Out put High Volt age – mV

VCC= 5 V, IOL= 10 mA

VCC= 2.5 V, IOL= 10 mA

VCC= 5 V, IOL= 1 mA

VCC= 2.5 V, IOL= 1 mA

0

5

10

15

20

25

30

35

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(VCC– VOH) – Outp ut High Voltag e – V

ISOURCE – I/O Source Current – mA

TA= –40°C

VCC= 2.5 V

TA= 25°C

TA= 85°C

0

5

10

15

20

25

30

35

40

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

VOL– Outpu t Low Volt age – V

ISINK – I/O Sink Current – mA

TA= –40°C

VCC= 3.3 V

TA= 25°C

TA= 85°C

0

5

10

15

20

25

30

35

40

45

50

55

60

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

VOL– Outpu t Low Volt age – V

ISINK – I/O Sink Current – mA

TA= –40°C

VCC= 5 V

TA= 25°C

TA= 85°C

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

Typical Characteristics (continued)

TA= 25°C (unless otherwise noted)

Figure 7. I/O Sink Current vs Output Low Voltage Figure 8. I/O Sink Current vs Output Low Voltage

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Figure 9. I/O Output High Voltage vs Temperature

Figure 11. I/O Source Current vs Output High Voltage Figure 12. I/O Source Current vs Output High Voltage

Figure 10. I/O Source Current vs Output High Voltage

Product Folder Links: PCA9538

0

1

2

3

4

5

6

2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

VCC– Supply Voltage – V

VOH – O utput High Voltage – V

IOH= –10 mA

IOH= –8 mA

TA= 25°C

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Typical Characteristics (continued)

TA= 25°C (unless otherwise noted)

Figure 13. Output High Voltage vs Supply Voltage

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

Product Folder Links: PCA9538

RL = 1 kΩ

V

CC

CL = 50 pF (see Note A)

t

buf

t

icr

t

sth

t

sds

t

sdh

t

icf

t

icr

t

scl

t

sch

t

sts

t

PHL

t

PLH

0.3 × V

CC

Stop

Condition

t

sps

Repeat

Start

Condition

Start or Repeat Start Condition

SCL

SDA

Start

Condition

(S)

Address

Bit 7

(MSB)

Data Bit 10 (LSB)

Stop

Condition

(P)

Three Bytes for Complete

Device Programming

SDA LOAD CONFIGURATION

VOLTAGE WAVEFORMS

t

icf

Stop

Condition

(P)

t

sp

DUT

SDA

0.7 × V

CC

0.3 × V

CC

0.7 × V

CC

R/W

Bit 0

(LSB)

ACK

(A)

Data Bit 07 (MSB)

Address

Bit 1

Address

Bit 6

BYTE DESCRIPTION

1 I2C address

2, 3 P-port data

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

7 Parameter Measurement Information

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A. CLincludes probe and jig capacitance. B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO= 50 Ω, tr/tf≤ 30 ns. C. All parameters and waveforms are not applicable to all devices.

Figure 14. I2C Interface Load Circuit And Voltage Waveforms

Product Folder Links: PCA9538

A

S 1 1 1 0 A10 A0 1

Data 1 1 PData 2

Start

Condition

8 Bits

(One Data Byte)

From Port

Data From PortSlave Address

R/W

87654321

t

ir

t

ir

t

sps

t

iv

Address Data 1 Data 2

INT

Data

Into

Port

B

A A

P

n

INT

R/W A

t

ir

0.7 × V

CC

0.3 × V

CC

0.7 × V

CC

0.3 × V

CC

0.7 × V

CC

0.3 × V

CC

0.7 × V

CC

0.3 × V

CC

INT

SCL

View B−BView A−A

t

iv

RL = 4.7 kΩ

V

CC

CL = 100 pF (see Note A)

INTERRUPT LOAD CONFIGURATION

DUT

INT

ACK

From Slave

ACK

From Slave

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SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

Parameter Measurement Information (continued)

PCA9538

A. CLincludes probe and jig capacitance. B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO= 50 Ω, tr/tf≤ 30 ns. C. All parameters and waveforms are not applicable to all devices.

Figure 15. Interrupt Load Circuit And Voltage Waveforms

Product Folder Links: PCA9538

P0 A

0.7 × V

CC

0.3 × V

CC

SCL

P3

t

pv

(see Note B)

Slave

ACK

Unstable

Data

Last Stable Bit

SDA

P

n

P

n

WRITE MODE (R/W = 0)

P0 A

0.7 × V

CC

0.3 × V

CC

SCL

P3

0.7 × V

CC

0.3 × V

CC

t

ps

t

ph

READ MODE (R/W = 1)

DUT

CL = 50 pF (see Note A)

P-PORT LOAD CONFIGURATION

Pn

2 × V

CC

500 W

PCA9538

SCPS126F –SEPTEMBER 2006–REVISED JUNE 2014

Parameter Measurement Information (continued)

www.ti.com

A. CLincludes probe and jig capacitance. B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO= 50 Ω, tr/tf≤ 30 ns. C. The outputs are measured one at a time, with one transition per measurement. D. All parameters and waveforms are not applicable to all devices.

Figure 16. P-Port Load Circuit And Voltage Waveforms

Product Folder Links: PCA9538

NXP PCA9538PW Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Features 2 Description

Table of Contents

3 Revision History

4 Description (Continued)

5 Pin Configuration and Functions

6 Specifications

6.1 Absolute Maximum Ratings

6.2 Handling Ratings

6.3 Recommended Operating Conditions

6.4 Electrical Characteristics

6.5 I2C Interface Timing Requirements

6.6 RESET Timing Requirements

6.7 Switching Characteristics

6.8 Typical Characteristics

7 Parameter Measurement Information