NSC MM54C85J-883 Datasheet

TL/F/5886

MM54C85/MM74C85 4-Bit Magnitude Comparator

September 1989

MM54C85/MM74C85 4-Bit Magnitude Comparator

General Description

The MM54C85/MM74C85 is a four-bit magnitude compara­tor which will perform comparison of straight binary or BCD
codes. The circuit consists of eight comparing inputs (A0,
A1, A2, A3, B0, B1, B2, B3), three cascading inputs (A

l

B,

A

k

B and AeB), and three outputs (AlB, AkB and

A

e

B). This device compares two four-bit words (A and B)
and determines whether they are ‘‘greater than,’’ ‘‘less
than,’’ or ‘‘equal to’’ each other by a high level on the appro­priate output. For words greater than four-bits, units can be
cascaded by connecting the outputs (A

l

B, AkB, and

A

e

B) of the least significant stage to the cascade inputs

(A

l

B, AkB and AeB) of the next-significant stage. In
addition the least significant stage must have a high level
voltage (V

IN(1)

) applied to the AeB input and low level

voltage (V

IN(0)

) applied to AlB and AkB inputs.

Features

Y

Wide supply voltage range 3.0V to 15V

Y

Guaranteed noise margin 1.0V

Y

High noise immunity 0.4 VCC(typ.)

Y

Low power fan out of 2

TTL compatibility driving 74L

Y

Expandable to ‘N’ stages

Y

Applicable to binary or BCD

Y

Low power pinout: 54L85/74L85

Logic Diagram

TL/F/5886– 1

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Voltage at Any Pin

b

0.3V to V

CC

a

0.3V

Operating Temperature Range

MM54C85

b

55§Ctoa125§C

MM74C85

b

40§Ctoa85§C

Storage Temperature Range

b

65§Ctoa150§C

Power Dissipation (P

D

)
Dual-In-Line 700 mW
Small Outline 500 mW

Operating V

CC

Range 3.0V to 15V

V

CC

18V

Lead Temperature

(Soldering, 10 seconds) 260

§

C

DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted

Symbol Parameter Conditions Min Typ Max Units

CMOS TO CMOS

V

IN(1)

Logical ‘‘1’’ Input Voltage V

CC

e

5.0V 3.5 V

V

CC

e

10V 8.0 V

V

IN(0)

Logical ‘‘0’’ Input Voltage V

CC

e

5.0V 1.5 V

V

CC

e

10V 2.0 V

V

OUT(1)

Logical ‘‘1’’ Output Voltage V

CC

e

5.0V, I

O

eb

10 mA 4.5 V

V

CC

e

10V, I

O

eb

10 mA 9.0 V

V

OUT(0)

Logical ‘‘0’’ Output Voltage V

CC

e

5.0V, I

O

ea

10 mA 0.5 V

V

CC

e

10V, I

O

ea

10 mA 1.0 V

I

IN(1)

Logical ‘‘1’’ Input Current V

CC

e

15V, V

IN

e

15V 0.005 1.0 mA

I

IN(0)

Logical ‘‘0’’ Input Current V

CC

e

15V, V

IN

e

0V

b

1.0

b

0.005 mA

I

CC

Supply Current V

CC

e

15V 0.05 300 mA

CMOS/LPTTL INTERFACE

V

IN(1)

Logical ‘‘1’’ Input Voltage 54C, V

CC

e

4.5V V

CC

b

1.5 V

74C, V

CC

e

4.75V V

CC

b

1.5 V

V

IN(0)

Logical ‘‘0’’ Input Voltage 54C, V

CC

e

4.5V 0.8 V

74C, V

CC

e

4.75V 0.8 V

V

OUT(1)

Logical ‘‘1’’ Output Voltage 54C, V

CC

e

4.5V, I

O

eb

360 mA 2.4 V

74C, V

CC

e

4.75V, I

O

eb

360 mA 2.4 V

V

OUT(0)

Logical ‘‘0’’ Output Voltage 54C, V

CC

e

4.5V, I

O

e

360 mA 0.4 V

74C, V

CC

e

4.75V, I

O

e

360 mA 0.4 V

OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)

I

SOURCE

Output Source Current V

CC

e

5.0V, V

OUT

e

0V

b

1.75

b

3.3 mA

(P-Channel) T

A

e

25§C

I

SOURCE

Output Source Current V

CC

e

10V, V

OUT

e

0V

b

8.0

b

15 mA

(P-Channel) T

A

e

25§C

I

SINK

Output Sink Current V

CC

e

5.0V, V

OUT

e

V

CC

1.75 3.6 mA

(N-Channel) T

A

e

25§C

I

SINK

Output Sink Current V

CC

e

10V, V

OUT

e

V

CC

8.0 16 mA

(N-Channel) T

A

e

25§C

AC Electrical Characteristics* T

A

e

25§C, C

L

e

50 pF, unless otherwise specified

Symbol Parameter Conditions Min Typ Max Units

t

pd

Propagation Delay from any A V

CC

e

50V 250 600 ns

or B Data Input to any V

CC

e

10V 100 300 ns

Data Output

t

pd

Propagation Delay Time from V

CC

e

50V 200 500 ns

any Cascade Input to V

CC

e

10V 100 250 ns

any Output

C

IN

Input Capacitance Any Inupt 5.0 pF

C

PD

Power Dissipation Capacitance (Note 3) Per Package 45 pF

*AC Parameters are guaranteed by DC correlated testing.

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.

Note 2: Capacitance is guaranteed by periodic testing.

Note 3: C

PD

determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note,

AN-90.

2