NSC DS90LV047ATMX, DS90LV047ATMTCX, DS90LV047ATMTC, DS90LV047ATM Datasheet
DS90LV047A
3V LVDS Quad CMOS Differential Line Driver
General Description
The DS90LV047Ais a quad CMOS flow-through differential
line driver designed for applications requiring ultra low power
dissipation and high data rates. The device is designed to
support data rates in excess of 400 Mbps (200 MHz) utilizing
Low Voltage Differential Signaling (LVDS) technology.
The DS90LV047A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential
output signals. In addition, the driver supports a TRI-STATE
®
function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an
ultra low idle power state of 13 mW typical. The
DS90LV047Ahasaflow-through pinout for easy PCB layout.
The EN and EN* inputs are ANDed together and control the
TRI-STATE outputs. The enables are common to all four
drivers. The DS90LV047A and companion line receiver
(DS90LV048A) provide a new alternative to high power
psuedo-ECL devices for high speed point-to-point interface
applications.
Features
n
>
400 Mbps (200 MHz) switching rates
n Flow-through pinout simplifies PCB layout
n 300 ps typical differential skew
n 400 ps maximum differential skew
n 1.7 ns maximum propagation delay
n 3.3V power supply design
n
±
350 mV differential signaling
n Low power dissipation (13mW at 3.3V static)
n Interoperable with existing 5V LVDS receivers
n High impedance on LVDS outputs on power down
n Conforms to TIA/EIA-644 LVDS Standard
n Industrial operating temperature range (−40˚C to +85˚C)
n Available in surface mount (SOIC) and low profile
TSSOP package
Connection Diagram Functional Diagram
Truth Table
ENABLES INPUT OUTPUTS
EN EN
*
D
IN
D
OUT+
D
OUT−
H L or Open L L H
HHL
All other combinations of ENABLE inputs X Z Z
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
Dual-In-Line
DS100887-1
Order Number DS90LV047ATM, DS90LV047ATMTC
See NS Package Number M16A, MTC16
DS100887-2
July 1999
DS90LV047A 3V LVDS Quad CMOS Differential Line Driver
© 1999 National Semiconductor Corporation DS100887 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.3V to +4V
Input Voltage (D
IN
) −0.3V to (VCC+ 0.3V)
Enable Input Voltage (EN, EN
*
) −0.3V to (VCC+ 0.3V)
Output Voltage (D
OUT+,DOUT−
) −0.3V to +3.9V
Short Circuit Duration
(D
OUT+,DOUT−
) Continuous
Maximum Package Power Dissipation
@
+25˚C
M Package 1088 mW
MTC Package 866 mW
Derate M Package 8.5 mW/˚C above +25˚C
Derate MTC Package 6.9 mW/˚C above +25˚C
Storage Temperature Range −65˚C to +150˚C
Lead Temperature Range
Soldering (4 sec.) +260˚C
Maximum Junction Temperature +150˚C
ESD Rating (Note 10)
(HBM, 1.5 kΩ, 100 pF) ≥ 10 kV
(EIAJ, 0 Ω, 200 pF) ≥ 1200 V
Recommended Operating
Conditions
Min Typ Max Units
Supply Voltage (V
CC
) +3.0 +3.3 +3.6 V
Operating Free Air
Temperature (T
A
) −40 +25 +85 ˚C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3, 4)
Symbol Parameter Conditions Pin Min Typ Max Units
V
OD1
Differential Output Voltage R
L
=
100Ω (
Figure 1
)D
OUT−
D
OUT+
250 310 450 mV
∆V
OD1
Change in Magnitude of V
OD1
for Complementary Output
States
1 35 |mV|
V
OS
Offset Voltage 1.125 1.17 1.375 V
∆V
OS
Change in Magnitude of VOSfor
Complementary Output States
1 25 |mV|
V
OH
Output High Voltage 1.33 1.6 V
V
OL
Output Low Voltage 0.90 1.02 V
V
IH
Input High Voltage DIN,
EN,
EN*
2.0 V
CC
V
V
IL
Input Low Voltage GND 0.8 V
I
IH
Input High Current V
IN
=
V
CC
or 2.5V −10 2 +10 µA
I
IL
Input Low Current V
IN
=
GND or 0.4V −10 −2 +10 µA
V
CL
Input Clamp Voltage I
CL
=
−18 mA −1.5 −0.8 V
I
OS
Output Short Circuit Current
(Note 11)
ENABLED,
D
IN=VCC,DOUT+
=0Vor
D
IN
= GND, D
OUT−
=0V
D
OUT−
D
OUT+
−4.2 −9.0 mA
I
OSD
Differential Output Short Circuit
Current (Note 11)
ENABLED, VOD= 0V −4.2 −9.0 mA
I
OFF
Power-off Leakage V
OUT
=
0V or 3.6V, V
CC
=
0V
or Open
−20
±
1 +20 µA
I
OZ
Output TRI-STATE Current EN = 0.8V and EN* = 2.0V
V
OUT
=
0V or V
CC
−10
±
1 +10 µA
I
CC
No Load Supply current Drivers
Enabled
DIN=VCCor GND V
CC
4.0 8.0 mA
I
CCL
Loaded Supply Current Drivers
Enabled
RL= 100Ω All Channels, DIN=
V
CC
or GND (all inputs)
20 30 mA
I
CCZ
No Load Supply Current Drivers
Disabled
DIN=VCCor GND, EN =
GND, EN* = V
CC
2.2 6.0 mA
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Switching Characteristics
V
CC
=
+3.3V
±
10%,T
A
=
−40˚C to +85˚C (Notes 3, 9, 12)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low R
L
=
100Ω,C
L
=
15 pF
(
Figure 2
and
Figure 3
)
0.5 0.9 1.7 ns
t
PLHD
Differential Propagation Delay Low to High 0.5 1.2 1.7 ns
t
SKD1
Differential Pulse Skew |t
PHLD−tPLHD
|
(Note 5)
0 0.3 0.4 ns
t
SKD2
Channel-to-Channel Skew (Note 6) 0 0.4 0.5 ns
t
SKD3
Differential Part to Part Skew (Note 7) 0 1.0 ns
t
SKD4
Differential Part to Part Skew (Note 8) 0 1.2 ns
t
TLH
Rise Time 0.5 1.5 ns
t
THL
Fall Time 0.5 1.5 ns
t
PHZ
Disable Time High to Z R
L
=
100Ω,C
L
=
15 pF
(
Figure 4
and
Figure 5
)
25ns
t
PLZ
Disable Time Low to Z 2 5 ns
t
PZH
Enable Time Z to High 3 7 ns
t
PZL
Enable Time Z to Low 3 7 ns
f
MAX
Maximum Operating Frequency (Note 14) 200 250 MHz
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V
OD1
and
∆V
OD1
.
Note 3: All typicals are given for: V
CC
=
+3.3V, T
A
=
+25˚C.
Note 4: The DS90LV047Aisa current mode device and only functions within datasheet specifications when a resistive load is applied to the driver outputs typical
range is (90Ω to 110Ω).
Note 5: t
SKD1|tPHLD−tPLHD
| is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
same channel.
Note 6: t
SKD2
is the Differential Channel-to-Channel Skew of any event on the same device.
Note 7: t
SKD3
, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This speci-
fication applies to devices at the same V
CC
and within 5˚C of each other within the operating temperature range.
Note 8: t
SKD4
, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended
operating temperature and voltage ranges, and across process distribution. t
SKD4
is defined as |Max − Min| differential propagation delay.
Note 9: Generator waveform for all tests unless otherwise specified: f=1 MHz, Z
O
=
50Ω,t
r
≤1 ns, and tf≤ 1 ns.
Note 10: ESD Ratings:
HBM (1.5 kΩ, 100 pF) ≥ 10 kV
EIAJ (0 Ω, 200 pF) ≥ 1200 V
Note 11: Output short circuit current (I
OS
) is specified as magnitude only, minus sign indicates direction only.
Note 12: C
L
includes probe and jig capacitance.
Note 13: All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
Note 14: f
MAX
generator input conditions: t
r
=
t
f
<
1ns(0%to 100%), 50%duty cycle, 0V to 3V.OutputCriteria:dutycycle=45%/55%, VOD>250mV,allchannels
switching.
Parameter Measurement Information
DS100887-3
FIGURE 1. Driver VODand VOSTest Circuit
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Parameter Measurement Information (Continued)
DS100887-4
FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit
DS100887-5
FIGURE 3. Driver Propagation Delay and Transition Time Waveforms
DS100887-6
FIGURE 4. Driver TRI-STATE Delay Test Circuit
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