NSC DS90LV032ATMX, DS90LV032ATM Datasheet

DS90LV032A
3V LVDS Quad CMOS Differential Line Receiver

General Description

The DS90LV032Ais a quad CMOS differential line receiver
designed for applications requiring ultra low power dissipa­tion and high data rates. The device is designed to support
data rates in excess of 400 Mbps (200 MHz) utilizing Low
Voltage Differential Signaling (LVDS) technology.

The DS90LV032Aaccepts low voltage (350 mV typical) dif­ferential input signals and translates them to 3V CMOS out­put levels. The receiver supports a TRI-STATE

®

function that
may be used to multiplex outputs. The receiver also supports
open, shorted and terminated (100Ω) input Fail-safe. The re­ceiver output will be HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (eg.
DS90LV031A) provide a new alternative to high power
PECL/ECL devices for high speed point-to-point interface
applications.

Features

n

>

400 Mbps (200 MHz) switching rates

n 0.1 ns channel-to-channel skew (typical)
n 0.1 ns differential skew (typical)
n 3.3 ns maximum propagation delay
n 3.3V power supply design
n Power down high impedance on LVDS inputs
n Low Power design (40mW 3.3V static)
n Interoperable with existing 5V LVDS networks
n Accepts small swing (350 mV typical) VID
n Supports open, short and terminated input fail-safe
n Compatible with ANSI/TIA/EIA-644
n Industrial temp. operating range (-40˚C to +85˚C)
n Available in SOIC and TSSOP Packaging

Connection Diagram Functional Diagram

ENABLES INPUTS OUTPUT

EN EN* R

IN+−RIN−

R

OUT

LH X Z

All other combinations V

ID

≥ 0.1V H

of ENABLE inputs V

ID

≤ −0.1V L

Full Fail-safe

OPEN/SHORT H

or Terminated

Dual-in-Line

DS100067-1

Order Number DS90LV032ATM

or DS90LV032ATMTC

See NS Package Number M16A or MTC16

DS100067-2

July 1999

DS90LV032A 3V LVDS Quad CMOS Differential Line Receiver

© 1999 National Semiconductor Corporation DS100067 www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) −0.3V to +4V

Input Voltage (R

IN+,RIN−

) −0.3V to +3.9V

Enable Input Voltage (EN, EN*) −0.3V to (V

CC

+ 0.3V)

Output Voltage (R

OUT

) −0.3V to (VCC+ 0.3V)

Maximum Package Power Dissipation +25˚C

M Package 1025 mW
MTC Package 866 mW
Derate M Package 8.2 mW/˚C above +25˚C
Derate MTC Package 6.9 mW/˚C above +25˚C

Storage Temperature Range −65˚C to +150˚C

Lead Temperature Range

(Soldering 4 sec.) +260˚C

Maximum Junction Temperature +150˚C

ESD Rating (Note 10)

(HBM 1.5 kΩ, 100 pF) ≥ 4.5 kV
(EIAJ 0 Ω, 200 pF) ≥ 250 V

Recommended Operating
Conditions

Min Typ Max Units

Supply Voltage (V

CC

) +3.0 +3.3 +3.6 V
Receiver Input Voltage GND +3.0 V
Operating Free Air

Temperature (T

A

) −40 25 +85 ˚C

Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Note 2)

Symbol Parameter Conditions Pin Min Typ Max Units

V

TH

Differential Input High Threshold VCM= +1.2V

(Note 13)

R

IN+

,

R

IN−

+20 +100 mV

V

TL

Differential Input Low Threshold −100 −20 mV
VCMR Common-Mode Voltage Range VID=200 mV peak to peak (Note 5) 0.1 2.3 V
I

IN

Input Current VIN= +2.8V VCC= 3.6V or 0V −10

±

1 +10 µA

V

IN

= 0V −10

±

1 +10 µA

V

IN

= +3.6V VCC= 0V -20 +20 µA

V

OH

Output High Voltage IOH= −0.4 mA, VID= +200 mV R

OUT

2.7 3.0 V

I

OH

= −0.4 mA, Input terminated 2.7 3.0 V

I

OH

= −0.4 mA, Input shorted 2.7 3.0 V

V

OL

Output Low Voltage IOL= 2 mA, VID= −200 mV 0.1 0.25 V
I

OS

Output Short Circuit Current Enabled, V

OUT

= 0V (Note 11) −15 −48 −120 mA

I

OZ

Output TRI-STATE Current Disabled, V

OUT

=0VorV

CC

−10

±

1 +10 µA

V

IH

Input High Voltage EN,

EN*

2.0 V

CC

V

V

IL

Input Low Voltage GND 0.8 V
I

I

Input Current VIN=0VorVCC, Other Input = VCCor

GND

−10

±

1 +10 µA

V

CL

Input Clamp Voltage ICL= −18 mA −1.5 −0.8 V
I

CC

No Load Supply Current EN, EN* = VCCor GND, Inputs Open V

CC

10 15 mA

Receivers Enabled EN, EN* = 2.4V or 0.5V, Inputs Open 10 15 mA
I

CCZ

No Load Supply Current

Receivers Disabled

EN = GND, EN* = VCC, Inputs Open 3 5 mA

Switching Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 3, 4, 7, 8)

Symbol Parameter Conditions Min Typ Max Units

t

PHLD

Differential Propagation Delay High to Low CL= 10 pF 1.8 3.3 ns

t

PLHD

Differential Propagation Delay Low to High VID= 200 mV 1.8 3.3 ns

t

SKD1

Differential Pulse Skew |t

PHLD−tPLHD

| (Note 6) (

Figure 1

and

Figure 2

) 0 0.1 0.35 ns

t

SKD2

Differential Channel-to-Channel Skew-same device
(Note 7)

0 0.1 0.5 ns

t

SKD3

Differential Part to Part Skew (Note 8) 1.0 ns

t

SKD4

Differential Part to Part Skew (Note 9) 1.5 ns

t

TLH

Rise Time 0.35 1.2 ns

t

THL

Fall Time 0.35 1.2 ns

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Switching Characteristics (Continued)

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 3, 4, 7, 8)

Symbol Parameter Conditions Min Typ Max Units

t

PHZ

Disable Time High to Z RL=2kΩ 812ns

t

PLZ

Disable Time Low to Z CL=10pF 6 12 ns

t

PZH

Enable Time Z to High (

Figure 3

and

Figure 4

)1117ns

t

PZL

Enable Time Z to Low 11 17 ns

f

MAX

Maximum Operating Frequency (Note 14) All Channels Switching 200 250 MHz

Note 1: “AbsoluteMaximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.

Note 2: Currentinto device pins is defined as positive. Current out of device pins is defined as negative.All voltages are referenced to ground unless otherwise speci­fied.

Note 3: All typicals are given for: V

CC

= +3.3V, TA= +25˚C.

Note 4: Generator waveform for all tests unless otherwise specified:f=1MHz, Z

O

=50Ω,trand tf(0%to 100%) ≤ 3 ns for RIN.

Note 5: The VCMR range is reduced for larger VID. Example: if VID=400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs shorted is valid over
a common-mode range of 0V to 2.3V.A VID up to V

CC

− 0V may be applied to the R

IN+/RIN−

inputs with the Common-Mode voltage set to VCC/2. Propagation delay
and Differential Pulse skew decrease when VID is increased from 200mV to 400mV. Skew specifications apply for 200mV ≤ VID ≤ 800mV over the common-mode
range .

Note 6: t

SKD1

is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel

Note 7: t

SKD2

, Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the same chip with

any event on the inputs.
Note 8: t

SKD3

, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC,

and within 5˚C of each other within the operating temperature range.
Note 9: t

SKD4

, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended

operating temperature and voltage ranges, and across process distribution. t

SKD4

is defined as |Max − Min| differential propagation delay.

Note 10: ESD Rating:

HBM (1.5 kΩ, 100 pF) ≥ 4.5kV
EIAJ (0Ω, 200 pF) ≥ 250V

Note 11: Output short circuit current (I

OS

) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not

exceed maximum junction temperature specification.
Note 12: C

L

includes probe and jig capacitance.

Note 13: V

CC

is always higher than R

IN+

and R

IN−

voltage. R

IN−

and R

IN+

are allowed to have a voltage range −0.2V to VCC− VID/2. However, to be compliant with

AC specifications, the common voltage range is 0.1V to 2.3V
Note 14: f

MAX

generator input conditions: t

r

=

t

f

<

1ns (0%to 100%), 50%duty cycle, differential (1.05V to 1.35V peak to peak). Output Criteria: 60%/40%duty cycle,

V

OL

(max 0.4V), VOH(min 2.7V), Load=10 pF (stray plus probes)

Parameter Measurement Information

DS100067-3

FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit

DS100067-4

FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms

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