DP83891 Gig PHYTER™ 10/100/1000M
© 2000 National Semiconductor Corporation
www.national.com
Subject to change Last Modified: 1/27/00 REVISION 0.0
Advance Information
January 2000
DP83891 Gig PHYTER™10/100/1000M
General Description
The DP83891 is the first fully integrated,feature rich Physical Layer transceiverwithintegrated PMD sublayersto support 10BASE-T,100BASE-TX and 1000BASE-T Ethernet
protocols. It operates on existing CAT5 cables which
reduces deployment costs.
The DP83891 is designed for easy implementation of
10/100/1000 Mb/s Ethernet LANs. It interfaces directly to
Twisted Pair media via an external standard Quad transformer. The DP83891 connects to the MAC layer through
the IEEE 802.3u Standard Media Independent Interface
(MII) or the IEEE 802.3z Gigabit Media Independent Interface (GMII).
Applications
The DP83891 fits applications in:
■ 10/100/1000 Mb/s capable node cards
■ Switches with 10/100/1000 Mb/s capable ports
■ High speed uplink ports (backbone)
■ High end workstations
System Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
ETHERNET
DP83891
ETHERNET PHYSICAL LAYER
STATUS
LED
MAGNETICS
RJ-45
100BASE-TX
MII/GMII
MAC
100BASE-TX
CLOCK
125 MH
1000BASE-T
or
1000BASE-T
z
s
or
10/100/1000
10/100/1000 Mb/s
10BASE-T,
10BASE-T,
Features
■ Fully integrated 10BASE-T,100BASE-TX and
1000BASE-T capable
■ Single Quad TX-Transformer interface for all speeds
■ Fully compliant to IEEE 802.3u 100BASE-TX and IEEE
802.3z/ab 1000BASE-T specifications. Fully integrated
and fully compliantANSI X3.T12 PMD physical sublayer
that includes adaptive equalization and Baseline Wander compensation.
■ Supports Auto-MDIX
■ IEEE 802.3u Auto-Negotiation and Parallel Detection
– Fullyauto-negotiatesbetween10,100and1000Mb/s
full duplex and half duplex devices
■ 3.3 V MAC interfaces:
– IEEE 802.3u MII
– IEEE 802.3z GMII
■ LED support (Link, Speed, Activity, Duplex, Collision,
Auto-Negotiation, TX and RX indications)
■ Management Register Set (MDIO and MDC)
■ Single 3.3 V power supply
– 5 V tolerant I/Os
■ 208-pin PQFP package