NSC DP83865BVH Datasheet

DP83865BVH Gig PHYTER® V
10/100/1000 Ethernet Physical Layer

DP83865BVH Gig PHYTER® V 10/100/1000 Ethernet Physical Layer

ADVANCED INFORMATION

September 2002

General Description

The DP83865 is a fully featured Physical Layer transceiver
with integrated PMD sublayers to support 10BASE-T,
100BASE-TX and 1000BASE-T Ethernet protocols.

The DP83865 is an ul tra low po wer v ersion of t he DP8 3861
and DP83891. It uses advanced 0.18 um, 1.8 V CMOS
technology, fabricated at National Semiconductor’s South
Portland, Maine facility.

The DP83865 is designed for easy implementation of
10/100/1000 Mb/s Ethernet LANs. It interfaces directly to
Tw isted Pai r media vi a an externa l transfo rmer. This devic e
interfaces directly to the MAC layer through the IEEE

802.3u Standard Media Independent Interface (MII) or the
IEEE 802.3z Gigabit Media Independent Interface (GMII).

The DP83865 is a fourth generation Gigabit PHY with field
proven architecture and performance. Its robust perfor­mance ensures drop-in replacement of existing 10/100
Mb/s equipment with 10/100/1000 Mb/s networking infra­structure.

Applications

The DP83865 fits applications in:

■ 10/100/1000 Mb/s capable node cards

■ Switches with 10/100/1000 Mb/s capable ports

■ High speed uplink ports (backbone)

Features

■ Fully compliant with IEEE 10BASE-T, 100BASE-TX and
1000BASE-T specifications (802.3u, 802.3z, 802.3ab).

■ Integrated PMD subla yer featuring adapti ve equalization
and baseline wander compensation according to ANSI
X3.T12.

■ 3.3 V or 2.5 V MAC interfaces:
– IEEE 802.3u MII
– IEEE 802.3z GMII

■ User progr ammable GMII pin ordering.

■ IEEE 802.3u Auto-Negotiation and Parallel Detection

– Fully Auto-Negotiates between 1000 Mb/s, 100 Mb/ s,

and 10 Mb/s full duplex and half duplex devices

■ LED support for activity, full / half duplex, link1000,
link100 and link10 or user programmable (manual
on/off).

■ Supports 25 MHz operation with crystal or oscillator.

■ Requires only two power supplies, 1.8 V (core and ana-

log) and 2.5 V (a nalog and I /O). 3 .3V is supp orted a s an
alternative supply for I/O voltage.

■ User programmable interrupt.

■ Supports Auto-MDIX at 10, 100 and 1000 Mb/s.

■ Supports JTAG (IEEE1149.1).

■ Ultra low power consumption of one watt typical.

■ Management port (MDC / MDIO).

■ 128-pin PQFP package (14mm x 20mm).

■ WOL support.

System Diagram

MII

DP83820

10/100/1000 Mb/s
ETHERNET MAC

PHYTER® is a registered trademark of National Semiconductor Corporation.

©2002 National Semiconductor Corporation

GMII

10/100/1000 Mb/s

ETHERNET PHYSICAL LAYER

25 MHz

crystal or oscillator

10BASE-T
100BASE-TX
1000BASE-T

DP83865

RJ-45

MAGNETICS

STAT US

LEDs

www.national.com

Physical Dimensions inches (millimeters) unless otherwise noted

DP83865BVH Gig PHYTER® V 10/100/1000 Ethernet Physical Layer

128 Plastic Leaded Flat Pack

NS Package Number VLA128A

Dimensions in mm

LIFE SUPPORT POLICY

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the

2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.

labeling, can be reasonably expected to result in a
significant injury to the user.

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.