NSC CD4011BMW-883, CD4011BMJ-883 Datasheet
TL/F/5939
CD4001BM/CD4001BC Quad 2-Input NOR Buffered B Series Gate
CD4011BM/CD4011BC Quad 2-Input NAND Buffered B Series Gate
March 1988
CD4001BM/CD4001BC Quad 2-Input
NOR Buffered B Series Gate
CD4011BM/CD4011BC Quad 2-Input
NAND Buffered B Series Gate
General Description
These quad gates are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source
and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs
which improve transfer characteristics by providing very
high gain.
All inputs are protected against static discharge with diodes
to V
DD
and VSS.
Features
Y
Low power TTL Fan out of 2 driving 74L
compatibility or 1 driving 74LS
Y
5V–10V–15V parametric ratings
Y
Symmetrical output characteristics
Y
Maximum input leakage 1 m A at 15V over full temperature range
Schematic Diagrams
TL/F/5939– 1
CD4001BC/BM
TL/F/5939– 2
(/4 of device shown
J
eAa
B
Logical ‘‘1’’eHigh
Logical ‘‘0’’
e
Low
*All inputs protected by standard
CMOS protection circuit.
TL/F/5939– 5
CD4011BC/BM
TL/F/5939– 6
(/4 of device shown
J
e
A#B
Logical ‘‘1’’eHigh
Logical ‘‘0’’
e
Low
*All inputs protected by standard
CMOS protection circuit.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 and 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at any Pin
b
0.5V to V
DD
a
0.5V
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
V
DD
Range
b
0.5 VDCtoa18 V
DC
Storage Temperature (TS)
b
65§Ctoa150§C
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260
§
C
Operating Conditions
Operating Range (VDD)3V
DC
to 15 V
DC
Operating Temperature Range
CD4001BM, CD4011BM
b
55§Ctoa125§C
CD4001BC, CD4011BC
b
40§Ctoa85§C
DC Electrical Characteristics CD4001BM, CD4011BM (Note 2)
Symbol Parameter Conditions
b
55§C
a
25§C
a
125§C
Units
Min Max Min Typ Max Min Max
I
DD
Quiescent Device V
DD
e
5V, V
IN
e
VDDor V
SS
0.25 0.004 0.25 7.5 mA
Current V
DD
e
10V, V
IN
e
VDDor V
SS
0.50 0.005 0.50 15 m A
V
DD
e
15V, V
IN
e
VDDor V
SS
1.0 0.006 1.0 30 m A
V
OL
Low Level V
DD
e
5V 0.05 0 0.05 0.05 V
Output Voltage V
DD
e
10VlI
O
l
k
1 mA 0.05 0 0.05 0.05 V
V
DD
e
15V ( 0.05 0 0.05 0.05 V
V
OH
High Level V
DD
e
5V 4.95 4.95 5 4.95 V
Output Voltage V
DD
e
10VlI
O
l
k
1 mA 9.95 9.95 10 9.95 V
V
DD
e
15V ( 14.95 14.95 15 14.95 V
V
IL
Low Level V
DD
e
5V, V
O
e
4.5V 1.5 2 1.5 1.5 V
Input Voltage V
DD
e
10V, V
O
e
9.0V 3.0 4 3.0 3.0 V
V
DD
e
15V, V
O
e
13.5V 4.0 6 4.0 4.0 V
V
IH
High Level V
DD
e
5V, V
O
e
0.5V 3.5 3.5 3 3.5 V
Input Voltage V
DD
e
10V, V
O
e
1.0V 7.0 7.0 6 7.0 V
V
DD
e
15V, V
O
e
1.5V 11.0 11.0 9 11.0 V
I
OL
Low Level Output V
DD
e
5V, V
O
e
0.4V 0.64 0.51 0.88 0.36 mA
Current V
DD
e
10V, V
O
e
0.5V 1.6 1.3 2.25 0.9 mA
(Note 3) V
DD
e
15V, V
O
e
1.5V 4.2 3.4 8.8 2.4 mA
I
OH
High Level Output V
DD
e
5V, V
O
e
4.6V
b
0.64
b
0.51b0.88
b
0.36 mA
Current V
DD
e
10V, V
O
e
9.5V
b
1.6
b
1.3b2.25
b
0.9 mA
(Note 3) V
DD
e
15V, V
O
e
13.5V
b
4.2
b
3.4b8.8
b
2.4 mA
I
IN
Input Current V
DD
e
15V, V
IN
e
0V
b
0.10
b
10
b
5
b
0.10
b
1.0 mA
V
DD
e
15V, V
IN
e
15V 0.10 10
b
5
0.10 1.0 mA
Connection Diagrams
CD4001BC/CD4001BM
Dual-In-Line Package
TL/F/5939– 3
Top View
CD4011BC/CD4011BM
Dual-In-Line Package
TL/F/5939– 4
Top View
Order Number CD4001B or CD4011B
2
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