NSC ADC10664CIN Datasheet

ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
General Description
Using an innovative, patented multistep*conversion tech­nique, the 10-bit ADC10662 and ADC10664 are 2- and 4-input CMOS analog-to-digital converters offering sub-microsecond conversion times yet dissipating a maxi­mum of only 235 mW. The ADC10662 and ADC10664 per­form a 10-bit conversion in two lower-resolution “flashes”, thus yielding a fast A/D without the cost, power dissipation, and other problems associated with true flash approaches. In addition to standard static performance specifications (Linearity,Full-Scale Error, etc.) dynamic performance (THD, S/N) is guaranteed.
The analog input voltage tothe ADC10662 and ADC10664 is sampled and held by an internal sampling circuit. Input sig­nals at frequencies from dc to over 250 kHz can therefore be digitized accurately without the need for an external sample-and-hold circuit.
The ADC10662 and ADC10664 include a “speed-up” pin. Connecting an external resistor between this pin and ground reduces the typical conversion time to as little as 360 ns.
For ease of interface to microprocessors, theADC10662 and ADC10664 have been designed to appear as a memory location or I/O port without the need for external interface logic.
Features
n Built-in sample-and-hold n Single +5V supply n 2- or 4-input multiplexer options n No external clock required
Key Specifications
n Conversion time to 10 bits: 360 ns typical, 466 ns
max over temperature
n Sampling Rate: 1.5 MHz (min) n Low power dissipation: 235 mW (max) n Total harmonic distortion (50 kHz): −60 dB (max) n No missing codes over temperature
Applications
n Digital signal processor front ends n Instrumentation n Disk drives n Mobile telecommunications
Ordering Information
ADC10662
Industrial
(−40˚C T
A
+85˚C)
Package
ADC10662CIWM M24B Small Outline
ADC10664
Industrial
(−40˚C T
A
+85˚C)
Package
ADC10664CIWM M28B Small Outline
*
U.S. Patent Number 4918449
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
November 2001
ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
© 2001 National Semiconductor Corporation DS011192 www.national.com
Simplified Block Diagram
01119209
*ADC10664 Only
Connection Diagrams
01119210
Top View
01119211
Top View
ADC10662/ADC10664
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Pin Descriptions
DVCC,AV
CC
These are the digital and analog positive sup­ply voltage inputs. They should always be connected to the same voltage source, but are brought out separately to allow for sepa­rate bypass capacitors. Each supply pin should be bypassed with a 0.1 µF ceramic capacitor in parallel with a 10 µF tantalum capacitor to ground.
INT
This is the active low interrupt output. INT goes low at the end of each conversion, and returns to a high state following the rising edge of RD .
S/H This is the Sample/Hold control input. When
this pin is forced low (and CS is low), it causes the analog input signal to be sampled and initiates a new conversion.
RD
This is the active low Read control input. When this RD and CS are low, any data present in the output registers will be placed on the data bus.
CS
This is the active low Chip Select control in­put. When low, this pin enables the RD and S /H pins.
S0, S1 These pins select the analog input that will be
connected to the A/D during the conversion. The input is selected based on the state of S0 and S1 when S /H makes its High-to-Low transition (See the Timing Diagrams). The ADC10664 includes both S0 and S1. The ADC10662 includes just S0.
V
REF−
,V
REF+
These are the reference voltage inputs. They may be placed at any voltage between GND
and V
CC
, but V
REF+
must be greater than
V
REF−
. An input voltage equal to V
REF−
pro­duces an output code of 0, and an input volt­age equal to (V
REF+
− 1 LSB) produces an
output code of 1023.
V
IN0,VIN1
,V
IN2,VIN3
These are the analog input pins. The ADC10662 has two inputs (V
IN0
and V
IN1
)
and the ADC10664 has four inputs (V
IN0
,
V
IN1,VIN2
and V
IN3
). The impedance of the source should be less than 500for best accuracy and conversion speed. For accurate conversions, no input pin (even one that is not selected) should be driven more than 50 mV above V
CC
or 50 mV below ground.
GND, AGND, DGND
These are the power supply ground pins. The ADC10662 and ADC10664 have separate analog and digital ground pins (AGND and DGND) for separate bypassing of the analog and digital supplies. The ground pins should be connected to a stable, noise-free system ground. Both pins should be returned to the same potential.
DB0–DB9 These are the TRI-STATE output pins. SPEED ADJ
By connecting a resistor between this pin and ground, the conversion time can be reduced. The specifications listed in the table of Elec­trical Characteristics apply for a speed adjust resistor (R
SA
) equal to 14.0 k(Mode 1) or
8.26 k(Mode 2). See the Typical Perfor­mance Curves and the table of Electrical Characteristics.
ADC10662/ADC10664
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V
+
=AVCC=DVCC) −0.3V to +6V
Voltage at Any Input or Output −0.3V to V
+
+ 0.3V Input Current at Any Pin (Note 3) 5 mA Package Input Current (Note 3) 20 mA Power Dissipation (Note 4) 875 mW ESD Susceptability (Note 5) 2000V Soldering Information (Note 6)
N Package (10 Sec) 260˚C SO Package:
Vapor Phase (60 Sec) 215˚C
Infrared (15 Sec) 220˚C Storage Temperature Range −65˚C to +150˚C Junction Temperature 150˚C
Operating Ratings (Notes 1, 2)
Temperature Range T
MIN
TA≤ T
MAX
ADC10662CIN, ADC10662CIWM, ADC10664CIN, ADC10664CIWM −40˚C T
A
+85˚C
Supply Voltage Range 4.5V to 5.5V
Converter Characteristics
The following specifications apply for V+= +5V, V
REF(+)
= +5V, V
REF(−)
= GND, and Speed Adjust pin connected to ground
through a 14.0 kresistor (Mode 1) or an 8.26 kresistor (Mode 2) unless otherwise specified. Boldface limits apply for T
A
=TJ=T
Min
to T
Max
; all other limits TA=TJ= +25˚C.
Symbol Parameter Conditions Typical Limit Units
(Note 7) (Note 8) (Limit) Resolution 10 Bits Integral Linearity Error
±
0.5
±
1.0/±1.5 LSB
Offset Error
±
1.5 LSB (max)
Full-Scale Error
±
1 LSB (max)
Total Unadjusted Error
±
0.5
±
1.5/±2.2 LSB Missing Codes 0 (max) Power Supply Sensitivity V
+
=5V±5%, V
REF
= 4.5V
±
1/16 LSB
V
+
=5V±10%, V
REF
= 4.5V
±
1
8
LSB
THD Total Harmonic Distortion (Note 10) f
IN
= 1 kHz, 4.85 V
P-P
−68 dB
f
IN
= 50 kHz, 4.85 V
P-P
−66 −60 dB (max)
f
IN
= 100 kHz, 4.85 V
P-P
−62 dB
f
IN
= 240 kHz, 4.85 V
P-P
−58 dB
SNR Signal-to-Noise Ratio (Note 10) f
IN
= 1 kHz, 4.85 V
P-P
61 dB
f
IN
= 50 kHz, 4.85 V
P-P
60 58 dB (min)
f
IN
= 100 kHz, 4.85 V
P-P
60 dB
ENOB Effective Number of Bits (Note 10) f
IN
= 1 kHz, 4.85 V
P-P
9.6 Bits
f
IN
= 50 kHz, 4.85 V
P-P
9.5 9 Bits (min)
R
REF
Reference Resistance 650 400 (min)
900 Ω (max)
V
REF(+)
V
REF(+)
Input Voltage V++ 0.05 V (max)
V
REF(−)
V
REF(−)
Input Voltage GND − 0.05 V (min)
V
REF(+)
V
REF(+)
Input Voltage V
REF(−)
V (min)
V
REF(−)
V
REF(−)
Input Voltage V
REF(+)
V (max)
V
IN
Input Voltage V++ 0.05 V (max)
V
IN
Input Voltage GND − 0.05 V (min) OFF Channel Input Leakage Current CS = V
+
,VIN=V
+
0.01 3 µA (max)
ON Channel Input Leakage Current CS = V
+
,VIN=V
+
±
1 −3 µA (max)
ADC10662/ADC10664
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DC Electrical Characteristics
The following specifications apply for V+= +5V, V
REF(+)
=5VV
REF(−)
= GND, and Speed Adjust pin connected to ground
through a 14.0 kresistor (Mode 1) or an 8.26 kresistor (Mode 2) unless otherwise specified. Boldface limits apply for T
A
=TJ=T
MIN
to T
MAX
; all other limits TA=TJ= +25˚C.
Symbol Parameter Conditions
Typical
(Note 7)
Limit
(Note 8)
Units
(Limits)
V
IN(1)
Logical “1” Input Voltage V+= 5.5V 2.0 V (min)
V
IN(0)
Logical “0” Input Voltage V+= 4.5V 0.8 V (max)
I
IN(1)
Logical “1” Input Current V
IN(1)
= 5V 0.005 3.0 µA (max)
I
IN(0)
Logical “0” Input Current V
IN(0)
0V −0.005 −3.0 µA (max)
V
OUT(1)
Logical “1” Output Voltage V+= 4.5V, I
OUT
= −360 µA 2.4 V (min)
V
+
= 4.5V, I
OUT
= −10 µA 4.25 V (min)
V
OUT(0)
Logical “0” Output Voltage V+= 4.5V, I
OUT
= 1.6 mA 0.4 V (max)
I
OUT
TRI-STATE®Output Current V
OUT
= 5V 0.1 50 µA (max)
V
OUT
= 0V −0.1 −50 µA (max)
DI
CC
DVCCSupply Current CS = S /H = RD = 0 1.0 2 mA (max)
AI
CC
AVCCSupply Current CS = S /H = RD = 0 30 45 mA (max)
AC Electrical Characteristics
The following specifications apply for V+= +5V, tr=tf= 20 ns, V
REF(+)
= 5V, V
REF(−)
= GND, and Speed Adjust pin connected
to ground through a 14.0 kresistor (Mode 1) or an 8.26 kresistor (Mode 2) unless otherwise specified. Boldface limits ap-
ply for T
A=TJ=TMIN
to T
MAX
; all other limits TA=TJ= +25˚C.
Symbol Parameter Conditions
Typical
(Note 7)
Limit
(Note 8)
Units
(Limits)
t
CONV
Mode 1 Conversion Time from Rising Edge of S /H to Falling Edge of INT
360 466 ns (max)
t
CRD
Mode 2 Conversion Time 470 610 ns (max)
t
ACC1
Access Time (Delay from Falling Edge of RD to Output Valid)
Mode 1; CL= 100 pF
30 50 ns (max)
t
ACC2
Access Time (Delay from Falling Edge of RD to Output Valid)
Mode 2; CL= 100 pF
475 616 ns (max)
t
SH
Minimum Sample Time Mode 1
(Figure 1
) ; (Note 9) 150 ns (max)
t
1H,t0H
TRI-STATE Control (Delay from Rising Edge of RD to High-Z State)
R
L
= 1k, CL=10pF
30 60 ns (max)
t
INTH
Delay from Rising Edge of RD to Rising Edge of INT
CL= 100 pF
25 50 ns (max)
t
P
Delay from End of Conversion to Next Conversion
50 ns (max)
t
MS
Multiplexer Control Setup Time 10 75 ns (max)
t
MH
Multiplexer Hold Time 10 40 ns (max)
C
VIN
Analog Input Capacitance 35 pF (max)
C
OUT
Logic Output Capacitance 5 pF (max)
C
IN
Logic Input Capacitance 5 pF (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits, however.For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditons.
Note 2: All voltages are measured with respect to GND, unless otherwise specified. Note 3: When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
<
GND or V
IN
>
V+) the absolute value of current at that pin should be limited
to 5 mA or less. The 20 mA package input current limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
, θJAand the ambient temperature, TA. The maximum
allowable power dissipation at any temperature is P
D
=(T
JMAX−TA
)/θJAor the number given in the Absolute Maximum Ratings, whichever is lower. In most cases,
the maximum derated power dissipation will be reached only during fault conditions. For these devices, T
JMAX
for a board-mounted device can be found from the
tables below:
ADC10662/ADC10664
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